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This brief exploits the fusion of low-power logic and nonvolatile memory inside the emerging ferroelectric FETs (FeFETs) and proposes a new nonvolatile D flip-flop (nvDFF) through the device-circuit co-design. Compared with existing FeFET-based nvDFFs with on-demand control of backup and restore (B&R), the area overhead is lowered by half, and the routing cost is reduced with embedded backup control into the supply voltage. Circuit simulations show below 5% energy-delay overhead in the normal mode and femtojoule B&R energy. This new nvDFF promises area- and energy-efficient nonvolatile computing for power-gating and energy-harvesting applications. [ABSTRACT FROM AUTHOR]

Negative capacitance FET (NCFET) has become a research topic of interest in recent years due to its interesting properties. It has the ability to retain the polarization state even in the absence of electric field. By virtue of this ability, it can be designed as a nonvolatile memory. NCFET can also be configured as a steep-slope switch and thereby providing energy efficiency while used in digital designs. However, the benefits offered by NCFETs for analog circuit domain has not well reported. In this paper, we analyze the impact of body effect on an NCFET-based bootstrapped switch and illustrate that the linearity of NCFET-based switch can be improved resulting from the internal amplification of the employed NCFET. When designed at 0.6-V supply (${V}_{\text {dd}}$), results show that the variation of the on resistance of the bootstrapped switch is about $67~\Omega $ during the sampling period, which is one-third smaller than the MOSFET-based switch. As a result, the sampling linearity is improved and the distortion at the output can be decreased. On condition that the Nyquist input frequency is 10 MHz, the proposed NCFET-based bootstrapped switch succeeds in improving the total harmonic distortion performance by 16.7 dB, compared with that of a conventional MOSFET-based bootstrapped switch. [ABSTRACT FROM AUTHOR]

Negative capacitance FETs (NCFETs) have attracted significant interest due to their steep-switching capability at a low voltage and the associated benefits for implementing energy-efficient Boolean logic. While most existing works aim to avoid the ID – VG hysteresis in NCFETs, this paper exploits this hysteresis feature for logic-memory synergy and presents a custom-designed nonvolatile NCFET D flip-flop (DFF) that maintains its state during power outages. This paper also presents an NCFET fabricated for this purpose, showing <10 mV/decade steep hysteresisedges and high, up to seven orders inmagnitude, R\text {DS} ratio between the two polarization states. With a device-circuit codesign that takes advantage of the embedded nonvolatility and the high R\text {DS} ratio, the proposed DFF consumes negligible static current in backup and restore operations, and remains robust even with significant global and local ferroelectric material variations across a wide 0.3–0.8 V supply voltage range. Therefore, the proposed DFF achieves energy-efficient and low-latency backup and restore operations. Furthermore, it has an ultralow energy-delay overhead, below 2.1% in normal operations, and operates using the same voltage supply as the Boolean logic elements with which it connects. This promises energy-efficient nonvolatile computing in energy-harvesting and power-gating applications. [ABSTRACT FROM PUBLISHER]