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Evidence of microscopic inhomogeneities of the side source/drain contacts in 300 mm wafer integrated MoS2 field-effect transistors is presented. In particular, the presence of a limited number of low Schottky barrier spots through which channel carriers are predominantly injected is demonstrated by the dramatic current changes induced by individual charge traps located near the source contact. Two distinct types of "contact-impacting traps" are identified. Type-1 trap is adjacent to the contact interface and exchanges carriers with the metal. Its impact is only observable when the adjacent contact is the reverse-biased FET source and limits the channel current. Type-2 trap is located in the AlOx gate oxide interlayer, near the source contact, and exchanges carriers with the channel. Its capture/emission time constants exhibit both a gate and drain bias dependence due to the high sensitivity of the contact regions to the applied lateral and vertical fields. Unlike typical channel-impacting oxide traps, both types of reported defects affect the Schottky barrier height and width rather than the threshold voltage and result in giant random telegraph noise (RTN). These observations indicate that the contact quality and geometry play a fundamental role in the ultimate scaling of 2D FETs. [ABSTRACT FROM AUTHOR]

In tunnel field-effect transistors, trap-assisted tunneling (TAT) is one of the probable causes for degraded subthreshold swing. The accurate quantum-mechanical (QM) assessment of TAT currents also requires a QM treatment of phonon-assisted tunneling (PAT) currents. Therefore, we present a multi-band PAT current formalism within the framework of the quantum transmitting boundary method. An envelope function approximation is used to construct the electron-phonon coupling terms corresponding to local Fröhlich-based phonon-assisted inter-band tunneling in direct-bandgap III-V semiconductors. The PAT current density is studied in up to 100 nm long and 20 nm wide p-n diodes with the 2- and 15-band material description of our formalism. We observe an inefficient electron-phonon coupling across the tunneling junction. We further demonstrate the dependence of PAT currents on the device length, for our non-self-consistent formalism which neglects changes in the electron distribution function caused by the electron-phonon coupling. Finally, we discuss the differences in doping dependence between direct band-to-band tunneling and PAT current. [ABSTRACT FROM AUTHOR]

In the quantum mechanical simulation of exploratory semiconductor devices, continuum methods based on a k ⋅ p/envelope function model have the potential to significantly reduce the computational burden compared to prevalent atomistic methods. However, full-zone k ⋅ p/envelope function simulation approaches are scarce and existing implementations are not self-consistent with the calculation of the electrostatic potential due to the lack of a stable procedure and a proper normalization of the multi-band envelope functions. Here, we therefore present a self-consistent procedure based on a full-zone spectral k ⋅ p/envelope function band structure model. First, we develop a proper normalization for the multi-band envelope functions in the presence of transmitting boundary conditions. This enables the calculation of the free carrier densities. Next, we construct a procedure to obtain self-consistency of the carrier densities with the electrostatic potential. This procedure is stabilized with an adaptive scheme that relies on the solution of Poisson's equation in the Gummel form, combined with successive underrelaxation. Finally, we apply our procedure to homostructure In 0.53 Ga 0.47 As tunnel field-effect transistors (TFETs) and staggered heterostructure GaAs 0.5 Sb 0.5 /In 0.53 Ga 0.47 As TFETs and show the importance of self-consistency on the device predictions for scaled dimensions. [ABSTRACT FROM AUTHOR]

Efficient quantum mechanical simulation of tunnel field-effect transistors (TFETs) is indispensable to allow for an optimal configuration identification. We therefore present a full-zone 15-band quantum mechanical solver based on the envelope function formalism and employing a spectral method to reduce computational complexity and handle spurious solutions. We demonstrate the versatility of the solver by simulating a 40 nm wide In0.53Ga0.47As lineTFET and comparing it to p-n-i-n configurations with various pocket and body thicknesses. We find that the lineTFET performance is not degraded compared to semi-classical simulations. Furthermore, we show that a suitably optimized p-n-i-n TFET can obtain similar performance to the lineTFET. [ABSTRACT FROM AUTHOR]

2D materials offer a pathway for further scaling of CMOS technology. However, for this to become a reality, both n-MOS and p-MOS should be realized, ideally with the same (standard) material. In the specific case of MoS2 field effect transistors (FETs), ambipolar transport is seldom reported, primarily due to the phenomenon of Fermi level pinning (FLP). In this study we identify the possible sources of FLP in MoS2 FETs and resolve them individually. A novel contact transfer technique is used to transfer contacts on top of MoS2 flake devices that results in a significant increase in the hole branch of the transfer characteristics as compared to conventionally fabricated contacts. We hypothesize that the pinning not only comes from the contact-MoS2 interface, but also from the MoS2-substrate interface. We confirm this by shifting to an hBN substrate which leads to a 10 fold increase in the hole current compared to the SiO2 substrate. Furthermore, we analyse MoS2 FETs of different channel thickness on three different substrates, SiO2, hBN and Al2O3, by correlating the p-branch ION/IOFF to the position of oxide defect band in these substrates. FLP from the oxide is reduced in the case of Al2O3 which enables us to observe ambipolar transport in a bilayer MoS2 FET. These results highlight that MoS2 is indeed an ambipolar material, and the absence of ambipolar transport in MoS2 FETs is strongly correlated to its dielectric environment and processing conditions. [ABSTRACT FROM AUTHOR]

Complementary logic based on tunnel field-effect transistors (TFETs) would drastically reduce power consumption thanks to the TFET's potential to obtain a sub-60mV/dec subthreshold swing (SS). However, p-type TFETs typically do not meet the performance of n-TFETs for direct bandgap III-V configurations. The p-TFET SS stays well above 60mV/dec, due to the low density of states in the conduction band. We therefore propose a source configuration in which a highly doped region is maintained only near the tunnel junction. In the remaining part of the source, the hot carriers in the exponential tail of the Fermi-Dirac distribution are blocked by reducing the doping degeneracy, either with a source section with a lower doping concentration or with a heterostructure. We apply this concept to n-p-i-p configurations consisting of In0.53Ga0.47As and an InP-InAs heterostructure. 15-band quantum mechanical simulations predict that the configurations with our source design can obtain sub-60mV/dec SS, with an on-current comparable to the conventional source design. [ABSTRACT FROM AUTHOR]

2D materials offer a pathway for further scaling of CMOS technology. However, for this to become a reality, both n-MOS and p-MOS should be realized, ideally with the same (standard) material. In the specific case of MoS 2 field effect transistors (FETs), ambipolar transport is seldom reported, primarily due to the phenomenon of Fermi level pinning (FLP). In this study we identify the possible sources of FLP in MoS 2 FETs and resolve them individually. A novel contact transfer technique is used to transfer contacts on top of MoS 2 flake devices that results in a significant increase in the hole branch of the transfer characteristics as compared to conventionally fabricated contacts. We hypothesize that the pinning not only comes from the contact-MoS 2 interface, but also from the MoS 2 -substrate interface. We confirm this by shifting to an hBN substrate which leads to a 10 fold increase in the hole current compared to the SiO 2 substrate. Furthermore, we analyse MoS 2 FETs of different channel thickness on three different substrates, SiO 2 , hBN and Al 2 O 3 , by correlating the p-branch I ON /I OFF to the position of oxide defect band in these substrates. FLP from the oxide is reduced in the case of Al 2 O 3 which enables us to observe ambipolar transport in a bilayer MoS 2 FET. These results highlight that MoS 2 is indeed an ambipolar material, and the absence of ambipolar transport in MoS 2 FETs is strongly correlated to its dielectric environment and processing conditions.