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In this paper, we study networks of coupled oscillators applied to the distributed synthesis of clock signals for large systems-on-chip. The oscillators are implemented as interconnected all-digital phase-locked loops (ADPLLs), which are asynchronous control systems. We address the issue of modelling, synchronization and stability of both a single ADPLL and interconnected ADPLLs. We prove that the stability domain is universal for large Cartesian networks, and it related to the domain for a single ADPLL. We show that within the stability domain the network synchronises to the reference signal both in frequency and phase. A hardware verification of Cartesian networks is presented, and it is consistent with our theoretical findings. The proposed design may be useful for multiples engineering and physics applications, including clock generation, distributed computations, beamforming, and other applications, where the control over time synchronicity is crucially important for the system performance.

This letter presents a single-electron injection device for position-based charge qubit structures implemented in 22-nm fully depleted silicon-on-insulator CMOS. Quantum dots are implemented in local well areas separated by tunnel barriers controlled by gate terminals overlapping with a thin 5-nm undoped silicon film. Interface of the quantum structure with classical electronic circuitry is provided with single-electron transistors that feature doped wells on the classic side. A small $0.7\times 0.4\,\,\mu \text{m}^{2}$ elementary quantum core is co-located with control circuitry inside the quantum operation cell which is operating at 3.5 K and a 2-GHz clock frequency. With this apparatus, we demonstrate a single-electron injection into a quantum dot.

This letter presents a fully integrated interface circuitry with a position-based charge qubit structure implemented in 22-nm FDSOI CMOS. The quantum structure is controlled by a tiny capacitive DAC (CDAC) that occupies $3.5\times 45\,\,\mu \text{m}^{2}$ and consumes 0.27mW running at a 2-GHz system clock. The state of the quantum structure is measured by a single-electron detector that consumes 1mW (including its output driver) with an area of $40\times 25\,\,\mu \text{m}^{2}$ . The low power and miniaturized layout of these circuits pave the way for integration in a large quantum core with thousands of qubits, which is a necessity for practical quantum computers. The CDAC output noise of 12 $\mu \text{V}$ -rms is estimated through mathematical analysis while the ≤ 0.225mV-rms input referred noise of the detector is verified by measurements at 3.4 K. The functionality of the system and performance of the CDAC are verified in a loopback mode with the detector sensing the CDAC-induced electron tunneling from the floating diffusion node into the quantum structure.

In this paper we demonstrate electrostatic control and feasibility of entanglement in CMOS qubits. We present both single particle and multi-particle methodologies to describe quantum transport using a time-dependent Hamiltonian assuming one spatial degree of freedom. The developed models predict maximally entangled states of electrons controlled electrostatically by external driving fields and interacting via the Coulomb force.

In this paper we consider a PLL network described by an array of interconnected noisy phase oscillators. We define optimal conditions where the entire array synchronises with the reference signal by interacting only between nearest neighbours. We develop a continuous-time model of the PLL network and analyse synchronisation of the system numerically for different architectures of coupling and variations of control parameters. We show that the bidirectional topology significantly outperforms the unidirectional topology in terms of the overall phase noise of the network.

The construction of quantum computer simulators requires advanced software which can capture the most significant characteristics of the quantum behavior and quantum states of qubits in such systems. Additionally, one needs to provide valid models for the description of the interface between classical circuitry and quantum core hardware. In this study, we model electron transport in semiconductor qubits based on an advanced CMOS technology. Starting from 3D simulations, we demonstrate an order reduction and the steps necessary to obtain ordinary differential equations on probability amplitudes in a multi-particle system. We compare numerical and semi-analytical techniques concluding this paper by examining two case studies: the electron transfer through multiple quantum dots and the construction of a Hadamard gate simulated using a numerical method to solve the time-dependent Schrodinger equation and the tight-binding formalism for a time-dependent Hamiltonian.

In this paper, we propose an optimization method for the construction of two-qubit and two-qudit quantum gates based on semiconductor position-based charge qubits. To describe the evolution of various quantum states, we use a Hubbard based model and Lindblad formalism. The suggested optimization algorithm uses the time evolution of entanglement entropy and mutual information for the determination of the system parameters to achieve high fidelity gates.

In this paper, we study the propagation of timing error in a synchronous All-Digital Phase-Locked Loop network. The architecture of the network represents a linear array of oscillators, where the first oscillator is considered as the reference oscillator, and the others are implemented as digitally controlled oscillators. The synchronisation of the network is achieved through interactions between a controlled oscillator and its closest neighbours. Using FPGA prototyping, we have shown that the jitter of a controlled oscillator saturates with the distance from the reference oscillators and that the bidirectional topology has better performance than the unidirectional topology. A comparison of measurements with a theoretical model is carried out to verify our FPGA prototyping framework.

In this paper, we introduce a statistical approach for studying a special class of nonlinear dynamical systems such as ADPLLs and ADPLL networks, where the process driving the adjustment of the DCO frequency can be seen as ∑Δ modulation. We showed that, by applying the Frobenius-Perron operator to the governing equation, it is possible to find the invariant probability density which is valid for dynamically changing input of ∑Δ modulator. By using this, we show that the average behaviour of the corresponding complex system can be dramatically simplified and studied analytically.