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The discontinuous energy transfer characteristics of traditional single-inductor dual-output converters can lead to large output voltage ripple and cross-regulation. Thus, this article presents a double step-down dual-output converter implemented in a 0.15 μm bipolar-CMOS-DMOS (BCD) process, adopting hybrid sum and deviation control to achieve a small output voltage ripple of 25 mV and minimize cross-regulation to 0.025 mV/mA. The timing balance mechanism generates the replicated on-time and calibrates by sensing inductor current mismatch, which improves current balance by 90%. The proposed pulse-based highly robust high-speed low stress level shifter enhances transition speed during load transients while reducing the voltage stress on low voltage device.

The gallium nitride (GaN)-on-Si low-side gate driver proposed in this article has four main features: First, the self-pumped drive enhance (SPDE) technique achieves fast transients. Second, short-period negative voltage (SPNV) technique avoids the Miller coupling effect and improves efficiency. Third, a dual-mode Voltage regulator ensures sufficient current and minimizes power dissipation. Finally, monolithic low-side gate drivers provide robust drive capability. This work can suppress the ringing caused by high dV / dt of $V_{\mathrm {DS}}$ , thereby minimizing the tail time $T_{\mathrm {tail}}$ , achieving a $14.7\times $ reduction in tailing current loss, suppressing abnormal conduction, and reducing reverse conduction loss by 37.0%.