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We investigate differential evolution optimization to fit Rutherford backscattering data. The algorithm helps to find, with very high precision, the sample composition profile that best fits the experimental spectra. The capabilities of the algorithm are first demonstrated with the analysis of synthetic Rutherford backscattering spectra. The use of synthetic spectra highlights the achievable precision, through which it becomes possible to differentiate between the counting statistical uncertainty of the spectra and the fitting error. Finally, the capability of the algorithm to analyze large sets of experimental spectra is demonstrated with the analysis of the position-dependent composition of a Sr x Ti y O z layer on a 200 mm silicon wafer. It is shown that the counting statistical uncertainty as well as the fitting error can be determined, and the reported total analysis uncertainty must cover both. [ABSTRACT FROM AUTHOR]

We report the synthesis and characterization of high-quality thin films of the topological semimetal (Bi2)5(Bi2Se3)7. Cryogenic magnetotransport experiments reveal strong metallic character and spin--orbit coupling in the films. By studying the temperature dependence of the electrical resistance of the topological semimetal, we observe a pronounced Kondo effect, which points toward the presence of magnetic scatterers. With the aid of density functional theory calculations, we identify Bi vacancies as intrinsic magnetic scatterers in this topological semimetal. [ABSTRACT FROM AUTHOR]

Barium titanate (BaTiO3 or BTO) is a perovskite structure material with interesting intrinsic properties, such as spontaneous ferroelectricity or electro-optical behavior, which strongly depend on thin film crystallinity. For such functional oxide systems, the pulsed-laser deposition (PLD) approach is one promising growth technique due to its precise stoichiometry control of the metals composing the perovskite crystal and higher oxygen environment compared to the classically used molecular beam epitaxy (MBE) approach. In this article, we demonstrate a BTO epitaxial layer by PLD onto an Si(001) substrate thanks to a thin pseudomorphic SrTiO3 buffer layer grown by MBE. In our study, the various investigated PLD parameters show strong impacts on the BTO polarization orientation. Hence, adjusting the growth conditions allows control of the polarization orientation, which is crucial for both electronic and optical applications. In addition, lattice parameter changes of BTO layers are investigated using x-ray diffraction and cross-sectional transmission electron microscopy, which evidenced a correlation between mismatch relaxation and oxygen growth pressure. Finally, with the analysis of BTO C–V curves, the polarization direction transition is demonstrated electrically. [ABSTRACT FROM AUTHOR]

In0.53Ga0.47As p + n diodes with different densities of extended defects have been analyzed by detailed structural and electrical characterization. The defects have been introduced during Metal-Organic Vapor Phase Epitaxy (MOVPE) growth by using a lattice-mismatched layer on a semi-insulating InP or GaAs substrate. The residual strain and indium content in the n-type In0.53Ga0.47As layer have been determined by high-resolution X-ray diffraction, showing nearly zero strain and a fixed indium ratio of 0.53. The deep levels in the layer have been characterized by Deep Level Transient Spectroscopy. The mean value of electron traps at 0.17 ± 0.03 eV below the conduction band minimum EC is assigned to the "localized" states of α 60° misfit dislocations; another broad electron trap with mean activation energies between EC− 0.17 ± 0.01 and 0.39 ± 0.04 eV, is identified as threading dislocation segments with "band-like" states. A high variation of the pre-exponential factor KT by 7 orders of magnitude is found for the latter when changing the filling pulse time, which can be explained by the coexistence of acceptor-like and donor-like states in the core of split dislocations in III-V materials. Furthermore, two hole traps at EV+ 0.42 ± 0.01 and EV+ 0.26 ± 0.13 eV are related to the double acceptor of the Ga(In) vacancy (VGa/In3-/2-) and 60° β misfit dislocations, respectively. Finally, the dislocation climbing mechanism and the evolution of the antisite defects AsGa/In are discussed for n-type In0.53Ga0.47As. [ABSTRACT FROM AUTHOR]

In this work, we present a systematic study of the effect of the stoichiometry of BaTiO3 (BTO) films grown on the Ge(001) substrate by molecular-beam-epitaxy using different characterization methods relying on beam diffraction, including reflection high-energy electron diffraction (RHEED), X-ray diffraction (XRD), and selected-area electron diffraction in transmission electron microscopy. Surprisingly, over a wide range of [Ba]/[Ti] ratios, as measured by the Rutherford backscattering spectrometry, all the BTO layers exhibit the same epitaxial relationship h100iBTO(001)// 〈110〉Ge(001) with the substrate, describing a 45° lattice rotation of the BTO lattice with respect to the Ge lattice. However, varying the [Ba]/[Ti] ratio does change the diffraction behavior. From RHEED patterns, we can derive that excessive [Ba] and [Ti] generate twinning planes and a rougher surface in the non-stoichiometric BTO layers. XRD allows us to follow the evolution of the lattice constants as a function of the [Ba]/[Ti] ratio, providing an option for tuning the tetragonality of the BTO layer. In addition, we found that the intensity ratio of the 3 lowest-order Bragg peaks I(001)/ I(002), I(101)/I(002), and I(111)/I(002) derived from ω-2θ scans characteristically depend on the BTO stoichiometry. To explain the relation between observed diffraction patterns and the stoichiometry of the BTO films, we propose a model based on diffraction theory explaining how excess [Ba] or [Ti] in the layer influences the diffraction response. [ABSTRACT FROM AUTHOR]

Metrology for structural and electrical analyses at device level has been identified as one of the major challenges to be resolved for the sub-14 nm technology nodes. In these advanced nodes, new high mobility semiconductors, such as III–V compounds, are grown in narrow trenches on a Si substrate. Probing the nature of the defects, the defect density, and the role of processing steps on the surface of such structures are prime metrology requirements. In order to enable defect analysis on a (III–V) surface, a proper sample preparation for oxide removal is of primary importance. In this work, the effectiveness of different chemical cleanings and thermal annealing procedures is investigated on both blanket InP and oxide embedded InP trenches by means of scanning probe microscopy techniques. It is found that the most effective approach is a combination of an HCl-based chemical cleaning combined with a low-temperature thermal annealing leading to an oxide free surface with atomically flat areas. Scanning tunneling microscopy (STM) has been the preferred method for such investigations on blanket films due to its intrinsic sub-nm spatial resolution. However, its application on oxide embedded structures is non-trivial. To perform STM on the trenches of interest (generally <20 nm wide), we propose a combination of non-contact atomic force microscopy and STM using the same conductive atomic force microscopy tip Our results prove that with these procedures, it is possible to perform STM in narrow InP trenches showing stacking faults and surface reconstruction. Significant differences in terms of roughness and terrace formation are also observed between the blanket and the oxide embedded InP. [ABSTRACT FROM AUTHOR]

Two-dimensional transition metal dichalcogenide (TMD) semiconductors have risen as an important material class for novel nanoelectronic applications. Molybdenum disulfide (MoS2) is the most representative TMD compound due to its superior stability and attractive properties for (opto-) electronic devices. However, the synthesis of single-crystalline and functional MoS2 across large-area substrates remains crucial for its successful integration in semiconductor industry platforms. Therefore, this work focuses on the study of MoS2 epitaxy via two well-established industry-compatible synthesis methods, promising for the large-area and single-crystalline integration of van der Waals (vdW) materials. These methods are molecular beam epitaxy (MBE) and metalorganic vapor phase epitaxy (MOVPE) and have studied MoS2 quasi-vdW heteroepitaxy on reconstructed sapphire substrates and MoS2 vdW homoepitaxy on exfoliated MoS2 flakes. By examining the MoS2 structural properties using diffraction and spectroscopy techniques, the epitaxial relation and crystal quality are assessed, which reveals insights into the prevalence of inter- and intragrain defects such as grain boundaries and sulfur vacancies. The MBE method yields superior epitaxial MoS2 registry on both sapphire and MoS2 surfaces as compared to MOVPE, although inferior defectivity arises from the typical lower MBE growth temperature and chalcogen partial pressure. Moreover, both synthesis methods generate high densities of twinned MoS2 grain boundaries, which hamper defect-free integration. As a result, this challenging integration might become an important bottleneck for industrial TMD-based applications with a low tolerance for material defects. [ABSTRACT FROM AUTHOR]

We use an improved AC conductance method and a modified Gray-Brown method to study fast interface traps and slow border traps in Ge-based MOS capacitors. The combined methods provide the corrected Fermi energy level (E) versus gate voltage (Vg) relationship, even in samples with high densities of traps that cause significant C-V distortion, the energy distribution of interface traps, their capture cross sections (σ), as well as slow border traps. A wide range of σ's in p-type Ge is found, indicating that there is more than one type of interface trap near the Ge valence band edge. In contrast, a constant σ near the Ge conduction band edge is observed in n-type Ge. XPS results indicate that Ge suboxides near the interface are accountable for the detected slow border traps. [ABSTRACT FROM AUTHOR]

In this work, the epitaxy of SrTiO3 and BaTiO3 perovskites on the (001)-oriented silicon substrate by molecular beam epitaxy is investigated. The heterostructures are studied by means of various structural and electrical characterization techniques. In this study especially, the authors reveal experimentally by nanobeam electron diffraction analysis the critical thickness prior relaxation of BaTiO3 grown on an SrTiO3/Si pseudosubstrate. They also propose to use a strain mediated superlattice composed of stacked [BaTiO3/SrTiO3] bilayers to prevent misfit dislocation formation. Using this approach, they could demonstrate high quality and dislocation free BaTiO3 ferroelectric layers integrated on silicon as confirmed by piezo-force microscopy techniques. [ABSTRACT FROM AUTHOR]

Vertical InAs nanowires (NWs) grown on a Si substrate are promising building-blocks for next generation vertical gate-all-around transistor fabrication. We investigate the initial stage of InAs NW selective area epitaxy (SAE) on a patterned Si (111) substrate with a focus on the interfacial structures. The direct epitaxy of InAs NWs on a clean Si (111) surface is found to be challenging. The yield of vertical InAs NWs is low, as the SAE is accompanied by high proportions of empty holes, inclined NWs, and irregular blocks. In contrast, it is improved when the NW contains gallium, and the yield of vertical InxGa1-xAs NWs increased with higher Ga content. Meanwhile, unintentional Ga surface contamination on a patterned Si substrate induces high yield vertical InAs NW SAE, which is attributed to a GaAs-like seeding layer formed at the InAs/Si interface. The role of Ga played in the III-V NW nucleation on Si is further discussed. It stabilizes the B-polarity on a non-polar Si (111) surface and enhances the nucleation. Therefore, gallium incorporation on a Si surface is identified as an important enabler for vertical InAs NW growth. A new method for high yield (>99%) vertical InAs NW SAE on Si using an InGaAs nucleation layer is proposed based on this study. [ABSTRACT FROM AUTHOR]

The efficiency of the ammonium sulfide vapor (ASV) treatment, as opposed to the wet treatment in the liquid ammonium sulfide solution, on the performance improvement of the In0.53Ga0.47As surface-channel as well as InP-capped buried-channel metal-oxide-semiconductor field-effect-transistors (MOSFET) was demonstrated for the first time. MOSFETs were fabricated with either HCl or ASV surface treatments prior to the gate oxide deposition. ASV treatment was found to be very efficient in boosting the drive current of the transistors compared to that of the HCl treatment. It was also found that the ASV treatment leads to a lower border trap density and slightly higher oxide/semiconductor interface defect density compared to that of the HCl treatment. X-ray photoelectron spectroscopy (XPS) studies of In0.53Ga0.47As native oxide regrowth after both surface treatments identified indium sub-oxides as a possible cause of the performance degradation of the HCl treated devices. Based on this work, ASV treatment could be an efficient solution to the passivation of III-V surfaces. [ABSTRACT FROM AUTHOR]

In this study, we investigate the limitations to sheet resistance and Hall effect characterization of ultra-shallow junctions (USJs) in In0.53Ga0.47As. We compare conventional van der Pauw and Hall effect measurements with micro four-point probe (M4PP) and micro Hall effect methods. Due to the high carrier mobility of InGaAs, we extend the micro-Hall effect position error suppression method to also take geometrical magnetoresistance into account. We find that the conventional techniques fail to measure accurately on n++/p+ USJ due to a significant leakage current, whereas the M4PP and micro Hall effect methods are able to give accurate results. Finally, we observe a significant reduction in the carrier mobility for InGaAs USJ. [ABSTRACT FROM AUTHOR]