Search

We have investigated the mechanism of crystallite nucleation and growth in prepatterned nanoscale α-Si pillars using transmission electron microscopy. The number of α-Si pillars that crystallize during annealing depends upon the pillar diameter and the density of nucleation sites at the α-Si/oxide interface, in the as-deposited film. These nucleation sites are presumed to be clusters of atoms exhibiting short-range order that are formed during the initial deposition of α-Si. Their density depends upon the specific deposition conditions. The density of nucleation sites is extracted from the measured pillar crystallization statistics using a Poisson distribution model. It is also observed that the orientation dependence of the crystal growth rate enhances the formation of a single grain inside each pillar. Significant reduction of defect density is achieved with high temperature annealing of sub-100-nm pillars where the surface to bulk ratio is high. [ABSTRACT FROM AUTHOR]

This paper explores stress management in SiGe with two kinds of structures, namely, epitaxial SiGe films on small pillars and fins. In addition to the compliant substrate effect in the film/fin structures, the geometric effect in the film/pillar structures plays another important role in critical thickness enhancement. The stress-strain states of these two systems are calculated and the equilibrium critical thicknesses are predicted, using the work method, for different fin thicknesses, pillar radii, and Ge concentrations. Compared to conventional films grown on planar bulk substrates, the critical thicknesses for fin and pillar structures are increased significantly. SiGe films with various thicknesses and compositions were epitaxially grown around vertical fins and horizontal membranes with thicknesses as thin as 12 nm to demonstrate the concepts. Cross-sectional transmission electron microscopy analysis showed that dislocation densities are much smaller than for films grown on bulk Si substrates. The dislocation density versus fin thickness also illustrated the expected trend. [ABSTRACT FROM AUTHOR]

Laser annealing is being studied as an alternative dopant activation technique to form the ultrashallow, low resistivity junctions required in future generations of integrated circuits. This method benefits from the ability to create uniform, box-shaped dopant profiles with concentrations that can exceed equilibrium solubility values. These supersaturated dopant concentrations, however, exist in a metastable state and deactivate upon subsequent thermal processing. Electrical measurements show that antimony deactivation becomes increasingly severe as the concentration increases. High-resolution x-ray diffraction (HR-XRD), secondary ion mass spectroscopy and transmission electron microscopy were used to study the deactivation process. Under most conditions, Sb deactivation occurs through the precipitate mechanism in which the inactive dopant forms precipitates, leading to a decrease in the substitutional dopant concentration. However, the HR-XRD data reveal that at high concentrations above 6.0 × 10[SUB20] cm[SUP-3] during low temperature anneals, the inactive dopant forms a type of inactive structure that resides on a substitutional site within the Si matrix. [ABSTRACT FROM AUTHOR]

Recent work has indicated that the suppression of boron transient enhanced diffusion (TED) in carbon-rich Si is caused by nonequilibrium Si point defect concentrations, specifically the undersaturation of Si self-interstitial, that result from the coupled out-diffusion of carbon interstitial via the kick-out and Frank-Turnbull reactions. This study of boron TED reduction in SiGeC during 750 degreesC inert anneals has revealed that the use of an additional reaction that further reduces the Si self-interstitial concentration is necessary to describe accurately the time evolved diffusion behavior of boron. In this article, we present a comprehensive model which includes {311} defects, boron-interstitial clusters, a carbon kick-out reaction, a carbon Frank-Tumbull reaction, and a carbon interstitial-carbon substitutional (CC) pairing reaction that successfully simulates carbon suppression of boron TED at 750 degreesC for anneal times ranging from 10 s to 60 min. c 2001 American Institute of Physics. [ABSTRACT FROM AUTHOR]

We have studied the effect of grain boundary migration on hillock formation in unpassivated Al thin films during thermal cycling. Hillocking occurs more frequently in Al films that experience grain growth during thermal cycling than in films with stabilized grain structures. The hillocking frequency is at least four times greater in the films that experience grain growth, as judged by the number of hillocks observed per initial grain boundary triple junction. This latter measure takes account of the smaller initial grain size in the film that experiences grain growth and shows that grain boundary migration itself must enhance the hillocking frequency. © 2001 American Institute of Physics. [ABSTRACT FROM AUTHOR]

Presents a study which linked the structural and electrical properties of thin polycrystalline silicon films at the level of individual grains. Applications of polycrystalline silicon; Conclusions.

Investigates the rate enhancement in the thin-film regime as a function of oxidation time. Relationship between the oxide thickness and the oxidation time that describes silicon dioxide growth; Overview of the time analysis of the oxidation rate in the thin-film regime; Oxide growth in dry oxygen from the onset of oxidation and beyond the native oxide.

Discusses a study which examined the control of the movement of gold in silicon by the reaction of gold with silicon interstitials and not by the intrinsic diffusion coefficient of gold. Indication of an analysis of gold profiles after gettering; Factor that results under the assumption of local equilibrium between silicon interstitials and phosphorus atoms; Role of point defects in diffusion and oxidation in silicon.

Presents a study which considered how oxidation in dry oxygen influences the point-defect densities in silicon. Analysis; Discussion; Conclusion.

Presents a study which developed a model based on a continuity equation approach for the supersaturation of interstitials during oxidation in dry oxygen. Summary of model; Experimental procedure; Measurement and analysis techniques.

Focuses on a study which examined the kinetics and chemistry of silicon and silicon oxide interface trap annealing. Measurements of interface trap density as a function of anneal time; Methodology of the experiments; Effect of anneal temperature and crystal orientation on the kinetics; Description of a two-reaction model involving atomic hydrogen dimerization and hydrogen/interface trap reactions; Explanation of the difference in anneal behavior between two interfaces.

The diffusion of implanted zinc in GaAs is studied and modeled for annealing temperatures of 625 through 850 °C. Secondary ion mass spectrometry data for the annealed profiles are presented. The substitutional interstitial diffusion (SID) mechanism is used to explain how the deviation of the local gallium interstitial concentration from its equilibrium value regulates the Zn diffusion. We are able to simulate both the box shaped profiles resulting from high temperature anneals and the kink-and-tail profiles resulting from lower temperature anneals. The simulation results have allowed us to determine Arrhenius relations for: the intrinsic diffusion coefficient for implanted Zn, D[sup int][sub Zn] = 0.6075 exp(-3.21 eV/k[sub B]T) cm²s[sup -1]; the equilibrium Ga interstitial concentration, C[sup *][sub I][sub Ga] = 7.98 × 10[sup 30] exp(-3.47 eV/k[sub B]T) cm[sup -3]; and the Ga interstitial diffusion coefficient, D[sub I]sub Ga] = 0.4384 exp(-2.14 eV/k[sub B]T) cm² s[sup -1]. [ABSTRACT FROM AUTHOR]

Presents a study that simulated the transient, uphill diffusion of implanted magnesium in gallium arsenide during an annealing using SUPREM-IV. Forms of the substitutional-interstitial-diffusion (SID) mechanism; Motion of the interstitial dopant atoms in charge state; Comparison between the SID and pair diffusion mechanisms.

Focuses on a study that correlated the morphological aspects of the polycrystalline silicon-single crystal silicon interface to the surface treatment using transmission electron microscopy. Role of the interface in the electrical behavior of metal-oxide semiconductor transistors; Types of emitter contacts used in the study; Effects of surface treatments used prior to polysilicon deposition.

Focuses on a study which examined the distribution of ion-implanted cesium (Cs) ions in thermally grown silicon dioxide using Rutherford backscattering spectrometry. Methodology of the study; Findings of the measured Cs concentration profiles; Discussion on the projected range and straggle of the Cs distributions.

Ge stripes grown by rapid melt growth (RMG) have produced defect free single crystals with excellent device characteristics. However, in some cases significant Si concentrations have been observed in the stripes, far from the seed region. In this paper, we anneal Ge RMG stripes at temperatures ranging from 950 °C to 1150 °C for different time periods and show that the measured composition profiles match a model in which complete mixing in the melt is assumed. The model also assumes that the average Si concentration in the RMG stripe equals the equilibrium liquidus concentration at the annealing temperature. This paper outlines a method to predict the profile of Si absorbed from the seed region during RMG. The conclusions from this paper have important implications for minimizing Si contamination in RMG grown stripes. [ABSTRACT FROM AUTHOR]

Ge on insulator (GOI) is desired to obtain metal-oxide-semiconductor transistors with high performance and low leakage current. We have developed a method to make GOI based on liquid-phase epitaxial (LPE) growth on Si substrates and a defect necking technique in which defects are confined to a very short distance. Self-aligned microcrucibles were used to hold the Ge liquid. High-quality single-crystal (100) as well as (111) oriented GOI structures were obtained with a process compatible with Si-based fabrication. No dislocations or stacking faults were found in the LPE Ge films on insulator. The orientation of the Ge crystals was controlled by the seeding Si substrate. This method opens up the possibility of integrating Ge device structures in a baseline Si integrated circuit process. © 2004 American Institute of Physics. [ABSTRACT FROM AUTHOR]

We use kinetic nonlattice Monte Carlo atomistic simulations to investigate the physical mechanisms for boron cluster formation and dissolution at very high B concentrations, and the role of Si interstitials in these processes. For this purpose, high-dose, low-energy B implants and theoretical structures with fully active box shaped B profiles were analyzed. Along with the theoretical B profile, different Si interstitial profiles were included. These structures could be simplifications of the situation resulting from the regrowth of preamorphized or laser annealed B implants. While for B concentrations lower than 10[sup 20] cm[sup -3], B clusters are not formed unless a high Si interstitial concentration overlaps the B profile, our simulation results show that for higher B concentrations, B clusters can be formed even in the presence of only the equilibrium Si interstitial concentration. The existence of a residual concentration of Si interstitials along with the B boxes makes the deactivation faster and more severe. © 2003 American Institute of Physics. [ABSTRACT FROM AUTHOR]

We have demonstrated symmetrically high levels of electrical activation of both p- and n-type dopants in germanium. Rapid thermal annealing of various commonly implanted dopant species were performed in the temperature range of 600–850 °C in germanium substrates. Diffusion studies were also carried out by using different anneal times and temperatures. T-SUPREM™ simulations were used to fit the experimental profiles and to extract the diffusion coefficient of various dopants. © 2003 American Institute of Physics. [ABSTRACT FROM AUTHOR]

We present a technology and its mechanism to obtain single-crystalline Si pillars on SiO[sub 2] using a two-step Ni-induced crystallization process on amorphous Si pillars with confined sizes. The amorphous Si pillars with a Ni cap were first annealed at 400 °C for 15 h so that a single-crystalline NiSi[sub 2] template was formed on top of each pillar. In the second step, they were annealed at 550 °C for 2 h, during which single-crystalline Si pillars were formed by NiSi[sub 2]-mediated solid-phase epitaxy. These single-crystalline Si pillars can be used for advanced vertical metal-oxidesemiconductor transistors and surround-gate structures, especially where low-temperature processing is required. [ABSTRACT FROM AUTHOR]

The role of fluorine in suppressing boron diffusion was investigated by utilizing a buried dopant marker to monitor the interaction of fluorine with interstitials. A boron spike with a peak concentration of 1.2×10[sup 18] cm[sup -3] followed by 500 nm of undoped silicon was grown in a low pressure chemical vapor deposition furnace. The wafers were then preamorphized and implanted with either B, B and F, BF[sub 2], As, As and F, or F, respectively. Following the implants, the samples were rapid thermal annealed (RTA) at 1050 °C for very short times (spike). The use of preamorphization allows the chemical effect of fluorine to be analyzed independently of implant damage, and the buried layer functions as an indicator of point defect (in this case Si self-interstitial) perturbation. As expected, secondary ion mass spectroscopy shows that the presence of fluorine retards the diffusion of boron. In addition, the retained fluorine dose after the RTA is highest in the boron-implanted samples. In all samples the buried layer has diffused by the same amount, indicating that there is no change to the silicon self-interstitial population due to fluorine. These results suggest that fluorine has a chemical effect, and retards boron diffusion by mainly bonding with boron. © 2002 American Institute of Physics. [ABSTRACT FROM AUTHOR]

Deep level transient spectroscopy and capacitance-voltage measurements have been performed on an inverted metal-oxide-semiconductor (MOS) capacitor structure to measure the interface state density at the recrystallized silicon-underlying insulator interface. The effects of different recrystallization caps, annealing steps, and different underlying oxides have been investigated. An interface state density in the mid 1010 cm-2 eV-1 range can be consistently obtained, enabling well-behaved MOS transistor channels on the bottom of the recrystallized films. [ABSTRACT FROM AUTHOR]

Post-metal annealing of aluminum gate metal-oxide-semiconductor capacitors can produce, as well as anneal, interface traps at the Si-SiO2 interface. The production mechanism is shown to be a thermal decomposition of passivated traps. Mechanisms involving interactions with atomic or molecular hydrogen are inconsistent with the experimental data. [ABSTRACT FROM AUTHOR]

The diffusion of ion-implanted cesium in thermally grown SiO2 has been examined in the temperature range 700–1000 °C using Rutherford backscattering spectrometry (RBS). Silicon samples were oxidized and implanted with 5×1014 cm-2 133Cs at 145 keV and then annealed in nitrogen using a rapid thermal system for times ranging from several seconds to several hours. Cesium concentration profiles were measured using RBS for each anneal time and temperature. By observing the decay in the peak cesium concentration as a function of anneal time, a diffusivity of DCs =0.50 exp(-2.9eV/kT) cm2/s has been obtained. Other diffusion effects including cesium pile-up at the oxide interfaces and outdiffusion of cesium into the ambient have been studied qualitatively. [ABSTRACT FROM AUTHOR]

Rapid thermal processing has been used to study the annealing of interface states in aluminum gate metal-oxide-silicon capacitors. Midgap D[sub it] values of 10[sup 12] cm[sup -2] eV[sup -1], as measured by the combined high-frequency/quasistatic capacitance-voltage method, drop to less than 2 × 10[sup 10] cm[sup -2] eV[sup -1] after 2 min at 300 °C and after only 5 s at 380 °C. This compares with a standard anneal time of 30 min at 450 °C commonly used in conventional furnace annealing. The temporal dependence of D[sub it] suggests that interface state annealing is not limited by transport of neutral hydrogen through the oxide. Room-temperature annealing is insignificant over a trial interval of several months. [ABSTRACT FROM AUTHOR]

Examines the interaction between extended defects and silicon interstitials introduced via thermal oxidation. Application of the buried epitaxial layer of boron as interstitials monitor; Formation of a layer of extended defects; Measurement of the amount of oxidation-enhanced diffusion.