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Metal oxide-based resistive random access memory devices are highly attractive candidates for next-generation nonvolatile memories, but the resistive switching phenomena remain poorly understood. This article focuses on the microscopic understanding of the initial forming step, which is decisive for the switching process. The integrated resistive switching memory effect in Ti / Hf O 2 / TiWN metal insulator metal structures is studied. After forming, transmission electron microscopy investigations pointed out the presence of a funnel-shaped region, in the ON state of the cell, where slightly oxidized Ti (Ti Ox ) was present within Hf O 2 dielectric. Modeling of the measured ON state conductance of the cell with the semi-classical approximation is consistent with a conductive nanometric Ti Ox filament (or a sum of sub-nanometric Ti Ox filaments) present in the funnel-shaped region. The conductive area is likely formed by diffusion after the dielectric breakdown. [ABSTRACT FROM AUTHOR]

Atomic layer deposition (ALD) is used in applications where inorganic material layers with uniform thickness down to the nanometer range are required. For such thicknesses, the growth mode, defining how the material is arranged on the surface during the growth, is of critical importance. In this work, the growth mode of the zirconium tetrachloride/water and the trimethyl aluminum/water ALD process on hydrogen-terminated silicon was investigated by combining information on the total amount of material deposited with information on the surface fraction of the material. The total amount of material deposited was measured by Rutherford backscattering, x-ray fluorescence, and inductively coupled plasma–optical emission spectroscopy, and the surface fractions by low-energy ion scattering. Growth mode modeling was made assuming two-dimensional growth or random deposition (RD), with a “shower model” of RD recently developed for ALD. Experimental surface fractions of the ALD-grown zirconium oxide and aluminum oxide films were lower than the surface fractions calculated assuming RD, suggesting the occurrence of island growth. Island growth was confirmed with transmission electron microscopy (TEM) measurements, from which the island size and number of islands per unit surface area could also be estimated. The conclusion of island growth for the aluminum oxide deposition on hydrogen-terminated silicon contradicts earlier observations. In this work, physical aluminum oxide islands were observed in TEM after 15 ALD reaction cycles. Earlier, thicker aluminum oxide layers have been analyzed, where islands have not been observed because they have already coalesced to form a continuous film. The unreactivity of hydrogen-terminated silicon surface towards the ALD reactants, except for reactive defect areas, is proposed as the origin of island growth. Consequently, island growth can be regarded as “undesired surface-selective ALD.” [ABSTRACT FROM AUTHOR]

Interfacial phenomena, such as adhesion, friction and wear, can dominate the performance and reliability of microelectromechanical (MEMS) devices. Here, thin films made by atomic layer deposition (ALD) were tested for their tribological properties. Tribological tests were carried out with silicon counterpart sliding against ALD thin films in order to simulate the contacts occurring in the MEMS devices. The counterpart was sliding in a linear reciprocating motion against the ALD films with the total sliding distances of 5 and 20 m. Al2O3 and TiO2 coatings with different deposition temperatures were investigated in addition to Al23-TiO2-nanolaminate, TiN, NbN, TiAlCN, a-C:H [diamondlike carbon (DLC)] coatings and uncoated Si. The formation of the tribolayer in the contact area was the dominating phenomenon for friction and wear performance. Hardness, elastic modulus and crystallinity of the materials were also investigated. The nitride coatings had the most favorable friction and wear performance of the ALD coatings, yet lower friction coefficient was measured with DLC a-C:H coating. These results help us to take steps toward improved coating solutions in, e.g., MEMS applications. [ABSTRACT FROM AUTHOR]

The scratch test method is widely used for adhesion evaluation of thin films and coatings. Usual critical load criteria designed for scratch testing of coatings were not applicable to thin atomic layer deposition (ALD) films on silicon wafers. Thus, the bases for critical load evaluation were established and the critical loads suitable for ALD coating adhesion evaluation on silicon wafers were determined in this paper as LCSi1, LCSi2, LCALD1, and LCALD2, representing the failure points of the silicon substrate and the coating delamination points of the ALD coating. The adhesion performance of the ALD Al2O3, TiO2, TiN, and TaCN+Ru coatings with a thickness range between 20 and 600 nm and deposition temperature between 30 and 410 °C on silicon wafers was investigated. In addition, the impact of the annealing process after deposition on adhesion was evaluated for selected cases. The tests carried out using scratch and Scotch tape test showed that the coating deposition and annealing temperature, thickness of the coating, and surface pretreatments of the Si wafer had an impact on the adhesion performance of the ALD coatings on the silicon wafer. There was also an improved load carrying capacity due to Al2O3, the magnitude of which depended on the coating thickness and the deposition temperature. The tape tests were carried out for selected coatings as a comparison. The results show that the scratch test is a useful and applicable tool for adhesion evaluation of ALD coatings, even when carried out for thin (20 nm thick) coatings. [ABSTRACT FROM AUTHOR]

The properties of WN[SUBx]C[SUBy] films deposited by atomic layer deposition (ALD) using WF[SUB6], NH[SUB3], and triethyl boron as source gases were characterized as a diffusion barrier for copper metallization. It is noted that the as-deposited film shows an extremely low resistivity of about 350 μΩ cm with a film density of 15.37 g/cm[SUP3]. The film composition measured from Rutherford backscattering spectrometry shows W, C, and N of ∼ 48, 32, and 20 at. %, respectively. Transmission electron microscopy analyses show that the as-deposited film is composed of face-centered-cubic phase with a lattice parameter similar to both β-WC[SUB1-x] and β-W[SUB2]N with an equiaxed microstructure. The barrier property of this ALD-WN[SUBx]C[SUBy] film at a nominal thickness of 12 nm deposited between Cu and Si fails only after annealing at 700 °C for 30 min. [ABSTRACT FROM AUTHOR]

Structural and electrical properties of gate stack structures containing ZrO[sub 2] dielectrics were investigated. The ZrO[sub 2] films were deposited by atomic layer chemical vapor deposition (ALCVD) after different substrate preparations. The structure, composition, and interfacial characteristics of these gate stacks were examined using cross-sectional transmission electron microscopy and x-ray photoelectron spectroscopy. The ZrO[sub 2] films were polycrystalline with either a cubic or tetragonal crystal structure. An amorphous interfacial layer with a moderate dielectric constant formed between the ZrO[sub 2] layer and the substrate during ALCVD growth on chemical oxide-terminated silicon. Gate stacks with a measured equivalent oxide thickness (EOT) of 1.3 nm showed leakage values of 10[sup -5] A/cm[sup 2] at a bias of -1 V from flatband, which is significantly less than that seen with SiO[sub 2] dielectrics of similar EOT. A hysteresis of 8-10 mV was seen for ±2 V sweeps while a midgap interface state density (D[sub it]) of ∼3x10[sup 11] states/cm eV was determined from comparisons of measured and ideal capacitance curves. © 2001 American Institute of Physics. [ABSTRACT FROM AUTHOR]