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Currently the mask blanks used in extreme ultraviolet lithography cannot be fabricated free of defects. A rapid method of determining the optimum placement of mask patterns on the blank to avoid these defects is described. Using this method, the probability of fabricating defect-free masks, when the pattern is (1) randomly placed on the mask blank or (2) positioned optimally to avoid defects, is determined for a variety of integrated circuit designs, defect densities, and defect sizes. In addition to circular defects, oval and clusters of defects are also considered. Finally, simple analytical expressions for the probability of obtaining a defect-free mask in the case of random placement of the mask pattern is presented and compared to Monte Carlo simulations.

Recent studies have shown that high performance 0.1 μm complementary metal–oxide semiconductor (CMOS) can be achieved with proper channel and source/drain engineering. Specifically, retrograde channel doping and shallow source/drain junctions with counterdoping implant (halo) allow the threshold voltage to be kept low while maintaining acceptable short‐channel behavior. These studies have certainly demonstrated the feasibility of CMOS technology scaled down to 0.1 μm from a device design point‐of‐view. However, the main challenge to the lithography technology is to fabricate 0.1 μm metal‐oxide‐semiconductor field‐effect transistor (MOSFET) devices with high yield and high throughput, as required in manufacturing. X‐ray lithography is a technology that can potentially meet this challenge. This work shows the results of integrating a low cost x‐ray technology with standard IC processing to fabricate high performance 100 nm and even sub‐100 nm MOSFETs.

We report on the fabrication and measurement of a novel type of quantum dot device in which the shape and size of the dot can be controlled. The device consists of four uniformly spaced quantum point contacts which can be biased to produce quantum dots ranging in size from 600 nm to below 200 nm. The capacitances of the gates controlling the dot are small. Measurements were made at a temperature of 0.3 K for three different dot sizes. Devices were fabricated in three lithography steps, with x‐ray nanolithography used to define the final gate layer. The device exhibits conductance maxima whose spacing depends on which quantum point contacts are used to define the quantum dot.

We report on measured Hall mobility versus temperature for high‐quality modulation‐doped AlGaAs/GaAs samples after exposure by electrons and x rays at doses and energies typically used in lithography. We find that bare samples exposed by 50 keV electrons suffered significant mobility degradation over the temperature range of 4.2–300 K (as much as a factor of 30). X‐ray‐exposed samples did not show any mobility degradation. Two‐dimensional electron densities were not dramatically affected by either exposure technique, although e‐beam exposed samples did show a slight decrease in carrier density. Our results are consistent with previous reports of mobility degradation in some e‐beam evaporators.

We report on the fabrication of quasi‐one‐dimensional wires on modulation‐doped GaAs/AlGaAs using a novel conformable x‐ray mask technology which allows us to expose arbitrary sized samples, including samples much smaller than the membrane area, using our laboratory’s standard 31 mm‐diam silicon‐nitride x‐ray mask. After optical alignment, the sample and mask are brought into contact electrically, and then loaded into a specially designed cartridge which allows a vacuum to be pulled between mask and substrate. The vacuum causes the x‐ray mask to conform around the sample. We find that a vacuum hold down is necessary to allow easy separation of the sample from the mask with minimal risk to both.