Search

The main drawbacks of conventional direct torque control (DTC) drives are erratic switching frequency and high torque ripples. The multilevel inverter fed DTC drives are proved to be an alternative for eliminating these drawbacks. Apart from the commonly used three-level inverter fed drives, this paper presents an even-level inverter fed DTC drive. In this paper, a space vector modulated DTC algorithm for a four-level DTC drive is proposed and is implemented by feeding both ends of an open-end-winding induction motor with two-level inverters. The space vector modulation (SVM) algorithm uses a fractal based design for switching voltage vector generation and allied computations are performed in 60 degree co-ordinate system. Representation of vectors as integer values in 60 degree co-ordinate planes avoids fractional arithmetic, which simplifies the algorithmic computations. Detailed analyses of the drive performance under dissimilar operating modes are presented. The loading performance of the drive is experimentally verified on a 5-HP induction motor with a strain gauge type mechanical loading system. No-load experimental results were obtained from a laboratory model 2-HP induction motor drive operated in closed loop mode. [ABSTRACT FROM AUTHOR]

This paper introduces an averaging control strategy of the phase-unit losses of modular multilevel converters (MMCs). The quantitative analysis of the MMC phase-unit loss distribution under unbalanced ac conditions is carried out by investigating the individual component of the MMC arm currents. It shows that the unbalanced arm currents will result in unbalanced phase-unit losses. To address this issue, this paper proposes a predictive closed-loop-control-based zero-sequence voltage injection method that results in much averaged loss distribution under unbalanced ac conditions. The essence of the new method is that it adjusts the three-phase sinusoidal references so that the unbalanced arm currents are fully utilized to average phase-unit losses. This paper shows the effectiveness of the new approach by electromagnetic transient simulations on PSCAD/EMTDC. [ABSTRACT FROM AUTHOR]

The pump-back test is widely adopted in the industry for characterizing and qualifying high-power converters. One popular pump-back test configuration is to tie the dc links of two converters together and circulate the current through the inductor connected between the ac terminals. In this configuration, one of the converters operates in the voltage mode to generate the virtual grid and the other converter regulates the circulating current, where hysteresis control could be applied. However, the switching characteristics of hysteresis control are unique due to the pulsewidth modulation type voltage being the virtual grid. This paper contributes to analyzing the switching frequency characteristics of the hysteresis control in this pump-back test configuration. The switching frequency tracking phenomenon is revealed and reported in this paper for the first time. Theoretical analysis, simulation validation, and experimental demonstration are provided to support the major conclusions. [ABSTRACT FROM AUTHOR]

This paper proposes a variable off-time control method for a single-phase microinverter operating in the discontinuous conduction mode (DCM) for efficiency improvement. First, the fixed off-time control method is analyzed. The concept is to fix the off-time of the active switch throughout a line cycle for all output powers and scale the on-time of the active switch to shape a sinusoidal output current. Then, based on the fixed off-time control method, a variable off-time control method is proposed to modulate the preset fixed off-time in order to decrease the switching frequency during ac line zero-crossings and light load conditions. Compared with existed fixed-frequency DCM control or boundary conduction mode control, the variable off-time control is more flexible to optimize the efficiency under different load conditions as the switching frequency range can be automatically adjusted according to the output power. The switching frequency is high at heavy loads to limit the maximum peak current and is low at light loads to increase the light load efficiency. In addition, a predictive on-time method is adopted to simplify inverter control and reduce hardware costs. The parameter design principle is detailed in this paper. A 300 W prototype is built to verify the performance of the proposed method. [ABSTRACT FROM AUTHOR]

In the rapidly growing field of electrified transportation technology, hybrid electric and electric vehicle (HEV/EV) manufacturers have been placing increasing demands on the designers to improve the efficiency and reduce the costs of vehicle components to sustain a niche in the EV market. To understand the significance and challenges in an efficient and economical drivetrain design, this paper presents a part of an ongoing project that aims at developing a comprehensive study on dc/ac drive motor technology in EV applications. In this paper, a new three-level three-phase matrix converter topology, along with two conventional frequently used three-level three-phase dc/ac converter topologies, namely, diode-clamped and H-bridge converters, are implemented. Furthermore, comprehensive analysis and comparative studies are conducted to examine the performance and efficiency of these converter topologies according to EV design criteria. In addition, experimental investigations are carried out on the aforementioned converter configurations to help EV designers choose the most suitable converter topology. [ABSTRACT FROM PUBLISHER]

This two-part paper presents a method to mitigate half-cycle saturation of transformers caused by monopolar operation of neighboring HVDC transmission lines while keeping the ability to detect the zero-sequence fault currents (ZSFC) when ground faults occur. Part I of this paper has presented the mitigation principles and device design of the proposed neutral current blocking switch. In Part II, the performance of the proposed method to permit the circulation of zero-sequence current is investigated. An operation strategy is proposed that simultaneously allows the mitigation of half-cycle saturation and the detection of ZSFC. Simulations on a widely-used 500 kV system show that the proposed mitigation technique, using a sub-synchronous switching frequency (no higher than 30 Hz), can effectively mitigate the half-cycle saturation while allowing the circulation of ZSFC. The novel mitigation method exploits the characteristic differences between half-cycle saturation (dc) and asymmetric faults (ac). The method provides an implementable solution to the dc-bias phenomenon because it delivers concurrently dc-bias mitigation, minimal impact on ground fault detection, and no switching stresses on the power electronic switches. The proposed technique can also be applied to the mitigation of geomagnetically induced currents. [ABSTRACT FROM AUTHOR]

This paper presents the development of a Class-D full-bridge zero-voltage switching (ZVS) inverter, applicable to wireless power transfer (WPT) systems, operating at 13.56 MHz switching frequency with dynamic dead-time control (DDTC). Resonant-coupled WPT systems are being designed at ultrahigh switching frequencies to reduce the size of the wireless link and the passive components. Maintaining ZVS while controlling the output power delivered to a fixed or variable load is one of the major challenges of designing inverters at multi-MHz switching frequencies. DDTC is the approach deployed in this paper to sustain soft switching of a Class-D full-bridge inverter over the full range of output power while regulating the input dc bus voltage. Simulation results are presented to show that dynamically controlling the dead-time during input dc bus voltage variations reduces switch-node voltage overshoot, prevents large current spikes in the switching devices, and reduces associated high switching loss. Practical results obtained show that DDTC reduces switch-node voltage overshoot, increases the inverter efficiency, and reduces the steady-state temperature of the inverter during output power regulation. [ABSTRACT FROM AUTHOR]

Improving the power density of a power converter has many benefits for systems integration. Aspects such as thermal management, weight, conformation to mounting locations, and the footprint of the converter all become critical factors as systems continue to scale down in size. The flying capacitor multilevel converter topology is of interest because it has characteristics which contribute to high power density. This paper presents a quasi-square-wave zero-voltage switching (ZVS) multilevel dc–dc converter. ZVS greatly reduces switching losses and enables high-frequency operation of the converter. A hardware prototype is implemented, built on a flexible polyimide substrate circuit board. Experimental results show a peak system efficiency above 98.1%, an effective switching frequency of up to 3 MHz, and a power output of 250 W. [ABSTRACT FROM AUTHOR]

This paper characterizes the sampling effect in digital sinusoidal pulse width modulation (SPWM) of voltage source inverter (VSI). The time-domain analysis presented in this paper establishes the relation between the fundamental frequency, carrier frequency, and the sampling frequency at different modulation indices of the SPWM. The analysis investigates the effect of sampling frequency of the digital controller on the output of the VSI. It is shown that the low-frequency harmonic components appear in the frequency spectrum of the VSI output voltage due to sampling. As a result, the output current of digitally controlled VSI is stepped in nature. The double Fourier integral solution of the switched waveform for inner and outer integral limits has been used to derive the expression. The integral solution is obtained using Jacobi-Anger expansions. The generalized results developed in this paper are useful to investigate the sampling effect in high switching frequency DSPWM. The proposed sampling effect has been analyzed for SPWM of single-phase H-bridge inverter. The analytical results are verified using simulation and experimental results. The experimental results have been obtained with the use of field-programmable gate array (FPGA) as a digital controller. [ABSTRACT FROM PUBLISHER]

Various methods have been presented in the past to emulate the electrical behavior of modular multilevel converters (MMCs). To meet the demands for the reliability aspect study of MMCs, this paper proposes a viable setup to emulate the thermal behavior and to investigate its feasibility for reliability testing and thermal model validation of the power modules in the MMC. The proposed mission profile emulator has three distinctive features: 1) capable of emulating and measuring the thermal stresses of power modules; 2) capable of implementing practical switching profile as a full-scale MMC; and 3) having significantly reduced requirement for dc power supply compared to existing setups used for electrical studies. Theoretical discussions, and simulations as well as the experimental results are presented to demonstrate the capability of the mission profile emulator both electrically and thermally. Moreover, this paper is accompanied by a video demonstrating how to measure the junction temperature of the power devices using the optical fiber and the thermal camera. [ABSTRACT FROM AUTHOR]

This paper proposes a model predictive control (MPC) method for modular-multilevel-converter (MMC) high-voltage direct current (HVDC). To control the MMC-HVDC system properly, the ac current, circulating current, and submodule (SM) capacitor voltage are taken into consideration. The existing MPC methods for the MMC-HVDC system utilize weighting factors to configure the cost function in combinations of the SM capacitor voltage balancing algorithm, ac current control, and circulating current control. Because all combinations of the switch states are considered in order to minimize the cost function, their possible combinations increase geometrically according to the increase of the level of the MMC, which is a significant disadvantage. This paper proposes a new MPC method with a reduced number of states for ac current control, circulating current control, and the SM capacitor voltage-balancing algorithm. The proposed cost functions are divided into three types according to their control purposes. Each cost function determines the minimum number of states for controlling the ac current, circulating current, and SM capacitor voltage. The efficacy of the proposed controlling method is verified through simulation results using PSCAD/EMTDC. [ABSTRACT FROM AUTHOR]

A flyback converter that operates in the boundary conduction mode or discontinuous conduction mode has been widely used in microinverters. Placing two flyback converters in parallel and utilizing interleaving can extend the power range of microinverters. Interleaving phases between the two converters should be carefully regulated in order to reduce the switching current ripple. In this paper, two open-loop phase synchronization methods are put forward and compared for the interleaved flyback microinverters utilizing the master-slave control principle. The comparison result shows that stable phase regulation can be achieved if synchronization is triggered at the instant when the master converter's primary switch is turned OFF. However, the switching loss will be increased with the transformers' magnetizing inductances mismatch between the two interleaved converters. To solve this problem, a novel closed-loop interleaving phase synchronization control method is proposed in this paper to guarantee high efficiency and stable operation at the same time. Simulation platform together with a 200-W prototype have been built to verify the proposed control methods. These results demonstrate that the proposed closed-loop interleaving phase synchronization control method can achieve high efficiency while maintaining stable phase synchronization for the interleaved flyback microinverter. [ABSTRACT FROM AUTHOR]

Chaotic sinusoidal pulse width modulation (SPWM) can be used to suppress the electromagnetic interference in power converters. In this paper, a mathematical method for estimating power losses in insulated-gate bipolar transistors and freewheeling diodes occurring under chaotic frequency modulation SPWM (CFM-SPWM) switching is proposed. This method is based on the features of the chaotic mapping and uses semiconductor datasheet information to calculate the power losses in a discrete way. Analytical expressions and approximations for estimating the losses for the cases of SPWM and CFM-SPWM switching, respectively, are presented. This paper includes a quantitative comparison of the losses under the two previously mentioned cases. It is confirmed that CFM-SPWM does not result in higher power losses when it greatly improves electromagnetic compatibility of power converters, and hence, its adoption will not require any modified converter thermal design. Experimental results taken from a single-phase ac–dc converter are presented to prove the validity of the proposed method and associated results. [ABSTRACT FROM PUBLISHER]

A variable-switching constant-sampling frequency critical soft switching model predictive control (VSCS-MPC) method is proposed in this paper to improve the dynamic behavior, efficiency and power density of the DC/DC power converters. Firstly, this paper analyzes the boundary constraints of critical soft switching that are derived with the key parameters of the interlock time and threshold current for typical SiC and GaN devices. Then, the VSCS-MPC method is proposed for synchronous DC/DC converter. Both the current source load and resistive load converters are validated with the proposed MPC method. VSCS-MPC includes two controlling parts. First is the frequency controller to maintain the critical soft switching operation by adjusting the switching frequency based on the pre-defined boundary conditions with a constant sampling frequency. A discretized frequency controller is developed to improve the stability of the system by maintaining a fixed sampling frequency. Second part is the model predictive controller to track the output voltage/current and maintain critical soft switching during dynamic periods. The explicit optimization and oversampling methods are applied in the MPC controller to meet the high frequency demand. A large current ripple ($\triangle i_L$ $\ge$ 200 %) is introduced to achieve the critical soft switching and reduce the inductance. The switching losses are decreased by the frequency controller and the critical soft switching is maintained especially in dynamic periods due to the fast response of MPC. [ABSTRACT FROM AUTHOR]

This paper introduces a three-phase grid-connected inverter for commercial-scale photovoltaic systems. The circuit topology combines an ac-inductor-less active bridge with a parallel-connected pulsewidth modulation inverter acting as an instantaneous reactive power compensator. The active bridge, called a 120° conduction inverter, operates at a switching frequency equal to the grid frequency and outputs a 120° rectangular current, while the compensator eliminates the harmonic currents included in the rectangular current. The main advantage of this strategy is the reduction in size of the required ac inductor by a factor of 4, as well as the reduction of power losses in the switching devices. The theoretical analysis clearly shows that the compensator can synthesize a sinusoidal output current by controlling only instantaneous reactive power, thus eliminating the need for electrolytic capacitors. A 5-kW experimental setup validates the operating principle and the control method of the proposed inverter and exhibits an inverter efficiency as high as 99.2% with Si superjunction mosfets. [ABSTRACT FROM AUTHOR]

This paper presents design of an isolated high-step-down dc–dc converter based on a class-DE power stage, operating at a 10-MHz switching frequency using enhancement-mode gallium nitride transistors. The converter operating principles are discussed, and the power stage design rated for 20 W is presented for a step down from 200–300 V input to 0–28 V output. Commercially available magnetic materials were explored and the high-frequency resonant inductor and transformer designs using a low-loss Fair-Rite type 67 material are presented. Finite-element simulations have been performed to estimate the parameters of magnetics at 10-MHz. Experimental results are presented at 12 W, 254 V input to 22 V output and 5 W, 254 V input to 14 V output on a laboratory prototype operating at 10-MHz. At 20 W, the experimental prototype achieved an efficiency of 85.2%. [ABSTRACT FROM AUTHOR]

This paper presents a new six-level flying capacitor based (FC-based) multilevel converter with one dc source and the capability of operating in all power factors and modulation indexes. Multilevel converters with one dc voltage source are attractive in many applications as they do not need rather expensive and bulky multiwinding input transformer connection at the dc side. On the other hand, not all classic multilevel converters with one dc source can produce any desirable number of output voltage levels at all power factors and/or modulation indexes. In this paper, a hybrid structure is proposed in which six voltage levels can be realized at the ac terminals. The modulation technique and the control strategy for the FC voltage balancing are presented. To show the advantages of the proposed converter, different performance criteria, such as switch count and rating, the size of capacitors, switching frequency, and power losses, are compared with other existing six-level topologies. The results indicate that the proposed structure is superior to other six-level converters from different standpoints. Simulation results are used to further evaluate the performance of the proposed converter. A laboratory-type experimental setup is used to validate the theoretical results. [ABSTRACT FROM AUTHOR]

In data center and telecommunication power supplies, the front-end dc–dc stage is required to operate with a wide input voltage range to provide hold-up time when ac input fails. Conventional LLC converter serving as the dc–dc stage is not suitable for this requirement, as the normal operation efficiency (at 400 V input) will be penalized once the converter is designed to achieve high peak gain (wide input voltage range). This paper examined the operation of the LCLC converter and revealed that the LCLC converter could be essentially equivalent to a set of LLC converters with different magnetizing inductors that are automatically adjusted for different input voltages. In nominal 400 V input operation, the LCLC converter behaves like an LLC converter with large magnetizing inductor, thus the resonant current is small. In the hold-up period, when the input voltage reduces, the equivalent magnetizing inductor will reduce together with switching frequency reducing, thus the converter achieves high peak gain. In this paper, a new design methodology is also proposed to achieve optimal utilization of the two resonant capacitors for high power application. To verify the effectiveness of the LCLC converter for hold-up operation, comprehensive analysis has been conducted; a detailed step by step design example based on capacitor voltage stress is introduced; an experimental LCLC prototype optimized at 400 V, with input voltage range of 250–400 V and 12 V/500 W as output has been presented. [ABSTRACT FROM AUTHOR]

In power electronics, the $\ell _1$-norm (instead of the squared $\ell _2$-norm) is often used in the objective function of model predictive controllers (MPCs) with reference tracking. Although the $\ell _1$-norm is preferred for its computational simplicity, it might lead to a performance deterioration and closed-loop instability. This paper analyzes the root cause for this and discusses the benefits of using the $\ell _2$-norm instead. Given the theoretical nature of this paper, a power electronics-oriented case study is employed to visualize and exemplify—through examples and simulations—the mathematical concepts and arguments presented. To this end, a variable speed drive system with a three-level voltage-source inverter serves as an illustrative example to clearly demonstrate the effectiveness of using the $\ell _2$-norm. [ABSTRACT FROM AUTHOR]

The digital implementation of all the control loops of a versatile buck-boost (VBB) dc–dc converter used in a stand-alone photovoltaic application is proposed in this paper to improve existing digital-analog sliding-mode-based implementations. All three control loops: maximum power point tracking (MPPT), fast input voltage regulation, and inner high-bandwidth current control, have been programmed in the same digital signal controller (DSC). A Model Predictive Control (MPC) based algorithm has satisfactorily solved the challenge of implementing the nominal 100 kHz switching frequency current loop. The MPC cost function is distributed throughout the algorithm to achieve three specific goals: the tracking of the reference current (G1), a quasi-constant steady-state switching frequency (G2), and the assurance that the duration of an interval is larger than the time required to calculate it (G3). The third goal requires the current control to toggle between peak- and valley-modes depending on the operating point. The correct fulfillment of these control objectives on the proposed MPC-based algorithm has been validated through simulations and experimental tests performed on a purpose built-prototype. [ABSTRACT FROM AUTHOR]

In this paper a control method for a matrix converter (MC) based on the heterodyne concept from the communication field is presented. The method is used to convert the high frequency of a microturbine generator’s (MTG) output voltage to the utility grid’s frequency. In this control method a frequency modulation (FM) of the MC’s switching frequency is achieved using a DQ0 analysis of the converter’s filtered output voltage with the utility grid’s frequency as a reference. After filtration, the MC achieves a conversion to the reference frequency with a minimal total harmonic distortion (THD) of the output voltage while using a low switching frequency. In addition, the proposed method decouples the output frequency, phase angle and voltage amplitude, which allows them to be controlled separately. This significantly simplifies the required control, and enables a robust and low-cost design. The theoretical analysis, simulation and experimental results of the method are reported. [ABSTRACT FROM AUTHOR]

Multilevel inverters have created a new wave of interest in industry and research. While the classical topologies have proved to be a viable alternative in a wide range of high-power medium-voltage applications, there has been an active interest in the evolution of newer topologies. Reduction in overall part count as compared to the classical topologies has been an important objective in the recently introduced topologies. In this paper, some of the recently proposed multilevel inverter topologies with reduced power switch count are reviewed and analyzed. The paper will serve as an introduction and an update to these topologies, both in terms of the qualitative and quantitative parameters. Also, it takes into account the challenges which arise when an attempt is made to reduce the device count. Based on a detailed comparison of these topologies as presented in this paper, appropriate multilevel solution can be arrived at for a given application. [ABSTRACT FROM AUTHOR]

This paper proposes a common-mode electromagnetic interference (CM-EMI) spectrum calculation method based on double Fourier series for photovoltaic (PV) inverters with chaotic sinusoidal pulsewidth modulation (CSPWM). In this paper, the CM-EMI of a single-phase PV inverter is first analyzed, and the equivalent circuit of the CM-EMI in the single-phase PV inverter is established, then the CSPWM is employed to suppress the CM-EMI in PV inverters. Moreover, the proposed EMI spectrum calculation method based on double Fourier series is applied in evaluating the CM-EMI spectrum of the single-phase PV inverter. Finally, the simulation and experimental results validate the EMI suppression effectiveness of the CSPWM and the correctness of the proposed EMI spectrum calculation method. Therefore, the proposed EMI spectrum calculation method provides a theoretical support for CSPWM to reduce EMI. [ABSTRACT FROM AUTHOR]

Paralleled inverters are not only a suitable approach to increase the power capacity, but also have the capability of common mode voltage (CMV) reduction, or even elimination. The original zero CMV modulation scheme for paralleled inverters suffers from the current jump problem in phase-leg currents. This current jump phenomenon amplifies the peak values of differential-mode circulating current (DMCC) and zero-sequence circulating current (ZSCC), which is adverse for the design of coupled inductor and common-mode inductor. This paper introduces the modified modulation scheme, which can keep volt-seconds balance in whole fundamental period and mitigate the current jump in phase-leg currents. In addition, the reduction effect of the DMCC and ZSCC can be achieved. To verify the analysis, both the simulation and experimental results are presented, which validates the proposed methods and show that they are beneficial for DMCC and ZSCC reduction. [ABSTRACT FROM AUTHOR]

Multilevel converters with floating capacitors (FCs) are widely applied in recent years in a wide range of industrial applications from high-voltage direct current systems to high power drives. However, some FC topologies lack complete FC voltage balancing capability due to the inherent topology limitation or the insufficient switching state for capacitor balancing. This will result in large ripples on capacitors at low frequency (such as fundamental frequency), limiting their performance and application, particularly, when the fundamental frequency is very low in low-speed drive operations. Typical examples of those multilevel converters are modular multilevel converters (MMC), nested neutral-point-clamped (NNPC) converter, etc. In order to improve the FC balancing for this kind of multilevel converters, this paper proposes a carrier-based pulse-width modulation (PWM) method, named stair edge PWM method. This method can obtain sufficient redundant switching states for FC voltage balancing by producing multiple levels in one PWM period. The FC voltage balancing is thus achieved at switching frequency, which can greatly reduce the capacitor voltage ripple and therefore enable the use of much smaller FCs. Meanwhile, the voltage stress on each device and low $dv/dt$ feature are still the same as the normal multilevel operation, reserving two of the most salient features of multilevel converters. The proposed method also features much simpler and easier implementation compared with space-vector-based approaches, particularly when high-level converters are considered. An application example using a four-level NNPC converter is provided in this paper. The effectiveness and performance of the proposed method are verified by both simulation and experiment. [ABSTRACT FROM AUTHOR]

In this paper, the characteristics of ripple current of a multimegawatt drive system fed by a pulse-width modulation (PWM) inverter are investigated. Based on the investigation, a novel PWM scheme is devised to reduce the switching loss of the inverter under an identical amount of torque ripple of a motor. The proposed PWM is composed of two parts. The first is minimum torque ripple PWM (MTRPWM), which is optimized in terms of the minimum torque ripple in high modulation index (MI). The second determines the minimum switching frequency while holding the average torque ripple less than the allowable value under various operating conditions. It is termed reduced switching frequency PWM (RSFPWM). Consequently, by simply changing the PWM method from conventional fixed switching frequency continuous PWM to the proposed PWM, MTRPWM and RSFPWM, simulation results show that the switching loss of the inverter driving a 3.5 MW induction motor is reduced to 51.6% while keeping the torque ripple in the allowable boundary, where MI is 1.12. This approach is applied to small-scale experimental sets consisting of an interior permanent magnet synchronous machine (IPMSM) motor-generator set, and an induction machine MG set in an effort to verify the validity and feasibility of the proposed method. Based on these experimental results, the cost indexes of the IPMSM and the induction machine, as defined in this paper, decrease by up to 66% and 77%, respectively, when the proposed method is applied when MI is 1.12 compared with the outcome with the conventional PWM. [ABSTRACT FROM AUTHOR]

This paper presents a novel single source fed isolated gate driver circuit based on the dual-forward converter topology. The two forward converters are paralleled at the secondary side to achieve 0%–100 $\%$ duty cycle range together with galvanic isolation. The gate driver switching frequency is independent of the main pulse-width modulation frequency (PWM). As a result, the gate driver switching devices and magnetics are designed for high frequencies independent of the main PWM frequency. At high frequencies, problems of resonance due to parasitics become significant. This paper discusses this problem and proposes a novel solution to mitigate it. In addition, this paper also presents a novel solution and circuit to produce negative gate pulse for miller clamp. The proposed circuit can be used for any application, irrespective of switching frequency, thus making it a wide band generalized gate driver. The circuit is analyzed and verified experimentally. [ABSTRACT FROM PUBLISHER]

In this paper, a new zero voltage zero current transition (ZVZCT) boost DC–DC converter using a coupled inductor is proposed. This topology provides the main switch ZVZCT for the turn-on and zero voltage switching (ZVS) for the turn-off. Moreover, the auxiliary switch turns on at zero current switching (ZCS) and turns off at ZVS. The main diode turns on with ZVT and turns off with ZCS, and other diodes also operate under soft-switching conditions. Besides, due to the coupling effect, the proposed converter improves efficiency additionally since resonant energy in the resonance tank could be transferred to the output, and the circulating current can be limited as well. The soft-switching can be realized in almost all the load rang. In this design, there always exist energy releasing circuits to conduct magnetic flux leakage currents, such that the surge currents are eliminated and switch current stress can be accordingly reduced. All the devices resonate in a unique direction within less than half of a resonance period, so power losses with respect to the resonance can be decreased. In this paper, the converter design and operation principles of the converter are given. It also has been verified by a 1-kW experimental prototype with switching frequency of 100 kHz, and the related experimental results are presented. [ABSTRACT FROM PUBLISHER]

This paper shows that there is great potential for saving money when reconfiguring distribution systems at an optimal frequency. Studies are conducted on hourly, daily, weekly, monthly, and seasonal reconfiguration plans, based on the 8760 hourly loads of a year. Switches that actively participate in the reconfiguration process are first identified. These sectionalizers are substituted by smart (remotely controlled) switches. According to the results, two economic indices: total savings and return on investment are used to determine the optimal switching frequency. Numerical simulations are conducted on three distribution systems including one with 119 buses that is commonly used as a benchmark for reconfiguration of large-scale distribution systems. The results reveal that there exist large potential gains on frequent switching reconfiguration. Therefore, detailed studies must be carried out to determine the benefits of the dynamic reconfiguration for particular distribution systems. [ABSTRACT FROM AUTHOR]

The main challenges for Finite Set-model Predictive Torque and Flux Control (MPTC) include huge calculation amount, large torque ripple, and the selection of weighting factor. To deal with these challenges and achieve the fastest torque response, a novel MPTC strategy with virtual voltage vector-based pattern is proposed in this paper. In each control period, a desired voltage vector is computed based on the maximum torque variation rate. The virtual desired voltage vector is combined by using basic voltage vectors with the minimum switching times. The switching pattern between two adjacent control periods is optimized by using a cost function in realtime. Compared with the traditional MPTC approach, the novel strategy has multifaceted improved performances: faster torque response, less calculation amount, lower switching frequency, reduced torque ripple, higher efficiency and no weighting factor. The proposed method is contrasted with traditional MPTC method and a well-known generalized multiple-vector-based MPC method via experiments. [ABSTRACT FROM AUTHOR]

This paper illustrates the design and an experimental test of a line-fed solid-state lamp driver based on the asymmetrical half-bridge flyback converter. Its favorable characteristics, in terms of soft-switching range and circuit complexity, allow the converter to operate at variable switching frequency in the range of 300–450 kHz, supplying 6 W to the load with good efficiency. The considered lamp is made up of five series-connected high-power light-emitting diodes (Cree XR-E) and is supplied with 350-mA closed-loop-regulated constant current. While presenting similar complexity and overall efficiency with respect to a conventional driver, due to an original feedforward control technique that allows shrinking the input filter capacitor, the proposed circuit allows a significant volume reduction and consequent power density improvement. [ABSTRACT FROM PUBLISHER]

In this paper, a new T-type inverter topology based on multistate switching cell is proposed. The topology presents five-level voltage before the output $LC$ filter, providing high-order harmonics that are easily filtered. In this topology, the output filter ripple frequency is twice the switching frequency, therefore reducing the magnetic weight and volume. Other characteristics of the inverter are current sharing through the devices, facilitating its losses' dissipation, due to increased contact area and few involved components in the current flow path. In order to verify its feasibility, a design example, as well as experimental results, for a 5-kW prototype is presented in this paper. [ABSTRACT FROM AUTHOR]

This paper proposes a transformerless dc–dc converter, which features a large voltage ratio, for medium-voltage dc (MVDC) applications. The proposed converter combines a boost converter with a series-parallel resonant converter which enables soft switching of the power switches and diodes. Further, the power switches and diodes of the proposed converter experience lower voltage stresses compared to the other topologies. The proposed converter is modular and, therefore, permits series and/or parallel connection of multiple units for the desired voltage and/or power ratings. This paper discusses the principles of operation, analysis, and design of the proposed converter. Simulation and experimental results are presented to demonstrate the effectiveness of the proposed converter. [ABSTRACT FROM AUTHOR]

The power efficiency and weight of present point-of-load (POL) dc–dc converters for drone applications are often compromised because they suffer from large switching losses at continuous conduction mode for heavy loads and excessive hardware overheads at discontinuous conduction mode for light loads. This paper presents a boundary conduction mode (BCM) control scheme for POL converters embodying a single operation mode. This is achieved by means of a hysteresis voltage controller to turn on/off the output power stage when necessary. The proposed BCM control scheme achieves high power efficiency (≥91.2%) over a wide load range (5 mA–1 A) by means of fully soft switching. Specifically, a hysteretic current controller is proposed to realize ZCS, and an adaptive dead time controller is proposed to realize ZVS. Further, the proposed BCM control scheme requires a small output inductor (0.82 μH) by means of designing the customizable peak inductor current. To verify the proposed BCM control scheme, we realize a BCM-based POL converter that features an input voltage range of 5–16 V, output voltage range of 2.5–8 V, switching frequency of 1.5 MHz, peak power efficiency of 96.8%, and ≤35 mV output voltage undershoot/overshoot for 1-A load step. When being benchmarked against state-of-the-art counterparts, the proposed design features the lowest voltage undershoot/overshoot, the highest switching frequency, ∼5.7× smaller inductor, and ∼11% higher power efficiency at light loads. [ABSTRACT FROM AUTHOR]

Grid connected voltage source converters are inevitable means now for expanding and supporting power systems. Nevertheless, their harmonic injection and high frequency switching may cause degradation of power quality and detraction of the equipment reliability. Therefore, the converters injected harmonics must observe the corresponding standards, while lower switching frequencies and rapid transient responses are desirable. In this paper, a new combined control method with a flexible switching table is presented for the converters to enhance the power quality and transient response. The method employs a virtual flux in connection with a combined control for the first time. In comparison with the conventional virtual flux direct power control, the proposed method provides better power quality, reduced THD and faster transient response, in addition to less grid parameters dependency. Compared to the conventional combined control method, it determines more accurately the converter voltage vectors, while avoiding grid voltage measurement and cumbersome controller tuning. [ABSTRACT FROM AUTHOR]

This paper describes the design, robustness analysis, and implementation of a zero average dynamics sliding mode control (ZAD–SMC) for a multiphase step-down converter. The ZAD–SMC operates at fixed switching frequency and allows to implement an interleaving technique providing current-ripple cancellation at the converter output. Moreover, the proposed control structure, which is based on a master–slave strategy, includes an equalization technique guaranteeing current sharing among the phases and avoiding undesirable power unbalance. Additionally, a stability analysis considering unmatched losses in the converter phases shows that the design provides asymptotic stability for the overall load range. The controllers are implemented in an FPGA, and all the expected features, such as fast transient response, robustness, fixed switching frequency, interleaving, and current equalization are sustained by the experimental results obtained from using a 1.5-kW prototype. [ABSTRACT FROM AUTHOR]

Wide bandgap semiconductors with fast switching speed capability are becoming an enabler to achieve the higher power density design. However, the further increase of switching frequency cannot continuously improve the power quality of ac-side waveforms in dc–ac/ac–dc application. The main reason is the distortion of pulsewidth modulation (PWM) voltage at switching point under high switching frequency. In general, there are two contributors causing PWM voltage distortions in bridge-based topologies. One is the deadtime, which occupies higher ratio in the small duty cycle case under high switching frequency and induces the voltage errors. The other one is the turn-off transient in the small load current or around the zero-crossing point of the ac-side current, because the relatively slow rising slope of the drain–source voltage will affect the right duty cycle. To solve this issue, this paper proposes a closed-loop modulation scheme to compensate the duty cycle distortion of PWM voltage based on one-cycle control or charge control. Compared to the traditional feedforward type of compensation, the proposed scheme does not need online calculation and instantaneous inductor current sampling, and it shows potential to be a general scheme for variety of topologies and modulations. Simulations and experiments are carried out on a 400-kHz single-phase full-bridge inverter with 400-Hz fundamental frequency to demonstrate the performance of the proposed approach. [ABSTRACT FROM AUTHOR]

In the no-load condition, LLC converter usually fails to regulate its output voltage although it operates at a high switching frequency. Till now, it is hard to obtain the exact relationship between design parameters and the maximum switching frequency for no-load regulation capability. In this paper, a specific criterion for no-load regulation of LLC converter is provided, without using active components or other modulation schemes. By analyzing the macroscopic switching period and microscopic switching transition in the no-load condition, it is shown that not only the peaking resonant current during the switching transition, but also the resonant tank design affect the no-load regulation of the LLC converter, which affects the no-load regulation capability. Furthermore, the relationship among design parameters is analyzed and the design guideline is also provided to achieve no-load regulation at the specified maximum switching frequency. To verify the effectiveness of the proposed design, 400 V input and 50 V/200 W output prototype is built and tested. [ABSTRACT FROM AUTHOR]

This paper presents a unified second-stage LC filter applied in the three-state switching cell buck–boost converter, which provides current and voltage with low ripple and low noise. The unified second-stage filter promotes a reduction in the number of devices while maintaining the filtering performance of the converter, with second-stage LC filters at the input and at the output. Moreover, the unified filter, when associated with a three-state switching cell buck–boost converter, allows a size reduction of filter devices, especially for designs with duty cycle range around 1/2. Furthermore, the unified filter arrangement provides nondissipative clamping of switching devices and reduce the system order when compared to the converter with second-stage LC filters. In this paper, the static and dynamic characteristics of the proposed converter in continuous conduction mode (CCM) are reported. Experimental data were obtained from a laboratory prototype with an input range of 32 $\sim$ 72 V, constant output of 48 V, a load of 150 W, and switching frequency of 45 kHz. The measured efficiency for the rated load was 97% for maximum input voltage. A comparison of the size and performance of the proposed filter with the topology that uses second-stage LC filters at the input and at the output is also presented. [ABSTRACT FROM AUTHOR]

The inductance is an important parameter impacting current ripple calculation, usually with the assumption that the designed inductance performs ideally in most of voltage source inverters (VSIs) applications. However, the initial permeability of magnetic material usually descends when the winding current reaches or goes beyond the saturation limit. In such region of saturation, the implemented inductor does not perform as expected in design stages and its value varies with the bias current. In this paper, analysis and calculation of the current ripple are presented for a three-phase VSI with powder cores-based inductors, which reveals the calculation error of current ripple caused by the soft saturation nature of powder cores. Based on the equivalent single-phase model, the influence of inductance saturation on current ripple can be quantitatively evaluated. Then, a comparison of the current ripple calculation between considering and ignoring inductance saturation of implemented inductors is drawn in detail. Furthermore, under the condition of inductance saturation, the output current ripple peak-to-peak value of three phases is used as the constraint for variable switching frequency pulsewidth modulation (VSFPWM) design. A comprehensive method is developed to compensate the effect of inductance saturation in VSFPWM. At last, the effectiveness of the proposed strategy is verified by the detailed simulation and experiment. [ABSTRACT FROM AUTHOR]

In this paper, a comprehensive sliding mode control (SMC) loop design for a CLLC resonant converter is proposed. The major objectives of the proposed SMC are to improve the converter dynamics and to achieve a tight output voltage regulation with respect to any parameter variations and external disturbances. The sliding surface coefficients are selected to ensure both large- and small-signal stability for the robustness of the converter under different operating conditions. Furthermore, system dynamic performances considering the error dynamics and overshoots are investigated. To validate the proposed algorithm, a hardware prototype of a bi-directional CLLC resonant converter for plug-in electric vehicle applications is developed and tested up to 1 kW, and the effectiveness of the proposed control solution is verified by the load transients and start-up tests. At a 100% step-change in load power, the SMC achieves 1 ms settling time, which is approximately 0.9 ms faster than the conventional proportional integral control strategy. [ABSTRACT FROM AUTHOR]

The advent of powerful digital signal processors has recently permitted the real-time implementation of model predictive control (MPC) in high-performance electric drives. Nevertheless, the use of MPC together with multiphase systems is increasingly challenging as the number of phases gets higher. On the positive side, the redundancy provided by the extra phases also opens the possibility to further optimize the control action. This paper describes the implementation of MPC for nine-phase drives using a three-step approach with an initial discarding of the switching states, a dynamic selection of the voltage vectors using hard constraints, and an improved performance including soft constraints. Experimental results confirm the ability of the proposed MPC to highly reduce the computational burden and switching frequency, while maintaining satisfactory steady state and dynamic performance. [ABSTRACT FROM AUTHOR]

This paper proposes the use of an artificial neural network (ANN) for solving one of the ongoing research challenges in finite set-model predictive control (FS-MPC) of power electronics converters, i.e., the automated selection of weighting factors in cost function. The first step in this approach is to simulate a detailed converter circuit model or run experiments numerous times using different weighting factor combinations. The key performance metrics [e.g., average switching frequency ($f_{{\rm sw}}$) of the converter, total harmonic distortion, etc.] are extracted from each simulation. This data is then used to train the ANN, which serves as a surrogate model of the converter that can provide fast and accurate estimates of the performance metrics for any weighting factor combination. Consequently, any arbitrary user-defined fitness function that combines the output metrics can be defined and the weighting factor combinations that optimize the given function can be explicitly found. The proposed methodology was verified on a practical weighting factor design problem in FS-MPC regulated voltage source converter for uninterruptible power supply system. Designed weighting factors for two exemplary fitness functions turned out to be robust to load variations and to yield close to expected performance when applied both to detailed simulation model (less than 3% error) and to experimental test bed (less than 10% error). [ABSTRACT FROM AUTHOR]

This paper proposes a multi-vector-based model predictive torque control with fixed switching frequency for a six-phase permanent-magnet synchronous machine to improve its steady-state performance. First, two active vectors are synthesized in each control period to suppress the stator current harmonics in x–y subspace. For the sake of easy implementation in the real-time system, the vectors are artfully synthesized in two different manners. Second, to achieve the fixed switching frequency, two null vectors are inserted along with the synthesized vector. The duty ratio of the null vectors is determined based on the principle of deadbeat torque control. In the meantime, the synthesized vector and its duty ratio are evaluated simultaneously by the cost function. In this way, the torque ripple can be reduced considerably. Thus, with the proposed method, both the current harmonics and the torque ripple are reduced effectively. Also, the proposed methodology can be readily implemented practically under the constant switching frequency. Finally, the experimentation is carried out to verify the validity of the proposed method. [ABSTRACT FROM AUTHOR]

A three-phase three-level (TPTL) converter is an optimal alternative for high-input and high-power dc/dc conversion system. The voltage stress on the primary switch is only half of the input voltage due to its three-level (TL) structure, and the current rating of power devices can be reduced by the three-phase configuration. To achieve soft switching and improve efficiency, the resonant tank can be introduced to optimize the performance of the converter. In this paper, a novel TPTL LC-type series resonant converter with few switches and simple configuration is proposed. The voltage stress on all switches can be reduced to the half of the input voltage, and the voltage across output rectifiers is clamped to the output voltage; as a result, the proposed converter is suitable for high-input/output applications. Meanwhile, the ripple frequency of the output current can be increased significantly, resulting in a reduced filter requirement. Variable frequency control strategy is adopted in order to obtain zero-voltage switching for all switches and zero-current switching for all rectifier diodes in wide input voltage and load range. In this paper, the comprehensive analysis on the proposed converter is carried out, including the operation mode classification, the operating mechanism under different operation mode, along with the circuit model, and gain characteristics of the converter by the fundamental harmonic analysis. Experimental results from a 440–590 V input and 400 V/5 A output are presented to verify the theoretical analysis and the performance of the converter. [ABSTRACT FROM AUTHOR]

This paper presents a single-switch isolated dc–dc converter suited for a very high-frequency switching operation, especially above 10 MHz. The converter features a small number of passive components, low-switching loss, and low-voltage stress on the switch. In order to achieve low-voltage stress while maintaining zero voltage switching, the voltage waveform across the switch is shaped by designing the resonant network of the converter. The resonant network includes main parasitic components, such as leakage inductances of the transformer and the junction capacitance of the switch. Furthermore, some resonant elements are entirely replaced by these parasitic components under the specific condition. This paper derives the conditions and then minimizes the number of passive components. To validate the design procedure and the performance of the proposed converter, a GaN-based prototype was implemented. It operates at 10 MHz and provides the output power of 10 W from the dc input voltage of 50 V. The output voltage is regulated to 20 V by the ON–OFF control. Experimental results show that the peak voltage on the switch is reduced to 2.2–2.3 times the dc-input voltage and the efficiency of 69% is achieved under the full load. [ABSTRACT FROM AUTHOR]