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A high-efficiency, high-power-density Sigma converter for a 48 V rack architecture in data centers is proposed in this paper. The Sigma converter is a quasi-parallel converter that uses a high-efficiency unregulated converter to deliver the bulk power to the load. A small buck converter is responsible for regulating the output voltage with prescribed dynamic responses. A design guideline for Sigma converter with integrated magnetics is provided in this paper. The unregulated converter is an LLC converter designed with a printed circuit board (PCB) winding matrix transformer, a structure which integrates four elemental transformers into one core. The buck converter is designed with discrete gallium nitride (GaN) devices and a PCB winding inductor. The proposed Sigma converter operates at 48 V input and 1 V-80 A output and can achieve a power density of 420 W/in3 as well as a peak efficiency of 94%. [ABSTRACT FROM AUTHOR]

This paper presents a novel integrated-stage light-emitting diode (LED) driver based on Flyback and resonant converters. The Flyback converter realizes power factor correction in the discontinuous conduction mode. The resonant converter is operated as a dc–dc converter to support the LED loads. Moreover, the resonant converter can clearly decrease the drain–source voltage of the active switch and exhibits zero-voltage-switch characteristics. Therefore, a cost-effective MOSFET can be chosen as the main control component that can decrease the cost of the whole system. Compared to a single-active-switch converter (such as Class-E converter), the number of passive components in the resonant converter can be limited to four. Therefore, the power density of the system can be improved drastically. In this paper, a 100-W prototype is presented under the experimental condition to validate the proposed integrated-stage LED driver. [ABSTRACT FROM AUTHOR]

A single-stage TRIAC (TRIode for alternating current switch) dimmable LED (light emitting diode) driver using a buck converter fed through a capacitor input rectifier provides many advantages such as small-scale implementation, low output current ripple, and stable dimming operation. This circuit topology, however, has a serious issue: A large inrush current to the smoothing capacitor. To solve this issue, this paper focuses on a bleeder circuit in the TRIAC dimmable LED driver. This paper presents the mechanism of the large inrush current issue and its relationship to a conventional bleeder circuit. Moreover, this paper proposes a turn-off delay controlled bleeder circuit. The proposed bleeder circuit is analyzed by using its discrete-time state-space model in order to set proper circuit parameters for inrush current reduction. Experimental results demonstrate the inrush current reduction by the proposed method, which leads to a 37% reduction of maximum input current, as well as proper dimming operation and low output current ripple. The proposed method achieves further small-scale implementation, which enhances the advantages of the intended main circuit topology. [ABSTRACT FROM AUTHOR]

In this paper, a series-capacitor-based interleaving buck power factor correction (PFC) converter is proposed, the intermediate energy storage capacitance of which is operated at discontinuous capacitor voltage mode (DCVM), and automatic power factor (PF) correction for this converter is obtained. Moreover, the voltage across the series capacitor of the proposed PFC converter is clamped at the input voltage, and thus peak voltage stress existed in the traditional DCVM buck PFC could be relieved. By effectively regulating the charge/discharge time for the series capacitor, ultrahigh step-down conversion ratio of the proposed converter is achieved, the conversion ratio of which is independent of the duty cycle and only related to the switching frequency and circuit parameters. Therefore, high PF can be obtained due to very narrow deadtime of the input current. Meanwhile, the proposed PFC converter can realize the soft turn-on of part power switch and soft turn-off of part power diodes. In addition, comparing with the traditional discontinuous inductor current mode PFC, the input current of the proposed PFC converter is continuous so that the peak value and root-mean-square value of input current can be reduced. The operational principle, performance analysis, and parameter design principle are given in this paper. The analysis results show that the PF and total harmonic distortion are also independent of the duty cycle. Finally, a 220-Vac input, 60 W/15 V output experimental prototype is built to verify the validity of the theoretical analysis. [ABSTRACT FROM AUTHOR]

This paper presents a high power factor (PF), low total harmonic distortion (THD) light-emitting diode (LED) driver with dimming capability. In addition, the proposed technique ensures a high PF and low THD at any dimming level. The driver is implemented by using an interleaved capacitor, which is placed between the rectifier and the integrated buck flyback converter (IBFC). In this way, the line current conduction angle is increased, which in return increases the PF and decreases the THD. The operation of the proposed converter ensures that one diode of the conventional IBFC will not conduct, so that it can be removed. Moreover, owing to the continuous power flow, the proposed technique makes a significant reduction of the converter output ripple. The paper presents a prototype of the proposed converter supplying an LED luminaire of 37 V/ 0.67 A. The prototype shows a high PF of 0.997, small THD of 2.5%, output current ripple of 6%, and an efficiency of 80%. [ABSTRACT FROM AUTHOR]

Power management integrated circuits (PMICs) with on-chip compensation are widely used to power multiple loads in mobile devices with increased power density. However, there are two issues for on-chip compensated PMICs. First, on-chip compensation reconfigurability is required to obtain the appropriate response in various passive components. Second, a converter for a processor requires adaptive voltage positioning (AVP) to reduce the output capacitor size. In this paper, a novel reconfigurable on-chip compensated current-mode buck converter with AVP is proposed to solve the aforementioned issues without requiring high-speed and high-resolution analog-to-digital converter (ADC). A reconfigurable accurate load line control scheme and on-chip compensation are proposed to achieve an accurate load line and AVP in various load lines and passive components. The control scheme, small-signal model, and circuit implementation are illustrated in this paper. The proposed buck converter was implemented into an integrated circuit to verify the analysis. [ABSTRACT FROM AUTHOR]

This paper proposes data transmission method between primary and secondary of the flyback converter without additional communication circuit while simultaneously transferring power. In some application such as a battery charger, the data exchanges between the primary and secondary sides are necessary. In the conventional system, an additional line or wireless communication modules is used for data exchanges, thereby increasing the system and connector size. The proposed system, in comparison, does not use additional signal transceiver but instead exchanges data by simply alternating operation mode of the flyback converter, thus adding communication function while not increasing the volume of the terminal and overall system. The waveform of transformer voltage is used to count the number of resonant pulses, which is used for decoding and encoding the data packet. Bidirectional communication between primary and secondary sides is possible while power is transferred to the output using an appropriate communication protocol. This paper proposes data transmission method for both single output and the multioutput cases. Also, both half-duplex and full-duplex communication using the proposed method is explained. The experimental results are presented to verify the performance of the proposed communication method. [ABSTRACT FROM AUTHOR]

Multioutput converters with single input source are currently studied as an alternative to conventional dc–dc topologies in order to improve power density in low-power multiload applications. This paper reviews three different ways in which a boost topology can be customized to supply multiple outputs. The first way uses a charge-sharing approach using individual switches to distribute inductor energy to different capacitors. The second method of creating a multiport converter (MPC) combines two converters with similar front end to generate two outputs using only one controlled switch. Using this method, a boost converter can be combined with single–ended primary–inductor converter (SEPIC), Cuk, and current source converter topologies. The third method uses time multiplexing of switches to produce two regulated ports and is referred to as switched-boost action. This method uses relatively less number of switches and allows regulation and control of all the outputs. Practical utility of switched-boost action based MPC is reported in this paper. This switched-boost MPC is applied to a renewable power converter system to interface a solar panel, a battery, and home loads to produce a 12-V and a 48-V bus. The 12-V bus is interfaced to battery and capable of optimally charging the battery in constant current–constant voltage (CC-CV) mode. The converter is demonstrated to operate with solar panel as it supplies a 12-V battery and a 48-V load bus. When the solar power is not available, the converter automatically goes into a mode in which the 12-V battery supplies the loads on the 48-V bus. [ABSTRACT FROM AUTHOR]

This paper proposes a ripple injection method in a two-stage intermediate bus architecture to overcome the incremental negative-impedance effect in the intermediate bus converter (IBC) induced by the constant power load, which is essentially a tightly regulated point of load (PoL) converter. The proposed method uses the voltage ripple of the intermediate bus in the feedback path for the closed-loop PoL converter while operating the IBC in open loop. The small-signal model is derived and verified using SIMPLIS simulation. The voltage ripple is shown to carry the inductor current information of the PoL converter. Thus, the proposed scheme is expected to retain the superior line regulation of current mode control for the PoL converter even without sensing the inductor current. Load current feed forward can improve the transient response for the PoL converter. Moreover, the load current information is also used to generate the appropriate duty ratio for the IBC during transient recovery. A simple PI controller is used for the PoL converter, which reduces the design complexity using the proposed control scheme. A hardware prototype is made, and the superior performance using the proposed control scheme is experimentally verified. [ABSTRACT FROM AUTHOR]

In this paper, a novel quasi-resonant flyback converter that mainly comprises two modules of flyback converters is proposed. A relay is connected in series to the input terminals of two transformers, and the transformer input structure is adjusted according to the input voltage to improve the conversion efficiency. In addition, a novel frequency-limiting quasi-resonant control strategy for solving the limitations of the conventional quasi-resonant control strategies is proposed, wherein the switching frequency is increased under light load conditions. Here, the current-mode pulsewidth modulation IC is used as the core controller. The operating principle and design parameters of the converter are analyzed and discussed in detail. The experimental results prove the feasibility of the proposed circuit. [ABSTRACT FROM AUTHOR]

This paper develops a 200 W two-stage rail grade dc–dc module based on gallium-nitride devices. It converts a wide input voltage (64–160 V) to a constant output voltage (24 V). Different devices and topologies are evaluated for the target application, based on which a two-stage configuration is proposed. The first stage is a two-phase regulated buck converter working under critical mode ($>$ 400 kHz), which is followed by an unregulated 48-V/24-V LLC converter (2 MHz) for 3000-V dc isolation. The voltage regulation is discussed for the buck converter when the inductors are negatively coupled, and then the zero voltage switching (ZVS) extension is explored. However, due to the limitation of the digital controller, a tradeoff is made between the dynamic response and the footprint. The compromise solution is to use a small and slow microcontroller for high frequency control (including voltage regulation, critical mode operation, phase interleaving) and various demands (including soft start-up, external communication, and various protections). Finally, all the required functions are verified in a standalone quarter-brick prototype module. It can achieve 95.1% peak efficiency and 130 W/in $^3$ power density. [ABSTRACT FROM AUTHOR]

This paper presents a method that overcomes the problem of the confusion during fast irradiance change in the classical maximum power point tracking (MPPT) as well as in model predictive control (MPC)-based MPPTs available in the literature. The previously introduced MPC-based MPPTs take into account the model of the converter only, which make them prone to the drift during fast environmental conditions. Therefore, the model of the photovoltaic (PV) array is also considered in the proposed algorithm, which allows it to be prompt during rapid environmental condition changes. It takes into account multiple previous samples of power, and based on that is able to take the correct tracking decision when the predicted and measured power differ (in case of drift issue). After the tracking decision is taken, it will be sent to a second part of the algorithm as a reference. The second part is used for following the reference provided by the first part, where the pulses are sent directly to the converter, without a modulator or a linear controller. The proposed technique is validated experimentally by using a buck converter, fed by a PV simulator. The tracking efficiency is evaluated according to EN50530 standard in static and dynamic conditions. The experimental results show that the proposed MPC-MPPT is a quick and accurate tracker under very fast changing irradiance, while maintaining high tracking efficiency even under very low irradiance. [ABSTRACT FROM AUTHOR]

In this paper, a two-stage transformerless multiple-output converter is proposed for applications requiring a high voltage step-down ratio. The proposed circuit transfers power via a current interface and the use of current-source-mode (CSM) converters, resulting in low voltage stress and drastically simplified control. The first stage of this configuration is regulated to provide a constant current to the second stage. The second stage consists of series-connected CSM boost converters. The high step-down ratio of the proposed configuration reduces the voltage stress in the switches of the second stage. The series-connected CSM converters are inherently independent of each other, leading to a very simple control scheme without the need for decoupling of the input voltage of the interconnected converters. Input voltage variation to the system will not affect the input voltage of the second stage. Load variation in one output will not affect the other outputs. If one or more CSM converters are shorted, there is no impact on other converters. These advantages enable a high scalability. Besides, the first stage of the proposed configuration can operate both in continuous conduction mode (CCM) and discontinuous conduction mode (DCM) with the same control strategy. This feature leads to a low control complexity and elimination of inductors. The performance of the proposed converter is illustrated with a laboratory prototype driving light emitting diodes (LEDs). [ABSTRACT FROM AUTHOR]

This paper presents a multi-period frame transient switching control (MP-TSC) scheme for buck converter with a controlled coupled inductor, aiming at improving the load transient response. The proposed buck converter utilizes a controlled coupled inductor as the output inductor. During a load transient, the coupled inductor is controlled as a small equivalent inductance so as to achieve fast transient regulation. While in the steady state, the coupled inductor behaves as a large inductance to reduce the output current ripple. Furthermore, on the basis of the proposed variable inductance circuit, an MP-TSC control scheme is proposed and implemented in a digital form. With the proposed control scheme, the load transient event is divided into n + 1 sub-periods, and in each sub-period, the capacitor-charge balance principle is used to determine the switching time sequence. Moreover, the control principle design and transient response index analysis are provided. Furthermore, its feasibility is validated in simulation and experiment with a 12–3.3V low-voltage high-current synchronous buck converter. Experimental results demonstrate that the voltage deviation of the proposed MP-TSC scheme (coupled coefficient of the controlled coupled inductor is 0.52) has improved by more than 79% compared to that with the auxiliary circuit disabled. [ABSTRACT FROM AUTHOR]

In this paper, a new soft-switching bridgeless single-phase power factor correction converter is introduced and analyzed. Employing an auxiliary flyback circuit, existing dead angle in the input current is eliminated while softswitching is achieved. The flyback converter processes only small amount of output power. Therefore, conduction losses of its bridge diode and semiconductor devices are low. Also, the auxiliary flyback converter provides soft-switching condition for buck switches. All semiconductors are turned on and off under soft-switching condition. In addition to reduction of switching losses, diode's reverse-recovery problems are eliminated due to soft-switching condition. The proposed approach takes advantage of operating under discontinuous conduction mode to shape the input current into sinusoidal form inherently. Experimental results are reported for a 120-W prototype at 110 Vrms input and 48-V output. The results demonstrate efficiency of 93% at nominal load condition. Furthermore, the input current harmonics fulfill IEC61000-3-2 (Class D) standard as well. [ABSTRACT FROM AUTHOR]

In this paper, several new coupled-inductor-based soft-switching dc–dc converters are proposed. These converters are obtained by changing the coupled branch of several existing dc–dc converters. Meanwhile they have similar characteristics to these existing converters, and provide more choices for the practical application. Then by applying an existing efficiency improvement method, which is used in the buck-type soft-switching converter, to all abovementioned converters, several new converters with efficiency improvement characteristics are obtained. This efficiency improvement method utilizes the low conduction performance of the transistor to reduce the loss. In addition, this method has the same control complexity to original topologies, because the auxiliary transistor has the same control timing to one of main transistors. The characteristic of new converters and efficiency improvement method are presented by analyzing two new topologies (boost-type converters). Finally simulation and experimental results are given and analyzed by designing a prototype. Based on these results, soft-switching conditions and efficiency improvement capability are verified. [ABSTRACT FROM AUTHOR]

A novel bipolar current source driver (CSD) for power MOSFETs is proposed in this paper. The proposed bipolar CSD alleviates the gate current diversion problem of the existing CSDs by clamping the gate voltage to a flexible negative value (such as -3.5 V) during turn-off transition. Therefore, the proposed driver is able to turn off the MOSFET much faster with a higher effective gate current. The idea presented in this paper can also be extended to other CSDs to further improve the efficiency with high output currents. The experimental results verify the benefits of the proposed CSD. For buck converters with 12 V input at 1 MHz switching frequency, the proposed driver improves the efficiency from 80.5% using the existing CSD to 82.5% (an improvement of 2%) at 1.2 V/30 A, and at 1.3 V/30 A output, from 82.5% using the existing CSD to 83.9% (an improvement of 1.4%). [ABSTRACT FROM AUTHOR]

This paper investigates basic stability properties of the three-level flying-capacitor Buck converter when operated under current-mode control (CMC). The proposed analysis is developed for both peak CMC (P-CMC) and valley CMC (V-CMC), and addresses both the static instability of the inductor current and the flying capacitor (FC) voltage runaway phenomenon. Conditions for avoiding current subharmonic oscillations are derived first, along with the expressions of the minimal compensation ramp, which guarantee current stability throughout the entire operating range. As for the stability of the FC voltage, P-CMC results to be inherently unstable unless the converter operates with a relatively large peak-to-peak inductor-current ripple, a feature not yet recognized in the literature. However, V-CMC results to be inherently stable once the static instability of the current is eliminated with an external compensating ramp—a property that has been highlighted in the literature but never formally proven. The proposed analysis is verified both using a simulation model and experimentally using a 3.3-V, 500-mA, 500-kHz prototype. [ABSTRACT FROM AUTHOR]

High step-down dc/dc converters are widely utilized in telecom and modern industrial applications. Due to the high step-down ratio, conventional Buck converter cannot provide satisfactory performance. To solve this problem, quite a few new topologies have been proposed to improve the performance of high step-down dc/dc converters, such as series-capacitor Buck (SC-Buck) converter, 3-level Buck converters, tapped inductor Buck converters, and LLC resonant converters. In this paper, the twice step-down benefit of SC-Buck converter and the zero-voltage switching benefit of series-capacitor tapped Buck (SC-TaB) converter are combined together to propose a new topology: interleaved series-capacitor tapped Buck (ISC-TaB) converter. To analyze the performance of the proposed ISC-TaB converter, the operation principles are discussed and the voltage conversion ratio is derived. In addition, to guide the design procedure and optimization, the current waveforms and voltage waveforms of the proposed ISC-TaB are derived. In order to verify the performance of the proposed ISC-TaB, hardware prototype of the proposed ISC-TaB converter and conventional two-phase series-capacitor tapped Buck converter (2ph-TaB) are designed and tested. The application is targeted at telecom with 48-V input and 3.3 V/20 A output. The test results are compared between these two converters. A peak efficiency of 95.6% is achieved on the proposed ISC-TaB and the efficiency of the ISC-TaB over all load range is at least 1% higher than that of 2ph-TaB. [ABSTRACT FROM AUTHOR]

In a power electronics system, an electrolytic capacitor (E-Cap) is widely used, whose performance degradation can be reflected by the change of capacitance (C) and equivalent series resistance (ESR). This paper proposes a new online C and ESR monitoring scheme for the output electrolytic capacitor in a discontinuous conduction mode (DCM) flyback converter. The mathematical relationship between the instantaneous capacitor voltage and other parameters is analyzed and then the scheme of undetermined coefficients based on the multiple-spot sampling and least square method is further proposed. In addition, considering the particularity of high ripple current and the resultant voltage ripple variation range, especially with the temperature, an inverse ripple voltage isolation amplifier with variable amplification factor and negative voltage elimination is put forward so as to make digital signal processor identify the temperature change easily. The proposed scheme is noninvasive as only voltage signals need to be sampled and no current sensor is necessary. A prototype is built and the experiments are made to verify the effectiveness of the proposed method, from which the data are in accordance with the results measured by an LCR meter. [ABSTRACT FROM AUTHOR]

Phase-to-neutral voltage or neutral-to-virtual neutral voltage zero-crossing points (ZCPs) detection method is usually used for sensorless brushless dc motor commutation control. Unfortunately, neither of them can be realized in lower speed range. In this paper, a simple commutation point detection method is proposed based on detecting inactive phase terminal to dc-link midpoint voltage. It eliminates the requirement of neutral wire or virtual neutral voltage and provides an amplified version of back electromotive force at the ZCPs which makes the lower speed range detection possible. As the speed increases, commutation point error is enlarged due to the low-pass filter. Utilizing the symmetry of the terminal to midpoint voltage, the phase error can be corrected. However, due to the nonlinear relationship between the detected voltage difference and phase error, it is difficult to regulate the error fast and robustly. Therefore, a novel phase regulator based on fuzzy neural network is proposed in this paper with simple structure and learning ability. The validity of the proposed ZCPs detection method and commutation instant shift correction method are verified through experimental results. [ABSTRACT FROM AUTHOR]

Inductor current is an important feedback parameter in synchronous buck converters (SBCs). It is used for overcurrent protection, current sharing among interleaved modules, and current-mode feedback regulation, among others. While implementing a digital controller, inductor current is sensed and fed into the controller through a high sampling frequency analog to digital converter (ADC). As the switching frequency of the converter becomes higher, the need for an even higher sampling frequency ADC also goes up, which is a distinct disadvantage in terms of the overall cost. This paper discusses a simple current estimation technique that avoids use of any expensive current sensor and high sampling frequency ADCs. The paper shows that in a buck converter, inductor current can be estimated by tracking the width of the switch node voltage. Implementation and limitations of the proposed current estimation scheme are discussed in detail. The proposed method is validated using a 3.3 V–15 A SBC prototype and results show the estimation technique is accurate within 5% with a converter switching frequency of 800 kHz. In order to prove the effectiveness of the technique in feedback regulation, the current estimation technique is used to implement average current mode and hysteretic current mode control on a SBC. To prove the effectiveness of the proposed current estimation scheme, it is used in closed-loop control of the SBC to verify the dynamic responses, such as start-up transient, step change in load, and reference. [ABSTRACT FROM AUTHOR]

This paper develops a 200-W wide-input-range (64–160-to-24-V) rail grade dc–dc converter based on gallium nitride devices. A two-stage configuration is proposed. The first regulated stage is a two-phase interleaved buck converter ($>$ 400 kHz), and the second unregulated stage is an LLC (2-MHz) dc transformer. In order to achieve high frequency and high efficiency, the critical-mode operation is applied for the buck converter, and the negative coupled inductors are used to reduce the frequency and the conduction losses. Then, a systematical methodology is proposed to optimize the planar-coupled inductors. For the unregulated LLC converter, it can always work at its most efficient point, and an analytical model is used to optimize the planar transformer. Finally, the proposed dc–dc converter, built in a quarter brick form factor, is demonstrated with a peak efficiency of 95.8% and a power density of 195 W/in $^3$. [ABSTRACT FROM AUTHOR]

In this paper, a sequence switching control (SSC) scheme based on an auxiliary parallel inductor is proposed to improve the transient performance of buck converters. The proposed SSC scheme introduces a small controlled inductor in parallel with the output inductor, so as to increase the inductor-current slew rate when it is activated during a load transient. Furthermore, an “n+ 1” sequence switching strategy is proposed to control the auxiliary parallel inductor. The proposed scheme divides the transient event inton+ 1 periods. In the formernperiods, the same small output voltage deviations are designed, while in the last period, a smaller deviation is done for a smooth transition from the transient to the steady state. The switching sequence is derived applying the capacitor–charge balance principle for each ofn+ 1 periods. For a given buck converter in the experiment, the settling time and the output voltage deviation of the proposed SSC scheme enhance more than 50% and 67%, respectively, over those of the time-optimal control for a 3-A load step. [ABSTRACT FROM AUTHOR]

Parallel-form switch-linear hybrid (SLH) envelope tracking (ET) power supply is constituted by a linear amplifier and a switched-mode converter connected in parallel. The switched-mode converter is usually implemented by a buck converter with hysteresis current control. However, the slew rates of the load current and the inductor current of the buck converter cannot match well when the slew rate of the load current has a wide variation range. The unmatched slew rates will lead to a high switching frequency of the buck converter or a large loss of the linear amplifier, which degrades the overall efficiency. In this paper, a multilevel converter is adopted to replace the buck converter in the parallel-form SLH ET power supply, and the hysteresis current control scheme is proposed for the multilevel converter to dynamically adjust its inductor current slew rate to approach that of the load current to improve the overall efficiency. The optimal design for the efficiency-related parameters including the inductor, the current hysteresis, and the number and values of the voltage levels in the multilevel converter is given. A prototype of the parallel-form SLH ET power supply with hysteresis current controlled multilevel converter is fabricated and tested in the lab. The measured overall efficiency is 79.4% when tracking the envelope of wideband code division multiple access signal with 5 MHz bandwidth and outputs 18 W average power, and a 3.8% efficiency improvement is achieved over that with the hysteresis current controlled buck converter. [ABSTRACT FROM AUTHOR]

This paper presents a deadbeat-based method for the single-inductor multiple-input multiple-output (SI-MIMO) dc–dc converter. By solving the cross regulation problem of the SI-MIMO dc–dc converter, the proposed method is capable of achieving the input current regulation (ICR) and the output voltage regulation (OVR) simultaneously. Moreover, the output current observers are adopted to replace the output current sensors, which are required by the conventional model based methods for dc–dc converters. The proposed control approaches including ICR and OVR are discussed in detail. To verify the effectiveness of the proposed deadbeat-based method, simulation runs and experiments are conducted on the single-inductor dual-input dual-output buck converter simulation platform and hardware prototype, respectively. The simulation and experimental results are analyzed in detail, and the comparison with the previous works is conducted. [ABSTRACT FROM AUTHOR]

Single-phase ac light-emitting diode (LED) lamps require long-lifespan and high-efficiency ac–dc power converters for power factor correction (PFC) and current regulation. In such converters, the inherent double-line-frequency ripple power from the ac source is isolated from the load by large electrolytic capacitors (E-caps) or E-cap-less active circuits to improve reliability and lifespan. This paper presents an ac–dc LED driver with an additional active rectifier and a unidirectional auxiliary circuit for ripple power isolation. As compared with other similar designs, the proposed LED driver operates with reduced redundant power processing and a lower voltage on the storage capacitor, and the additional active circuits include fewer power components. The prototype with small polymer-hybrid capacitors and ceramic capacitors is separately tested in the experiment. [ABSTRACT FROM AUTHOR]

This paper presents a hybrid supply modulator (SM) including a buck-boost (BB) converter, which has wide battery operating range for cellular envelope tracking (ET) applications. The proposed SM supports both ET and average power tracking (APT) mode depending on the power amplifier (PA) output power level. The output voltage swing of SM is boosted up to 4.5 V by the integrated BB converter as a supply of a linear amplifier. The dynamic-controlled BB output increases ET operating range, whose efficiency is higher than that of APT, by scaling down the supply voltage of the linear amplifier according to the PA output power level. A selective supply voltage of a switching amplifier and a reverse current sensing circuit are employed to prevent the reverse current through the power inductor of the switching amplifier. The proposed automatic current ratio controller between the linear amplifier and the switching amplifier provides the robust performance against the battery voltage variation of 3.2–4.6 V. A programmable bias current of the class-AB output buffer and a programmable hysteretic comparator are employed to achieve the optimum efficiency and bandwidth depending on the operating signal bandwidth. Optimal control for low signal bandwidth applications such as voice over Long-Term Evolution (LTE) with the selective notch filter provides the maximum efficiency of 88.2% with −135 dBm/Hz output noise. The proposed SM supports the LTE 20-MHz envelope signal with 78% efficiency at 800-mW output. Adapting the designed SM to frequency-division duplex Band3 radio frequency PA, the implemented ET-PA achieves the power added efficiency of 41.6% at 27-dBm PA output power while achieving −40 dBc of E-UTRA ACLR and −137 dBm/Hz of receiver band noise. The chip is implemented in the 0.13- $\mu \text{m}$ CMOS process, and the die size is 5 mm2. [ABSTRACT FROM AUTHOR]

A single-inductor multiple-output (SIMO) dc–dc converter with output-voltage-aware charge control (OVACC) is presented in this paper. The OVACC scheme reduces the cross regulation by computing the total energy required by all outputs to extract exactly the same amount of energy from the input. Moreover, the proposed design also extends the load capability range of the SIMO converter by supporting the operation in both continuous conduction mode and discontinuous conduction mode while boosting the overall power efficiency. The proposed SIMO (five outputs) dc–dc converter has been implemented in a 0.18 μm 1P6M CMOS process. Measurement results show that the best cross regulation is 0.016 mV/mA when the output current of 250 mA abruptly changes. And no cross regulation is observed when the first output current changes 150 mA, the second output current changes 160 mA, the third and fourth output currents change 180 mA, and the last output current changes 250 mA. Also, the measured peak power efficiency is 86%. [ABSTRACT FROM AUTHOR]

The power delivery system (PDS), which plays a crucial role in guaranteeing the proper functionality of computing systems, has been a serious constraint on performance due to its significant power loss, especially for high-performance many-core processors. As the PDS design is usually optimized to provide power to the target chip at its best performance level, the energy efficiency can be notably degraded when the workload of the processors is highly dynamic. Therefore, dynamically adjusting the PDS to adapt to the run-time chip workloads are expected to be beneficial. In addition, the introduction of on-chip voltage regulators (VRs) has also significantly broadened the design space of PDS. In this paper, we present a workload-aware quantized power management scheme to dynamically manage the PDS in order to improve system energy efficiency. VRs at different stages are scheduled as online or offline based on chip workload estimation and prediction. The simulation results show that with the proposed scheme, a hybrid PDS with on/off-chip VRs can achieve 74.6% overall efficiency on average, 12.7% higher than a conventional PDS with one off-chip VR. The proposed scheme also shows its potential advantage in improving system energy efficiency with large-scale many-core processors and with more advanced processor technology nodes. [ABSTRACT FROM AUTHOR]

A photovoltaic (PV) microinverter converts the dc from a PV panel to ac directly, which has the advantages of improved energy harvesting, friendly “plug-and-play” operation, enhanced flexibility/expandability, excellent system redundancy, and no dc cabling/safety issue; therefore, it is an attractive solution for the grid-connected PV system. In ac PV module applications, the features such as power density, reliability, efficiency, and reactive power capability are essential for the microinverters. In order to overcome the drawbacks of the conventional microinverters, including the power density/reliability issues caused by the bulky input capacitors and the limited output reactive power capability, a three-phase microinverter without energy storage capacitors is proposed in this paper. The proposed microinverter consists of a flyback stage, a third-harmonic injection circuit, and a line-commutated current-source-type inverter. The flyback stage realizes maximum power point tracking, while the third-harmonic injection circuit is responsible for output power factor correction. In addition to having the potential of achieving compact structure, long lifetime, and high efficiency, the developed microinverter provides extended output reactive power control range and three-phase balanced output. Finally, the proposed topology and the method are verified by simulations and experimental results. [ABSTRACT FROM AUTHOR]

This paper proposes a current mode hysteretic buck converter with auto-selectable frequency locking. In this work, the hysteresis of the hysteretic comparator and the resistance of the feedback network are adjusted simultaneously to fix the switching frequency. The proposed switching frequency locking scheme can improve the power efficiency and fix the spectral components of the output at specific frequencies by suitably lowering the switching frequency under light load conditions. Implemented in a 65 nm complementary metal oxide semiconductor (CMOS), the proposed converter achieves peak efficiency of 96.5% for a 3.3 V input with less than 1.2% frequency error while locking at 1, 0.5, and 0.25 MHz. [ABSTRACT FROM AUTHOR]

Parasitic capacitance has a considerable impact on conductive electromagnetic interference (EMI), especially on the common mode (CM) noise. In vehicular applications, such as more electric aircraft and electrical vehicles, the value of CM stray capacitance can vary during the drive cycle, due to some change in environmental, and operating conditions, resulting in fluctuations in EMI level. Designing EMI filters according to potentially overestimated CM capacitance results in additional weight, volume, and cost which should be avoided. In this paper, for the first time, the parasitic capacitance relevant to CM noise is estimated in real-time using unscented Kalman filter (UKF). The UKF is employed due to its ability in dealing with nonlinearity and stochastic nature of the EMI as well as the measurement noises. The proposed method is tested on a typical dc–dc buck converter in different operating conditions. The effectiveness of the proposed method is tested using some hardware-in-the-loop experiments using dSPACE1104 development platform. [ABSTRACT FROM AUTHOR]

This paper introduces a new nonlinear voltage-mode controller for a PWM dc-dc buck converter operating in continuous conduction mode. The sliding-mode control technique is used to derive a simplified equivalent control law based on the averaged dc-dc buck converter dynamics. As opposed to the reported design approaches, the proposed control scheme only requires the output voltage in the feedback loop without the need to the capacitor current. Thus, the analogue implementation cost is reduced and the drawback of adding a capacitor current sensor to the power converter is eliminated. The control equation is realized in a simple analogue circuit using few op-amps and resistors, which is suitable for industrial applications. The system modeling and control design procedure along with the derivation of the existence and stability conditions are presented. The control system performance is analyzed using MATLAB and SaberRD simulations. Furthermore, a simple analogue prototype of the simplified nonlinear voltage-mode controlled dc-dc buck converter is developed on a PCB. The simulation and experimental results show that the controller maintains a constant switching frequency, exhibits fast transient response, and provides good tracking performance under large disturbances. [ABSTRACT FROM AUTHOR]

In this article, a high-power-density off-line light-emitting diode (LED) driver is proposed. The proposed ac–dc driver is the novel integrated buck and boost converter (IBBC). Besides the high-power-density, the converter shows a high power factor (PF), and a low total harmonic distortion (THD). The IBBC is a two-stage driver that features just one controlled switch, which leads to high PF and low THD operation ensuring high efficiency, and size and cost reduction. Moreover, the switch current is minimized as it conducts the higher of the buck or boost converter, but not the addition of both as in other integrated converters. Moreover, for a further increase of the power-density, a magnetic integration is made by integrating the two inductors of both the buck and boost converters in one core. Thus, the proposed converter has been named as fully integrated buck and boost converter (FIBBC). In this paper, the IBBC is analyzed, and a design methodology is proposed. Also, this article presents a magnetic analysis of the novel FIBBC. In addition, a comparison between two prototypes is presented, one for the IBBC and another for the FIBBC, both of them supplying an LED luminaire of 46 V/ 0.575 A. The FIBBC shows a high PF equal to 0.994, very small THD of 10%, output current ripple of 6%, and efficiency of 92.62%, which represents a landmark on the efficiency of integrated converters. [ABSTRACT FROM AUTHOR]

In this paper, the effect of equivalent series resistance (ESR) of an output capacitor on the performance of a constant-on-time (COT)-controlled buck converter is studied, and a pulse bursting phenomenon is revealed. It indicates that the ESR of the output capacitor is one of the key factors causing pulse bursting phenomenon in COT-controlled buck converters, and the critical ESR is derived via time-domain analysis and stability analysis in the s-domain. It is pointed out that, when the ESR of the output capacitor is smaller than the critical ESR, pulse bursting phenomenon occurs; otherwise, it disappears. Simulation and experimental results are provided to verify the theoretical analysis results. [ABSTRACT FROM AUTHOR]

This paper presents a novel hysteretic controller for a multiphase synchronous buck converter supplying low voltage, high current, and high slew-rate loads. The control scheme implements the main control functions for powering such demanding loads, including output-voltage regulation, adaptive voltage positioning, current sharing, and phase interleaving. This paper also describes a control-design methodology based on output-impedance analysis. This design leads to optimal output-voltage transient response with a simple and low-cost control implementation. Simulation and experimental results are reported in order to validate the features of the novel control scheme. [ABSTRACT FROM AUTHOR]