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The work described herein applies a patented integrated silicon carbide (SiC) bipolar junction transistor (BJT) to the detection of ultraviolet (UV) light in situ for extreme-temperature environments. An integrated SiC BJT provides four important capabilities for UV detection in extreme environments: (1) The miniaturization of detectors and readout circuits through micron-scaled integrated circuit (IC) lithography; (2) the high-temperature operation of SiC ICs; (3) long-term reliability of SiC at high temperatures; and (4) the deep-UV responsivity of 4H-SiC. The design, manufacture and electrical characterization of a SiC photo-transistor is described. Photonic characterization of the photo-transistor responsivity in the vacuum ultraviolet (VUV) and near UV is analyzed. It will be shown that integration of the photo-transistor with SiC CMOS [1] advances the state-of-the-art to a photo-BiCMOS capability. The advancement of the state of the art is validated in both terrestrial and space-born applications, specifically (1) the patent-pending detection of the ultraviolet signature produced by the charge-compression auto-ignition of diesel fuel in a working 4-stroke engine, and (2) the measurement of Solar UV intensity in Low-Earth Orbit (LEO).

In this work, the first reported integrated silicon carbide (SiC) CMOS gate driver is presented. The gate driver is designed in a 15V, 1.2 µm silicon carbide CMOS process, and simulated from 25 °C to 300 µC. The gate drivers are packaged and tested over a wide temperature range. Measured peak output current exceeds the 4 A source, 8 A sink current design goals at room temperature. The measured gate driver rise and fall times are 74.2 ns and 36.8 ns, respectively, while driving a SiC power MOSFET at a package temperature above 500 µC. Switching operation is demonstrated while at temperature.

In this work we present a method for the identification of trace characteristics of oblique ionograms allowing determination of the Maximum Usable Frequency (MUF) for communication between the transmitter and receiver. The algorithm automatically detects and rejects poor quality ionograms. An exploratory test of the algorithm has been performed using data from a campaign of oblique soundings between the ionosondes of Rome, Italy (41.90 N, 12.48 E) and Chania, Greece (35.51 N, 24.01 E) and also between the ones of Kalkarindji, Australia (17.43 S, 130.81 E) and Culgoora, Australia (30.30 S, 149.55 E). The success of these tests demonstrates the applicability of the method to ionograms recorded by different ionosondes in various helio-geophysical conditions.

A series of “standard” parts for use in extreme environments based on high-temperature silicon carbide complimentary logic is presented. High temperature results and statistical samples are used to demonstrate the maturity of the parts for extreme environment applications.

An asynchronous NULL Convention Logic (NCL) gate library is developed for applications in space environment with temperatures ranging from −196° C to 125° C with radiation exposure. To further improve radiation-immunity and temperature-stability dual high-density metal-insulator-metal (DMIM) capacitor-based delay elements (based on DMIM capacitors available in the IBM 9HP process) and an asynchronous Dual Interlocked Cell (DICE)-based DFF are introduced. Results from temperature simulation and radiation analysis are shown.

This paper describes the simulation and test results of a family of analog and mixed signal circuits in silicon carbide CMOS technology at temperatures of 300°C and above. As SiC and wide bandgap devices in general grow in popularity for efficient and stable operation in high temperature and harsh environment applications, CMOS SiC integrated circuits can open up a new frontier of opportunity for miniaturization and system dependability. The building block circuits presented here can serve as the basis of rugged SiC system-on-chips for extreme environment applications.

This paper presents a 90 nm SiGe BiCMOS comparator designed for extreme environment use. A unique circuit characteristic of this comparator topology is that it uses only one NMOS transistor in the circuit. The rest of the circuit is comprised of PMOS transistors and NPN HBTs in order to maintain radiation hardiness. The circuit was simulated across a temperature range of −195 °C to 155 °C. The circuit was simulated at cryogenic temperatures using several models developed at the University of Arkansas (UA) and at Georgia Tech. The comparator produces a maximum resolution of 500 µV with an input range of 0.05–0.6 V in a 1.2 V process. A maximum propagation delay of less than 20 ns was also achieved. These specifications were based off of its intended application in a successive approximation register analog-to-digital converter also being developed at the UA as part of a NASA Space Technology Research Opportunities-Early Stage Innovations (STRO-ESI) project.

This paper presents the testing results of an all-silicon carbide (SiC) intelligent power module (IPM) for use in future high-density power electronics applications. The IPM has high-temperature capability and contains both SiC power devices and SiC gate driver integrated circuits (ICs). The high-temperature capability of the SiC gate driver ICs allows for them to be packaged into the power module and be located physically close to the power devices. This provides a distinct advantage by reducing the gate driver loop inductance, which promotes high frequency operation, while also reducing the overall volume of the system through higher levels of integration. The power module was tested in a bridgeless-boost converter to showcase the performance of the module in a system level application. The converter was initially operated with a switching frequency of 200 kHz with a peak output power of approximately 5 kW. The efficiency of the converter was then evaluated experimentally and optimized by increasing the overdrive voltage on the SiC gate driver ICs. Overall a peak efficiency of 97.7% was measured at 3.0 kW output. The converter s switching frequency was then increased to 500 kHz to prove the high frequency capability of the power module was then pushedmore » to its limits and operated at a switching frequency of 500 kHz. With no further optimization of components, the converter was able to operate under these conditions and showed a peak efficiency of 95.0% at an output power of 2.1 kW.« less

A gate driver fabricated in a 2-um 4H silicon carbide (SiC) process is presented. This process was optimized for vertical power MOSFET fabrication but accommodated integration of a few low-voltage device types including N-channel MOSFETs, resistors, and capacitors. The gate driver topology employed incorporates an input level translator, variable power connections, and separate power supply connectivity allowing selection of the output signal drive amplitude. The output stage utilizes a source follower pull-up device that is both overdriven and body source connected to improve rise time behavior. Full characterization of this design driving a SiC power MOSFET is presented including rise and fall times, propagation delays, and power consumption. All parameters were measured to elevated temperatures exceeding 300 C. Details of the custom test system hardware and software utilized for gate driver testing are also provided.

Limitations of silicon (Si) based power electronic devices can be overcome with Silicon Carbide (SiC) because of its remarkable material properties. SiC is a wide bandgap semiconductor material with larger bandgap, lower leakage currents, higher breakdown electric field, and higher thermal conductivity, which promotes higher switching frequencies for high power applications, higher temperature operation, and results in higher power density devices relative to Si [1]. The proposed work is focused on design of a SiC gate driver to drive a SiC power MOSFET, on a Cree SiC process, with rise/fall times (less than 100 ns) suitable for 500 kHz to 1 MHz switching frequency applications. A process optimized gate driver topology design which is significantly different from generic Si circuit design is proposed. The ultimate goal of the project is to integrate this gate driver into a Toyota Prius plug-in hybrid electric vehicle (PHEV) charger module. The application of this high frequency charger will result in lighter, smaller, cheaper, and a more efficient power electronics system.

Modeling the energy generation of photovoltaic power plants with large DC/AC ratios can result in an over-prediction of energy due to the hourly averaging of measured irradiance data. This is caused, in part, by the over-estimate of convertible solar irradiance during times when inverters transition into or out of a mode of operation where they are clipping energy. During these transition hours, the excess solar irradiance at small time scales that cannot be converted into AC energy due to clipping will be incorporated into the hourly averaged irradiance resulting in an over-estimate of the solar resource and, consequently, AC energy as well. Preliminary findings suggest that this effect can be as large as 13% during peak irradiance hours and 0.2% to 0.3% annually.

The State-of-the-Art in Rad-Hard and Wide-Temperature IC Fabrication is briefly reviewed, then extensions to the design range of an existing HTSOI process are described. NULL Convention Logic is described in relation to temperature and radiation insensitivity. Finally, an 8-bit data transfer system is described and simulated using NCL and the HTSOI process. The system shows good results over a 400° C operating range.

Pneumatic, non-contact end effectors for robotic pick-and-place applications use compressed air to provide an adhesion force based on the Bernoulli principle, which creates a low pressure region near the surface of the end effector. However, consideration of the influence of the Bernoulli principle alone gives an inadequate account of the performance of some end effector designs. In fact, end effector geometry can be constructed in such a way that the Bernoulli principle provides only a small contribution to the overall adhesion force. This paper investigates the role of viscous flow entrainment in improving adhesion efficiency. Both simulation and experimental results show a significant improvement of adhesion force by nearly five times over a commercially available Bernoulli gripper, which makes the improved adhesion mechanism suitable for more demanding wall climbing robotic applications.

Filtronic Compound Semiconductors has developed the first 0.15μm process on 150mm GaAs pHEMT using deep UV stepper based technology for millimeter wave applications. The use of stepper technology allows for improved throughput and yield compared to E-beam lithography. The process has an FT of 85GHz with breakdown voltage of 15V and is ideally suited for power applications up to 40GHz. The pHEMTs have demonstrated output power of more than 1W/mm that to our knowledge is the highest reported power from a 0.15μm GaAs pHEMT process.

A family of X-Band MMIC power amplifiers using a low cost GaAs pHEMT process is reported. The stepper based volume 0.5 micron and 0.25 micron GaAs pHEMT processes utilize 4 inter-level metallisation and four dielectric layers for high frequency performance whilst maintaining the economies of scale of 150 mm (6") diameter substrates. The fabricated GaAs X-Band PA MMICs exhibit 5 W to 10 W RF output power under pulsed conditions; 16 dB of power gain and power added efficiencies approaching 40%. Excellent repeatability and high yields over a number of wafers have been demonstrated. The design and GaAs process approach taken here with DUV stepper and 150 mm wafer diameter will lead to a significant cost reduction for high performance power amplifier MMICs up to 30 GHz.