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In multi-electrode arrays (MEAs), for electrical recording and electrical stimulation, high voltage (HV) switches are employed to build an analog multiplexer to conduct either a HV stimulation signal from the pulse generator circuit to an electrode or a low-voltage noise-sensitive signal from the electrode to a recording stage. In this brief, a new circuit structure is proposed for HV switches that significantly improves their switching speed, reduces their power dissipation, and also employs a minimum number of bulky HV devices. In order to reduce the transition time of the proposed switch without consuming a large amount of power, during the transition time that the switch is turning on/off, a large current flows through the driver circuit of the switch to turn the switch on/off rapidly; however, after the transition times, this current is significantly reduced to save power. Based on the proposed HV switch, a multiplexer structure has been implemented in 25-V, 0.18- $\mu \text{m}$ CMOS IC technology and the measurement results prove its efficacy. Supplied with 25 V and operating with 300 nA current consumption, this switch swings over 20 V with a relatively constant on-resistance of $100 \Omega $ and features a 80 ns transition time. [ABSTRACT FROM AUTHOR]

Closed-loop vagus nerve stimulators (VNSs) are used to treat refractory epilepsy (RE) and provide an alternative treatment modality with fewer side effects for RE. This work proposes a closed-loop VNS that senses the scalp EEG via a wearable EEG recorder (WER) and stimulates the vagus nerve via an implantable VNS (IVNS), the combination of which is referred to as a “HybridVNS”. First, the architecture and system control (by an App) of the HybridVNS are presented. Next, discrete component implementations of its key building blocks including the multichannel preamplifier, pulse generator and wireless power link are provided. Further, a 4-channel preamplifier magnifies the recorded EEG signals, and each channel consists of a capacitively coupled instrumentation amplifier (CCIA) cascaded by a 2nd-order low pass filter. The measured gain and the input-referred noise (IRN) of the preamplifier are 45.8 dB and 4.9 ${\mu}$ Vrms (1 Hz–200 Hz), respectively. We propose a switched-resistor array pulse generator for constant-current stimulation, and a novel distance-frequency adaptive inductive coupling link (DFAICL) to automatically tune the resonance frequency. A maximum wireless power transmission efficiency of 17% is achieved in the DFAICL when the supply power is 30dBm and the distance is 20 mm at 2 MHz. Finally, we demonstrate that in the WER, the onset of an epileptic seizure can be detected by a threshold of coastline length (294 ${\mu}$ V) combined with a threshold of slope (7.3 ${\mu}$ V/ms) within a unit time segment (780 ms), which provides an average accuracy of 88.2%. The feasibility of the IVNS was tested in an acute rodent epilepsy experiment. However, the closed-loop experiment was not conducted. [ABSTRACT FROM AUTHOR]

For mm-sized implants incorporating silicon integrated circuits, ensuring lifetime operation of the chip within the corrosive environment of the body still remains a critical challenge. For the chip's packaging, various polymeric and thin ceramic coatings have been reported, demonstrating high biocompatibility and barrier properties. Yet, for the evaluation of the packaging and lifetime prediction, the conventional helium leak test method can no longer be applied due to the mm-size of such implants. Alternatively, accelerated soak studies are typically used instead. For such studies, early detection of moisture/ion ingress using an in-situ platform may result in a better prediction of lifetime functionality. In this work, we have developed such a platform on a CMOS chip. Ingress of moisture/ions would result in changes in the resistance of the interlayer dielectrics (ILD) used within the chip and can be tracked using the proposed system, which consists of a sensing array and an on-chip measurement engine. The measurement system uses a novel charge/discharge based time-mode resistance sensor that can be implemented using simple yet highly robust circuitry. The sensor array is implemented together with the measurement engine in a standard 0.18  $\mu$ m 6-metal CMOS process. The platform was validated through a series of dry and wet measurements. The system can measure the ILD resistance with values of up to 0.504 peta-ohms, with controllable measurement steps that can be as low as 0.8 M $\Omega$. The system works with a supply voltage of 1.8 V, and consumes 4.78 mA. Wet measurements in saline demonstrated the sensitivity of the platform in detecting moisture/ion ingress. Such a platform could be used both in accelerated soak studies and during the implant's life–time for monitoring the integrity of the chip's packaging. [ABSTRACT FROM AUTHOR]

In order to recruit neurons in excitable tissue, constant current neural stimulators are commonly used. Recently, ultra high-frequency (UHF) stimulation has been proposed and proven to have the same efficacy as constant-current stimulation. UHF stimulation uses a fundamentally different way of activating the tissue: each stimulation phase is made of a burst of current pulses with adjustable amplitude injected into the tissue at a high (e.g., $\text{1 MHz}$) frequency. This paper presents the design, integrated circuit (IC) implementation, and measurement results of a power efficient multichannel UHF neural stimulator. The core of the neurostimulator is based on our previously proposed architecture of an inductor-based buck–boost dc–dc converter without the external output capacitor. The ultimate goal of this work is to increase the power efficiency of the UHF stimulator for multiple-channel operation, while keeping the number of external components minimal. To this end, a number of novel approaches were employed in the integrated circuit design domain. More specifically, a novel zero-current detection scheme is proposed. It allows to remove the freewheel diode typically used in dc–dc converters to prevent current to flow back from the load to the inductor. Furthermore, a gate-driver circuit is implemented which allows the use of thin gate-oxide transistors as high-voltage switches. By doing so, and exploiting the fundamental working principle of the proposed current-controlled UHF stimulator, the need for a high-voltage supply is eliminated and the stimulator is powered up from a $\text{3.5 V}$ input voltage. Both the current detection technique and the gate driving circuit of the current implementation allow to boost the power efficiency up to $\text{300}\%$ when compared to previous UHF stimulator works. A peak power efficiency of $\text{68}\%$ is achieved, while 8 independent channels with 16 fully configurable electrodes are used. The circuit is implemented in a $\text{0.18}\,\mu\text{m}$ HV process, and the total chip area is $\text{3.65 mm}^2$. [ABSTRACT FROM AUTHOR]

A low-power mixed-signal IC for implantable pacemakers is presented. The proposed system features three independent intracardiac signal readout channels with pulse-width-modulated outputs. Also, the proposed system is capable of measuring the amplitude and phase of the bioimpedance with pulse-width-modulated outputs for use in rate adaptive pacemakers. Moreover, a stimulation system is embedded, offering 16 different amplitudes from 1 to 7.8 V. A backscattering transmitter transfers the output signals outside the body with very little power consumption. The proposed low-power mixed-signal IC is fabricated in a 0.18-μm HV CMOS process and occupies 2.38 mm2. The biopotential channels extract the heart signals with 9.2 effective number of bits and the bioimpedance channels measure the amplitude and phase of the heart impedance with 1.35 Ωrms accuracy. The complete IC consumes only 4.2 μA from a 1-V power supply. [ABSTRACT FROM AUTHOR]

Cardiac signal acquisition with high linearity and accuracy of the high-pass cut-off frequency imposes a challenge on the implementation of the analog preprocessing and the analog-to-digital converter. This paper describes a state-space-based methodology for designing high-pass sigma-delta (HP $\Sigma \Delta$ ) topologies with high linearity, targeting high accuracy of the high-pass cut-off frequency. Intermediate functions are evaluated mathematically to compare the proposed HP $\Sigma \Delta$ topologies with respect to dynamic range. A sensitivity performance analysis of the noise transfer function with respect to integrator nonidealities and coefficient variations is also described. Finally, to illustrate the design approach, an orthonormal HP $\Sigma \Delta$ modulator is designed to be implemented in 0.18  $\mu$ m CMOS technology, is tested with real prerecorded ECG signals. [ABSTRACT FROM AUTHOR]

This paper presents an implantable bio-impedance measurement system for cardiac pacemakers. The fully integrated system features a low power analog front-end and pulse width modulated output. The bio-impedance readout benefits from voltage to time conversion to achieve a very low power consumption for wirelessly transmitting the data outside the body. The proposed IC is fabricated in a 0.18 μm CMOS process and is capable of measuring the bio-impedance at 2 kHz over a wide dynamic range from \text100\,\Omega to \text3.3\;\textk\Omega with \text1.35\;\Omega {\rm{rms}} accuracy and \text1\; \mu\textA maximum current injection while consuming just \text1.55\;\mu\textA from a 1 V supply. [ABSTRACT FROM PUBLISHER]