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This paper proposes a multiplexer based technique for accelerating matrix vector multiplication (MVM) in long short term memory networks. The concept of multiple constant multiplication with separate generation and selection of partial products is used in this design. The most important benefit of the proposed architecture is the reduced implementation complexity in terms of cell area and power efficiency. A truncating method is effectively utilized with a guaranteed reduction in the hardware complexity and power consumption. For inner product computations, the input coefficients are truncated instead of being shifted, which in turn make use of combinational circuits replacing the sequential designs. Also, to improve the overall clock period, a novel design for inner product computations is envisaged, which uses modified multiplexer architecture instead of the existing method. The results show a reduction in the implementation complexity of the MVM with a significant power reduction of 14%.

This paper presents a multiplier-free realization of the block finite impulse response (FIR) filter in transpose form configuration using binary constant shifts method (BCSM). The proposed architecture is synthesized using Xilinx Vivado and Cadence RTL Encounter compiler for the area and power analysis and is compared with the existing works in the literature. The comparison highlights the advantages of the proposed architecture in terms of power, hardware complexity and throughput for realizing reconfigurable high throughput block FIR filters.

This paper describes the details of development of a hand held security device to help the security people at the entrances of big institutions/industries/apartments. The security people can scan the number plate of vehicles come at entrance using this device and the device will display whether the vehicle is authorised or unauthorised to enter to the premises. Provision is given to add/remove the registration number to/from the database. This device is designed around onboard computer, which is commonly termed as Raspberry Pi. The optical character recognition (OCR) technique implemented on this device is used for the identification of the registration number.

In this paper, two new inaccurate adder circuits are proposed. The proposed adder circuits are found to have less area and error rate. They are analyzed in terms of error metrics, delay, area, and power, and compared with those of conventional adders. A linear phase direct form finite impulse response filter is implemented using the proposed inaccurate adders, and performance is evaluated. It is shown that by using a combination of accurate and proposed inaccurate adders, the power consumption can be reduced, without much degradation in the filter performances.

In this paper, a new multiplier-free transformation is proposed for the design of low complexity two dimensional (2D) finite impulse response (FIR) filters with improved circularity at wideband radii. By designing the 1D filter multiplier-free and using proposed multiplier-free transformation, a 2D circularly symmetric multiplier-free filter can be realized. Accuracy of the circular contour is measured based on contour approximation error. To prove the hardware efficiency of the proposed transformation, a 2D band-pass filter and a low-pass filter are designed and the overall complexity in terms of the number of multipliers required to implement the 2D filters is compared. From the results it is clear that the proposed transformation have good circularity at wideband radii and have less implementation complexity.

A computationally efficient maximally decimated filter bank core, suitable for digital hearing aids is designed and implemented in this work. The main advantages of the proposed design method are that the computational complexity and delay are less than that of the other filter bank based architectures in the literature. To reduce the hardware complexity of the filter bank core, filter coefficients are optimized and are implemented multiplier-free.

Inexact computing may be employed to reduce power and area in applications where, a small error in computations, does not affect the performance of the system. This paper proposes inexact half-subtractor and full-subtractor circuits, in which, the error occurs only in 25% of all the input combinations. The area and power of the proposed inexact half-subtractor are found to reduce by 25% and 39.37% respectively, with the error in difference occurring only in one input combination out of four. The area and power of the proposed full-subtractor are reduced by 50% and 71.53% respectively with the error in difference occur only at two input combinations out of eight. The proposed inexact subtractors and adders are used for the implementation of reconfigurable FIR filters using vertical horizontal common subexpression elimination (VHCSE) in the canonical signed digit (CSD) space. The area, power, and cell utilization are analyzed and found to reduce compared to the existing CSD based VHCSE algorithm. The performance of the proposed FIR filter is also analyzed in terms of pass-band ripple and stop-band attenuation and found to be within the tolerable limits.

In this paper, the use of sensor networks in environmental monitoring, vehicle monitoring and traffic management, which are important in a smart city are discussed. Sensors in Zigbee and Wi Fi networks form the back bone of this work. Low power networks like Zigbee and connectivity provided by WiFi are needed to realize the concept of Internet of Things (IoT). The main cause of environmental pollution in most cities are industries and automobiles emitting poisonous gases. This paper discusses the implementation of a unit which senses the presence of such gases and uploads the information to a website, and also sends messages to the concerned people. The second part of this work is a vehicle monitoring unit, that can be fixed in vehicles. This system tracks the location of the vehicle, detects accidents to the vehicle and monitors its engine temperature and the presence of poisonous gases from its exhaust. In the case of the vehicle is stolen, it also has the feature to locate the vehicle and prevent it from moving until a message is sent by the owner. The third part of the work, in which, vehicles which do signal jumping are detected and penalised. This feature is very relevant to the countries like India where traffic rules are regularly violated. The density of the traffic around traffic junctions is measured and information updated in the website. An Android app is developed so that all the required information is easily available. The paper describes the hardware and software implementation of the prototype system.

In today’s world, security threats for vehicles are on a constant rise and hence the necessity for ensuring safety for automobiles is of prime importance. Over speeding in accident prone areas is a major cause of road accidents. Accident rates are higher in some areas like school zones, hilly areas, highways, slippery terrains etc. It is in this context that Intelligent Transport Systems is an important and developing field. In this work, the conventional networks GSM and GPS have been used along with sensors positioned in the vehicle. Parking issues are another serious issue which needs attention. This is highly challenging because of the fact that a typical modern automobile doesn’t contain any systems in place to make parking easy. Thus, the objective of this work is to create a vehicular tracking system to ensure the safety of the vehicle and an efficient Automatic Parking system wherein parallel parking is done autonomously and efficiently.

In this paper, a reconfigurable Non-Maximally Decimated Filter Bank (NMDFB) based on polyphase structure, is proposed for Very Long Baseline Interferometry (VLBI) channelizers. The characteristic property of less operations per second of the polyphase structure is exploited in the design of NMDFB. Besides this, the inherent property of zero folding noise, makes NMDFB as an ideal choice for all high resolution wideband radio astronomy signal processing. It is shown that the proposed channelizer offers significant reduction in the number of multipliers, number of operations per second and low power consumption when compared to the existing VLBI channelizer.