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We developed an optical input module consisting of built-in metal-semiconductor-metal photodiodes (MSM-PDs) and co-planar waveguide transmission lines fabricated on an InP substrate, which is flip-chip bonded with a single-flux-quantum (SFQ) circuit fabricated on a Si substrate. To improve photosensitivity of the MSM-PD for a wavelength above 1530 nm at 4 K, we tested the MSM-PDs made of lattice mismatched In1-xGa_xAs films on InP substrates. By employing In1-xGa_xAs with x=0.44, an apparent reduction of photosensitivity for a wavelength above 1530 nm was suppressed. We also tested newly designed DC/SFQ converters with higher input current sensitivities. The observed current sensitivity was improved to 41 \muA, while that in the conventional DC/SFQ converter was 140 \muA. [ABSTRACT FROM AUTHOR]

Superconducting qubit circuits require high quality low critical current density Josephson tunnel junctions. We have developed high quality epitaxial NbN/AlN/NbN tunnel junctions with critical current density, Jc, ranging from as low as a few A/cm^2 to a few tens of kA/cm^2. In this work, we measured current–voltage characteristics for junctions with a Jc\sim 32\ \rm A/cm^2 in the temperature range from 17 mK to above 6.7 K. All the junctions are in good quality and have a high gap voltage (>5.5 mV). We found that the junctions' sub-gap resistances were temperature dependent above 2.5 K and saturated at temperatures below 2.5 K. A junction sub-gap leakage current Ir of about 23 pA was measured. The voltage noise power spectral density for 3 junctions with different sizes has been measured at the base temperature of 17 mK with the junctions biased above the gap voltage. The spectral densities clearly show 1/f behavior at low frequency and are proportional to the junction's linear dimension. [ABSTRACT FROM AUTHOR]

A pipelined 8-bit-serial single-flux-quantum (SFQ) microprocessor, called CORE1β, was designed and tested. The CORE1β has two cascaded arithmetic logic units (ALUs) based on forwarding architecture, which can perform two register operations from one instruction. Pipelining is also extensively adopted to enhance the performance. A new design method, known as one-hot encoding, has been introduced into the design of the control circuit. The 4-stage-pipelined SFQ microprocessors, CORE1β8, have been implemented using the CONNECT cell library and the SRL 2.5 kA/cm2 Nb process. The frequency for the instruction fetch is 25 GHz, and 20 GHz for the bit-serial data operation. The peak performance and the power consumption of the CORE1β8 are estimated to be 1400 MOPS (million instructions per second) and 3.4 mW, respectively. We have experimentally demonstrated 4-stage pipelining and all functionalities of the CORE1β8 microprocessors by on-chip high-speed tests. [ABSTRACT FROM AUTHOR]

With regard to sustaining future capacity of network traffic, the current hardware technology has a big bottleneck in terms of power consumption and insufficient operation speed. To overcome this bottleneck, we have developed a single flux quantum (SFQ) packet-switching circuit. We report recent progress in developing the SFQ packet-switching application. First, we demonstrate a 40 GHz, 160 Gb/s, 4 × 4 packet switching circuit, which is currently the fastest clock frequency reported packet switch. Then, we describe a currently possible switching module using SFQ technology. Finally, we consider how SFQ technology can be used to scale the packet-switching capacity up to 100 Tbps. [ABSTRACT FROM AUTHOR]

We have successfully demonstrated an 8-bit microprocessor using passive transmission lines based on single-flux-quantum LSI technology, in the microprocessor designed here, called CORE1α6, a simple bit-serial architecture with seven instructions was employed. In the CORE1α6, the floor plan was designed with consideration toward integration of a memory, and superconductive passive transmission lines (PTLs) were used to connect circuit blocks. Utilization of PTLs helped us reduce the propagation delay in long interconnections The design flexibility of the floor plan was enhanced and the performance of the microprocessor was improved by 20% compared with our previous design. The CORE1α6 was composed of 6319 Josephson junctions and 15 PTLs with power consumption of 2.1 mW. We have confirmed the complete operations of the CORE1Ξ6 by on-chip high-speed tests. The maximum clock frequencies for bit operation and instruction execution have been found to be 18 GHz and 1.2 GHz, respectively, where the performance corresponds to 240 million instructions per second (MIPS). [ABSTRACT FROM AUTHOR]

We have been investigating a design methodology of SFQ logic circuits based on the binary decision diagram (BDD). In the previously proposed BDD SFQ logic circuits, we have used one-to-two binary switches as a node cell in a BDD tree. In this study we will propose a new implementation method of SFQ BDD circuits, in which two nodes are implemented by using a 2-input 2-output switch gate. By employing the new approach, we have designed and implemented a one-bit full adder using the NEC 2.5 kA/cm² Nb standard process and the CONNECT cell library. The maximum operating frequency of the full adder was found to be 40 GHz by circuit simulations and 32.8 GHz by on-chip high- speed tests. [ABSTRACT FROM AUTHOR]

We demonstrated the 4 × 4-cross/bar-40 Gbps/ch switch which is functionally compatible with a commercial semiconductor one in order to evaluate the current SFQ circuit technology quantitatively in both a operating speed and power consumption. According to our numerical simulations, the SFQ switch has one or two orders of magnitude higher throughput per a single channel than that of the semiconductor, and has much smaller exchanging times between routing paths. In an actual test based on the NEC Nb-2.5 kA/cm² junction technology, correct operation using an on-chip test system made up of 4700 Josephson junctions was confirmed up to 37 Gbps/ch which is about 14 times faster than the semiconductor of 2.7 Gbps/ch speed. We also confirmed that SFQ circuits consumed 1/800 power compared with those of semiconductor. The reason why data rates obtained experimentally did not reach the designed speed of 40 Gbps/ch is due to both the liming error and the influence of magnetic fields caused by large bias currents exceeding 500 mA. These results of quantitative evaluation show that the SFQ technology has much greater potentials than the semiconductor one in both the operating speed and the power consumption, which means it is very effective to apply the SFQ technology to digital applications. [ABSTRACT FROM AUTHOR]

We have studied electrical properties of YBCO/Y/sub 0.7/Ca/sub 0.3/Ba/sub 2/Cu/sub 3/O/sub 7-x/ (Ca-YBCO)/YBCO trilayer junctions using c-axis oriented films. The Ca-YBCO films used here are the overdoped version of YBCO and show transition temperatures around 55 K. All of the junctions show RSJ-like current-voltage characteristics in a certain temperature range, though the range decreases with the Ca-YBCO interlayer thickness. For an applied magnetic field, the junctions show Fraunhofer pattern, indicating a Josephson coupling through the interlayers. The normal resistance of the junctions is proportional to the thickness of the interlayer, suggesting little interface resistance. The exponential dependence of the critical current on temperature and that on the interlayer thickness mean that the junctions behave as SNS junctions. These experimental results imply the proximity effect along c-axis in high temperature superconductors. [ABSTRACT FROM PUBLISHER]