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This article will review recent progress in cryogenic CMOS designs for future scaled quantum computing applications. After introducing the scaling challenges associated with qubit control and readout electronics operating at room temperature, approaches taken to date to cryogenic control electronics design will be discussed, focusing on the most recent relevant publications. Elements of ultra-low power circuit and system design approaches for cryogenic controllers in scaled CMOS nodes (40nm to 14nm) will be reviewed, including a discussion of current state-of-the art cryogenic controller performance and power efficiency. Note that leading designs, when operated as transmon qubit state controllers, have achieved gate error rates in the range of 10-4 to 10-3 achieving spurious free dynamic range (SFDR) of ~40dB while consuming 4-23mW of power per qubit under active control, with power efficiency strongly driven by the complexity of the digital processor integrated in the controller design. These demonstrations, while significant, are just the first steps toward achieving the performance, efficiency, and scalability that will be required for future systems. This review article will discuss fundamental tradeoffs in CMOS cryogenic designs in order to address the needs of future scaled quantum computing systems. [ABSTRACT FROM AUTHOR]

Photodetectors based on a Ge-on-Si platform were widely studied over the last two decades, rapidly becoming the technology of choice for CMOS-integrated optoelectronic systems operating in the near infrared. Recently, we demonstrated a proof-of-concept device realized with a back-to-back, Ge-on-Si double photodiode with dual-band optical sensitivity and voltage-tunability characteristics. Such a device represents the cornerstone for the development of integrated imaging systems operating both in the visible and in the near infrared spectral ranges. To achieve this ambitious goal, however, several technology improvements are needed starting from the fabrication of a multipixel array of dual-band photodetectors. Moreover, given the peculiar electronic behavior of the proposed device, specific readout electronics must be developed and integrated onto a CMOS platform. In this paper we demonstrate the operation of a Ge-on-Si multipixel array with a custom-developed readout integrated chip. We show a complete system characterization, also demonstrating its imaging capabilities with a simple experiment for the determination of the intensity profile of two different laser beams. [ABSTRACT FROM AUTHOR]

Cosmic ray muon has strong penetrating power and no ionizing radiation hazards, which makes it an ideal probe for detecting special nuclear materials (SNMs). In this article, a high spatial resolution muon tomography system based on Micromegas detectors is proposed to optimize the imaging time and quality. The proposed system includes eight Micromegas detectors based on the thermal bonding technique and a scalable readout system. In addition, a multiplexing method based on position encoding is developed to reduce the number of electronics channels by order of magnitude. The spatial resolution of the proposed system with encoding readout can reach a value of hundred micrometers. Finally, a tomography test is performed, and test results show that this proposed system can image 2-cm objects and distinguish different materials. [ABSTRACT FROM AUTHOR]

The ORION chipset, a full-custom multichip readout and processing electronics for the X- $\gamma $ -ray imaging spectrometer (XGIS) on-board the transient high-energy sky and early universe surveyor (THESEUS) space mission, is presented. The XGIS detection plane is arranged in a matrix of 10 $\times $ 10 detection modules, each one composed of 64 CsI(Tl) scintillation bars (4.5 mm $\times $ 4.5 mm $\times $ 30 mm) optically coupled at the top and bottom ends to two 8 $\times $ 8 monolithic silicon drift detector (SDD) matrices. The top SDD, exposed to the X-ray entrance window, performs the double function of low-energy X-ray detection as well as scintillator’s readout, together with the bottom SDD, providing detection and spectroscopic energy range from 2 keV up to 20 MeV. The need to achieve a high-energy resolution, as well as a high sensitive area on the detection plane, led to the development of a chipset organized to have a minimum-area analog readout chip placed in close proximity of the SDD (ORION-FE) and a mixed-signal back-end (ORION-BE) placed a few centimeters further on the back-end board for the additional signal processing and digitization. The multichip readout electronics integrates two dedicated analog processors for low-energy photons up to 30 keV (X-processor) and high-energy photons up to 5 MeV ($\gamma $ -processor), allowing a spectroscopy-grade resolution in the 4 decades energy band (2 keV–20 MeV) of the XGIS, with a simulated power consumption of 1.55 mW/pixel. The ORION prototype was bonded to two ~25 mm2 SDDs, and extensively characterized in terms of pulse shaping, pulse discrimination, and stretching functionality, as well as linearity, dynamic range, and spectroscopic resolution. An optimum equivalent noise charge (ENC) at −20 °C of 24.3 el. r.m.s. on the X-channel [212 eV full-width at half-maximum (FWHM) on Si], and 39.6 el. r.m.s. on the $\gamma $ -channel [3.7 keV FWHM on CsI(Tl)] has been recorded. [ABSTRACT FROM AUTHOR]

In the Cooling storage ring External-target Experiment (CEE) in heavy ion research facility in Lanzhou (HIRFL), multigap resistive plate chambers (MRPCs) detectors are used for high-precision time-of-flight (TOF) measurement to identify the scattered particles after the ion beam hits the target. Regarding the external TOF (eTOF) and 2/3 internal TOF (iTOF) detectors, a ~25-ps rms time precision is required for the readout electronics, whereas for the other 1/3 iTOF detectors, a ~10-ps rms precision is required. A readout electronics prototype was designed, including the front-end electronics (FEE) based on analog signal amplification, discrimination, and the time-to-digital module (TDM), based on field-programmable gate array (FPGA) time-to-digital converter (TDC), to achieve high-precision time measurement. PreAmplifier-DIscriminator (PADI) is used in the design of the FEE, while an FPGA TDC, based on tapped delay line (TDL) structure, with a time precision performance better than 5-ps rms, is implemented in the TDM, as well as the trigger matching circuit and other control logic. The performance of the whole system was tested under different input signal charges and the results indicated that the time precision is better than 10-ps rms, which satisfies the application requirements. [ABSTRACT FROM AUTHOR]

J-PARC E16 is an experiment to examine the origin of hadron mass through a systematic measurement of spectral changes of vector mesons in nuclei. The measurement of $e^{+}e^{-}$ pairs from the decay of vector mesons will provide the information of the partial restoration of the chiral symmetry in a normal nuclear density. To resolve a pulse pile-up and achieve good discrimination of $e^{+}$ and $e^{-}$ from the background of a reaction rate of an order of 10 MHz, the data acquisition (DAQ) system uses waveform sampling chips of APV25 and DRS4. The trigger rate and data rate are expected to be 1 kHz and 120–330 MiB/s, respectively. The DAQ system for readout of APV25 and DRS4 were developed, where events were synchronized by common trigger and tag data. The first commissioning in beam, called Run-0a, was performed in June 2020 with about 1/4 of the designed setup. The DAQ worked with a trigger rate of 300 Hz in the Run-0a and the main bottleneck was a large data size of APV25. Further optimization of the DAQ system will improve the performance. [ABSTRACT FROM AUTHOR]

In this article, a noninterceptive and high-accuracy beam position monitor, named Hi’Beam-A, has been designed for the accelerator of a heavy-ion therapy facility. The Hi’Beam-A consists of the detector subsystem and the readout subsystem. In the detector subsystem, the microchannel plate multiplies the ionized charge in the high vacuum chamber, and the novel Topmetal silicon pixel sensor directly collects the charge. The readout subsystem processes the data and calculates the beam position. Beam test results show that the Hi’Beam-A reaches an accuracy of $5~\mu \text{m}$. This article will present the design, characterization, and beam test of Hi’Beam-A. [ABSTRACT FROM AUTHOR]

Due to be launched in late 2021, the imaging X-ray polarimetry explorer (IXPE) is a NASA Small Explorer mission designed to perform polarization measurements in the 2–8-keV band, complemented with imaging, spectroscopy, and timing capabilities. At the heart of the focal plane, there are a set of three polarization-sensitive gas pixel detectors, each based on a custom-integrated circuit acting as a charge-collecting anode, with their readout electronics. We designed an integrated test equipment based on the VMEbus protocol to characterize the performance of such detectors, debug the IXPE readout electronics, and perform stable data acquisitions to study the whole system. The test campaign was conducted to validate the readout processor against the mission requirements in more demanding conditions than the worst case foreseen for in-orbit operations. The test showed that the device under test could sustain an event rate with a 5.9-keV source, nearly twice the worst case of 300 Hz at 3 keV, with a dead time down to 1.1 ms. Additionally, we performed various scans in the readout electronics parameter space to optimize its performance in observing celestial sources. The success of the test campaign proved the robustness and reliability of the system in these conditions, legitimating its adoption for the IXPE mission. [ABSTRACT FROM AUTHOR]

Tunneling magnetoresistive (TMR) magnetic sensors are broadly applied in various fields. However, to further improve the limit of detection (LOD), it is highly desirable to realize and calculate the noise limits of such sensor systems. Thus, techniques for noise elimination can be developed. In this paper, we propose an equivalent magnetic noise model to describe the LOD of a TMR magnetometer by considering intrinsic noise sources in the TMR sensing element and readout electronics. According to the model, the contribution of each noise source can be directly obtained. Therefore, the LOD of the magnetometer can be established theoretically. Moreover, the predicted detectivity of 390 pT/ $\surd $ Hz is also demonstrated by the experimental results. The model is applicable to all kinds of TMR sensors with a “Wheatstone bridge” configuration. [ABSTRACT FROM AUTHOR]

Reading out from large-scale silicon photomultiplier (SiPM) arrays is a fundamental technical obstacle blocking the application of revolutionary SiPM technologies in nuclear imaging systems. Typically, it requires using dedicated application-specific integrated circuits (ASICs) that need a long iterative process, special expertise, and tools to develop. The pico-positron emission tomography (Pico-PET) electronics system is an advanced 100-channel readout system based on 1-bit sigma–delta modulation and a field-programmable gate array (FPGA). It is compact ($6\times 6\times0.8$ cm3 in size), consumes little power (less than 3W), and is constructed with off-the-shelf low-cost components. In experimental studies, the Pico-PET system demonstrates excellent and consistent performance. In addition, it has some unique features that are essential for nuclear imaging systems, such as its ability to measure V–I curves, breakdown voltages, and the dark currents of 100 SiPMs accurately, simultaneously, and in real time. The flexibility afforded by FPGAs allows multiple-channel clustering and intelligent triggering for different detector designs. These highly sought-after features are not offered by any other ASICs and electronics systems developed for nuclear imaging. We conclude that the Pico-PET electronics system provides a practical solution to the long-standing bottleneck problem that has limited the development of potentially advanced nuclear imaging technology using SiPMs. [ABSTRACT FROM AUTHOR]

We investigated a simple and effective method to extend 1-bit sigma-delta modulation (SDM) circuit-based charge-to-digital converter (QDC) to read dual-polarity silicon photomultiplier (SiPM) output signals. With the same QDC circuit but different voltage biases to the circuit components, the new circuit can read and process both positive and negative polarity signals. We conducted experimental studies to validate its ability to read and process dual-polarity signals and evaluated its performance for Positron Emission Tomography (PET) detector applications. The results, based on energy, coincidence timing, and crystal identification measurements, show that the circuit provides equal electronics capability for readout of both polarity signals and good performance for SiPM array-based PET imaging detector applications. Overall, the dual-polarity QDC readout electronics can be easily implemented to extend the range of signal polarity and to provide effective and flexible detector frontend electronics for reading single- or dual-polarity SiPM output signals. [ABSTRACT FROM AUTHOR]

A commercial silicon p-i-n (Si-PIN) photodetector is proposed for electronic personal dosimeters (EPDs) for the sake of the detection of low-energy X-rays and/or $\gamma $ -rays. Since the EPD is a portable device supplied with a battery, front-end electronics with small size and low power dissipation are required. This paper presents a fully-customized low-power front-end readout application-specific integrated circuit (ASIC) as a solution for this application. The ASIC includes four-channel analog front-ends with a digital interface. Each channel mainly includes a charge sensitive amplifier (CSA), a CR–RC4 pulse shaper, an output buffer, a discriminator, and a digital-to-analog converter (DAC). An $I^{2}C$ interface and shift registers are designed to control the analog blocks. The modeling of equivalent noise charge (ENC) is discussed to optimize the circuit design. A prototype ASIC is designed in 0.35- $\mu \text{m}$ CMOS mixed-signal 3.3 V process. The die size is 2.4 mm $\times2.4$ mm. The preliminary test results are obtained. The input charge is 0.2–15 fC. The ENC is 119 e−+15.9 e−/pF under the power dissipation of about 1.25 mW/channel. The proposed ASIC can well meet the requirements of the EPD and other radiation detector systems. [ABSTRACT FROM AUTHOR]

Circular Electron and Positron Collider (CEPC) is a large experiment facility proposed by the Chinese particle physics community. One of the running options is being the Higgs factory. The calorimeter is the main part of this experiment to measure the jet energy. Semidigital hadron calorimeter (SDHCAL) is one of the options for the hadron measurement. Gas electron multiplier (GEM) detector with its high-position resolution and flexible configuration is one of the candidates for the active layer of the SDHCAL. The main purpose of this paper is to provide a feasible readout method for the GEM-based SDHCAL. A small-scale prototype is designed and implemented, including front-end board (FEB) and data interface board (DIF). The prototype electronics has been tested. The equivalent rms noise of all channels is below 0.35 fC. The dynamic range is up to 500 fC and the gain variation is less than 1%. The readout electronics is applied on a double-layer GEM detector with 1 cm $\times 1$ cm readout pad. The result indicates that the electronics works well with the detector. The detection efficiency of minimum ionization particle (MIP) is over 95% with a 5-fC threshold. [ABSTRACT FROM AUTHOR]

The back-streaming neutrons (back-n) is a white neutron experimental facility at the China spallation neutron source (CSNS). The time structure of the primary proton beam makes it fully applicable to use the time-of-flight (TOF) method for neutron energy measuring. We implemented the electronics of TOF measurement on the general-purpose readout electronics designed for all the seven detectors in back-n. The electronics are based on the peripheral component interconnect express eXtensions for instrumentation (PXIe) platform, which is composed of field digitizer modules (FDM), trigger and clock modules (TCM), and signal conditioning modules. The T0 signal synchronous to the CSNS accelerator represents the neutron emission from the target. It is the start of the time stamp. The TCM receives, synchronizes, and distributes the T0 signal to each FDM based on the PXIe backplane bus. Meanwhile, the detector signals, after being conditioned, are fed into FDMs for waveform digitizing. The first sample point of the signal waveform is the stop of the time stamp. According to the time stamp and the time of the signal over the threshold, the total TOF can be obtained. The time-to-digital converter (TDC) based on field-programmable gate array (FPGA) is implemented on the TCM to accurately acquire the time interval between the asynchronous T0 signal and the global synchronous clock phase. There is also an FPGA-based TDC on the FDM to accurately acquire the time interval between the T0 signal arriving at the FDM and the first sample point of the signal waveform. The over-threshold time of signal is obtained offline. This method for TOF measurement is efficient and not needed for additional modules. Test results showed that the accuracy of TOF is subnanosecond and can meet the requirement for back-n at the CSNS. [ABSTRACT FROM AUTHOR]

The time-of-flight (TOF) system in the compressed Baryonic matter (CBM) experiment is comprised of super modules and used for charged hadron identification. Each super module contains several multigap resistive plate chambers (MRPCs) for high-precision time measurements. The quality of each super module should be evaluated to ensure that the detectors achieve the targeted performance. In this paper, the quality evaluation electronics for super modules based on the peripheral component interconnect eXtensions for instrumentation platform is proposed. The discriminated MRPC signals are digitized by the time-to-digital converter (TDC). Then, the digitized time data from a super module are aggregated at the TDC readout motherboard and are transmitted to the data readout modules (DRMs) via optical links. Finally, the DRMs relay the digitized data to the data acquisition system through the Gigabit Ethernet ports in parallel. The laboratory test results indicate that the quality evaluation electronics achieve a time resolution better than 20 ps. The initial cosmic ray tests with the MRPC detectors have also been conducted to confirm the performance of the quality evaluation system. Based on the results, the evaluation system can subsequently be used for quality evaluation of the CBM-TOF super module. [ABSTRACT FROM AUTHOR]

A supermodule assembled with multiple resistive plate chamber detectors is a component of time-of-flight (TOF) system for the compressed baryonic matter (CBM) experiment. Before the supermodules are applied to CBM-TOF, their quality needs to be evaluated. The readout electronics is confronted with a tremendous challenge of transmitting data at the maximal speed of 6 Gb/s. In this paper, the readout method for the CBM-TOF supermodule quality evaluation is presented. A parallel architecture based on the Gigabit Ethernet is designed to meet the requirement for data transmission rate. First, the data are sent from the front-end electronics to four readout module groups via optical fibers at the maximal rate of 1.5 Gb/s per fiber. Next, the data are further distributed to 16 parallel daughter readout models so that the maximal data throughput of each daughter readout module is 375 Mb/s, within its capacity of 550 Mb/s. Finally, the readout daughter modules send data to the data acquisition software through the standard Gigabit Ethernet. The proposed readout method has the advantage of good scalability, so it can meet different requirements for variable data rate. The preliminary test result shows that each of four parallel readout groups can transmit data at the speed of 1.6 Gb/s, which indicates that the overall readout system can meet the requirement for the maximal data-transmission speed of 6 Gb/s. [ABSTRACT FROM AUTHOR]

The compressed baryonic matter (CBM) experiment will investigate the quantum chromodynamics phase diagram at high net baryon densities and moderate temperatures. CBM time-of-flight (TOF) system is composed of super modules containing high-performance multigap resistive plate chambers (MRPCs). During the mass production, each super module assembled with MRPCs needs quality evaluation, which includes time measurement and data readout. Read out electronics encounter the challenge of reading data from a super module at a speed of about 6 Gb/s. In this paper, a read out method based on peripheral component interconnect express (PCIe) over optical fiber is proposed for CBM-TOF super module quality evaluation. The digitized data from super module will be concentrated at the front-end electronics and then be transmitted to a PCIe switch module (PSM) over optical fiber using PCIe protocol. The PSM is directly plugged into the motherboard via vertical edge card connector at the back-end data acquisition server. With this readout method, a high-speed transmission rate can be reached. Furthermore, a PSM can receive data from several super modules simultaneously, which is important to improve the evaluation efficiency. This readout method simplifies the architecture of readout electronics and supports long-distance transmission between front end and back end. [ABSTRACT FROM AUTHOR]

T0 detector, based on multigap resistive plate chambers (MRPC) technology, is one of the key components in the external target experiment. Through precision measurements of the MRPC signals, timing of the beam impact on the target can be obtained and used as the start time for other detectors. A readout electronics system was designed for the T0 detector. Based on the NINO application-specified integrated circuit, front-end-electronics (FEE) circuits, which can achieve high precision leading-edge discrimination and charge-to-time conversion, were designed for the internal and external MRPCs of the T0 detector. The output pulse of the FEE is then digitized by high-precision time digitization modules with time-to-digital converters, trigger matching, and other control logic integrated within field programmable gate array devices. To evaluate the functionality and performance, we also conducted a series of tests of the electronics. Results indicate that the system functions well, and the time precision of the electronics is better than 21 ps, which satisfies the application requirement. [ABSTRACT FROM AUTHOR]

In this paper, we report the recent development of a low-noise front-end readout application-specified integrated circuit (ASIC) for cadmium–zinc–telluride (CZT) and Si-p-i-n detectors. The readout chain consists of a charge sensitive amplifier, a CR–RC pulse shaper followed by a Sallen–Key low-pass filter, readout buffers, and a discriminator. The layout using deep n-well (DNW) is adopted to optimize the noise performance. A prototype ASIC is implemented in TSMC CMOS 0.18- \mu \textm , 1.8 V/3.3 V mixed-signal technology. The die size of the prototype chip is 2.1 mm $\times$ 2.5 mm. At room temperature, the equivalent noise charge of the front-end readout channel using DNW implementation is 112 e− (rms) + 17 e− pF at the power consumption of less than 2 mW/channel. The linearity error is less than 3%. By connecting the readout ASIC to a CZT detector, we obtained that the energy resolutions of a $\gamma$ -ray spectrum are 3.9% and 5.5% (full-width at half-maximum), respectively, at the 59.5-keV line of 241Am source. The ASIC is a good solution of front-end electronics for personal dosimeters. [ABSTRACT FROM PUBLISHER]

ZYNQ has gradually become a flexible and suitable architecture with field-programmable gate arrays and dual-high-performance advanced RISC machine Cortex-A9 processors in applications of data acquisition and readout systems in the field of nuclear electronics. The high data rate and high-efficient data-throughput performance between the programmable logic (PL) and processing system (PS) is essential in a readout module based on ZYNQ. In this paper, four typical readout electronics system architectures are introduced, and the details of hardware and software design of the new-generation compact readout module RAIN1000Z2 based on ZYNQ XC7Z020–CLG400 are illustrated. Then, the data-throughput performance tests between the PL and PS are designed and implemented. The highest performance readout mode can reach more than 2000 MB/s data-throughput in different high-performance port combination modes. In conclusion, recommendation of combination mode is given for different data-throughput applications’ requirements in readout applications based on the ZYNQ-based readout module. [ABSTRACT FROM PUBLISHER]

A silicon photomultiplier (SiPM) is considered a next generation photo-sensor for low-light applications. In this study, we propose and develop the general concept of a multipurpose submillimeter gamma-ray (MSG) imaging module that is applicable to most gamma-ray imaging devices. The main features of the MSG module are submillimeter intrinsic resolution, geometrically expandable structure, expandable data acquisition system, multi-energy capability and usability in intense magnetic fields. The elements of the gamma-ray detector are pixelated Ce:GAGG ( $31\times 31$ pixels, 0.8 mm pitch), a 1.5-mm acrylic light guide, and one SiPM array ( $8 \times 8$ pixels). The readout electronics are composed of a symmetric charge division resistive network, 16 channel preamplifiers, multiplexing amplifiers, and analog-to-digital converter (ADC) circuits. We use a subminiature field-programmable gate array (FPGA) board as a data acquisition system. To make the system more expandable, we apply a 10 GbE-based tree structure using a FPGA-based data acquisition board and switching hub. To verify multipurpose capabilities, the energy spectra and the flood images are obtained using Co-57, Na-22, and Cs-137 isotopes. We measure temperature characteristics of the detector module. A pinhole image is obtained to confirm high resolution property. The maximal data transfer rate that is measured using dummy gamma-ray event packets is 963.143 Mbps. This detector module can be applied to nuclear medicine imaging devices and radiation monitoring systems. [ABSTRACT FROM PUBLISHER]

The “in programming barium fluoride (BaF2) detector array” is one of the experiment facilities at China Spallation Neutron Source-White Neutron Sources, which is designed for the measurement of neutron capture cross section with high accuracy. It consists of 92 crystal elements with completely $4\pi $ solid-angle coverage, which needs 92 analog channels and 92 digitization channels for data acquisition. Accordingly, the readout electronics is comprised with four distributed readout PXIe crates, containing 46 field digitization modules (FDMs). Each FDM supports two valid channels for signal digitizing. In this paper, evaluation software is designed for evaluating the performance of BaF2 readout electronics. It focuses on evaluating the performance of data transmission, waveform digitizing, and working status monitoring. Test results show that the evaluation software can correctly acquire and assemble data from the BaF2 readout system and evaluate the analog digital converter (ADC) performance under ADC test mode. FDMs in the readout system can also be monitored and controlled by this software in real time. [ABSTRACT FROM AUTHOR]

During the Long Shutdown 2 of CERN’s Large Hadron Collider, foreseen to start in 2019, the ALICE experiment will upgrade its time projection chamber (TPC) detector to cope with a Pb-Pb collision rate of 50 kHz in the next running phase. In the upgraded TPC, the gas electron multiplier (GEM) technology and continuous readout will replace the existing multiwire proportional chambers and triggered readout system. The GEM signals will be processed using a new custom designed mixed-signal front-end chip named SAMPA. The first version of SAMPA was delivered in 2014, and the production of the final version is in progress. This paper gives an overview of the design of the data acquisition system used in testing of the analog behavior of the first SAMPA version and the performance results of a SAMPA coupled to a pulse generator and a GEM detector prototype. [ABSTRACT FROM AUTHOR]

In the large high altitude air shower observatory, the water Cherenkov detector array (WCDA) is one of the key parts. The WCDA consists of 3600 photomultiplier tubes scattered in a 90 000- \textm^2 area, and both high precision time and charge measurements are required over a large dynamic range from 1 to 4000 photoelectrons (P.E.). To achieve time measurement precision better than 500-ps rms, high quality clock distribution and automatic phase compensation are needed among the 400 front-end electronics (FEE) modules. To simplify the readout electronics architecture, clock, data, and commands are transferred simultaneously over 400-m fibers, while high speed data transfer interface is implemented based on TCP/IP protocol. Design and testing of the readout electronics prototype for WCDA is presented in this paper. Test results indicate that a charge resolution better than 10% rms at 1 P.E. and 1% rms at 4000 P.E. and a time resolution better than 300-ps rms are successfully achieved over the whole dynamic range, beyond the application requirement. [ABSTRACT FROM AUTHOR]

This paper proposes a torque sensor based on the differential air pressure measurement method using the volumetric strain of a mechanical sensing structure. A model of the measurement system based on the differential air pressure from the volumetric strain of the mechanical sensing structure is proposed and theoretically discussed. The error sources are identified and an error propagation model is presented for the proposed torque measurement method. Considering these error sources, a prototype torque sensor is presented as a case study for the method verification. Both the mechanical and readout electronics designs are discussed and analyzed. The mechanical sensitivity, resolution, and maximum stresses are analyzed using finite-element modeling. Based on the results from the simulation, a prototype torque sensor is manufactured and experimentally verified using a readout electronics design. For verification, the sensor prototype is measured under static torque to have a sensitivity of 0.04272V/ \textN\cdot \textm and a range of ±117N \cdot \textm . Compared with the nominal mechanical sensitivity result from the FEM simulation, this measured sensitivity has a difference less than 6%. The noise analysis of the designed readout electronics shows that the resolution of 0.006% can be achieved with this design. Furthermore, hysteresis analysis shows an error of 0.012% of full scale. From these results, it is also shown that the actual performance of the sensor is mainly limited by the differential pressure sensor and the readout electronics design and is not by the mechanical design of the sensor. [ABSTRACT FROM PUBLISHER]

Ultra-fast sampling through flash A/D converters is expensive and power consuming. Switching capacitors arrays are a valid alternative, combining good sampling performance to relatively low cost and power consumption. In this work we describe a 1152 channels readout system based on the DRS4 ultra-fast analog sampler, operated at 2GS/s sampling frequency. This type of readout is particularly suitable for Cherenkov telescopes, where a large number of channels (pixels) need to be sampled at ultra-fast sampling speed to catch the short-lasting Cherenkov flashes. This digitization system was successfully installed in the MAGIC telescopes during its major upgrade. We discuss the design of the electronics and the measured performance of the system. [ABSTRACT FROM PUBLISHER]

High-Tc radio-frequency (RF) superconducting quantum interference devices (SQUIDs) are well understood and have been adequately expounded in theory, but in practice, it is not so easy to find the optimum working points for their low-noise operations. Starting from the basic equations describing the RF SQUID in nonhysteretic mode, a polynomial expression for its flux-to-voltage characteristic was deduced. For simplicity, the expansion was truncated to the first three harmonics in the flux quantum. The optimum working point is determined as the location of the maximum gradient of its transfer function. The analysis was compared with experimental flux-to-voltage characteristics of the RF SQUIDs with a step-edge junction, measured at 77 K for different settings of the readout electronics. Six typical kinds of the measured flux-to-voltage curves were fitted and analyzed with respect to their harmonics in the magnetic flux. The findings can be of referential value for automatically setting the working points of high-Tc RF SQUIDs in the practical applications. [ABSTRACT FROM PUBLISHER]

We present a multichannel readout electronics developed for a CsI(TI) gamma detection array with 1024 large area avalanche photodiodes at the external target facility of cooler storage ring in the institute of modern physics. The full read-out electronics consist of 32 identical analog boards, eight acquisition and control boards (ACBs), and a PXI chassis. An analog board can handle energy and time measurements for 32 channels. The ACB implements analog output signal conversion, slow control, fast timing control signals generation, and data acquisition. The energy linearity of the readout electronics is better than 0.2% in the dynamic range of 0.06–0.60 V. The relative resolution of intrinsic electronics is about 0.24% at output voltage of 0.57 V. [ABSTRACT FROM AUTHOR]

The Water Cherenkov Detector Array (WCDA) is one of the key parts in the Large High Altitude Air Shower Observatory (LHAASO). In the WCDA, 3600 Photomultiplier Tubes (PMTs) and the Front End Electronics (FEEs) are scattered within a 90000~\m^2 area, while a time measurement resolution better than 0.5 ns is required in the readout electronics. To achieve such time measurement precision, high quality clock distribution and synchronization among the 400 FEEs (each FEE for 9 PMTs readout) is required. To simplify the electronics system architecture, data, commands, and clock are transmitted simultaneously through fibers over a 400-m distance between FEEs and the Clock and Data Transfer Modules (CDTMs). In this article, we propose a new method based on the White Rabbit (WR) to achieve completely automatic clock phase alignment between different FEEs. The original WR is enhanced to overcome the clock delay fluctuations due to ambient temperature variations. This paper presents the general scheme, the design of prototype electronics, and initial test results. These indicate that a clock synchronization precision better than 50 ps is achieved over 1 km fibers, which is well beyond the application requirement. [ABSTRACT FROM AUTHOR]

The DAMPE (DArk Matter Particle Explorer) is a scientific satellite being developed in China, aimed at cosmic ray study, gamma ray astronomy, and searching for the clue of dark matter particles in the near future. The BGO (Bismuth Germanate Oxide) Calorimeter, which consists of 616 PMTs (photomultiplier tubes) and 1848 dynode signals, is a crucial part of the DAMPE payload for measuring the energy of cosmic ray particles, distinguishing interesting particles from background, and providing trigger information. An electronics system, which consists of 16 FEE (Front End Electronics) modules with a total power consumption of about 26 W, has been developed. Its main functions are based on the low power, 32-channel VA160 and VATA160 ASICs (Application Specific Integrated Circuits) for precisely measuring the charge of PMT signals and providing“hit”signals as well. To assure the long-term reliability in harsh space environment, a series of critical issues such as the radiation hardness, thermal design, components and board level quality control, etc., are taken into consideration. Test result showed that the system level ENC (equivalent noise charge) for each channel is about 10 fC in RMS (root mean square), and the timing uncertainty of the hit signals is about 300 ns, both of which satisfy the physics requirements of the detector. Experiments with ^60\ Co radioactive source proved that 20 krad(Si) TID (Total Ionizing Dose) level is achieved, while the heavy ion beam and laser beam tests indicated that its SEL (Single Event Latch-up) and SEU (Single Event Upset) performance in orbit will be acceptable by taking some hardness measures. All the readout modules successfully passed the board-level screening, the sub-system level and finally the satellite system level environmental tests, and behave well in the beam test at CERN (European Organisation for Nuclear Research). [ABSTRACT FROM AUTHOR]

Current methods in treating chronic wounds have had limited success in large part due to the open loop nature of the treatment. We have created a localized 3D-printed smart wound dressing platform that will allow for real-time data acquisition of oxygen concentration, which is an important indicator of wound healing. This will serve as the first leg of a feedback loop for a fully optimized treatment mechanism tailored to the individual patient. A flexible oxygen sensor was designed and fabricated with high sensitivity and linear current output. With a series of off-the-shelf electronic components including a programmable-gain analog front-end, a microcontroller and wireless radio, an integrated electronic system with data readout and wireless transmission capabilities was assembled in a compact package. Using an elastomeric material, a bandage with exceptional flexibility and tensile strength was 3D-printed. The bandage contains cavities for both the oxygen sensor and the electronic systems, with contacts interfacing the two systems. Our integrated, flexible platform is the first step toward providing a self-operating, highly optimized remote therapy for chronic wounds. [ABSTRACT FROM PUBLISHER]

We present a new data acquisition system under development for the next upgrade of the LHCb experiment at CERN. We focus in particular on the design of a new common readout board, the PCIe40, and on the viability of PCI-Express as an interconnect technology for high speed readout. We describe a new high-performance DMA controller for data acquisition, implemented on an FPGA, coupled with a custom software module for the Linux kernel. Lastly, we describe how these components can be leveraged to achieve a throughput of 100 Gbit/s per readout board. [ABSTRACT FROM AUTHOR]

We have developed readout electronics for the central drift chamber (CDC) of the Belle-II detector. The space near the endplate of the CDC for installation of the electronics was limited by the detector structure. Due to the large amounts of data generated by the CDC, a high-speed data link, with a greater than one gigabit transfer rate, was required to transfer the data to a back-end computer. A new readout module was required to satisfy these requirements. This module processes 48 signals from the CDC, converts them to digital data and transfers it directly to the computer. All functions that transfer digital data via the high speed link were implemented on the single module. We have measured its electrical characteristics and confirmed that the results satisfy the requirements of the Belle-II experiment. [ABSTRACT FROM AUTHOR]

This paper presents the front-end electronics upgrades of the ALICE Time Projection Chamber detector for the coming years, with a focus on the upgrades for Long Shutdown 2. The Large Hadron Collider is currently in Long Shutdown 1 following a successful first run, and upgrades of the detectors are underway to support the higher particle interaction rates planned for the next run. For the Time Projection Chamber, the increase in data due to the higher interaction rate and higher energy will cause a bottleneck in the Readout Control Unit and a new board is in development which increases the data-link speed to the back-end. Another more general upgrade of the ALICE experiment is planned for Long Shutdown 2, foreseen to start in 2018. In this case the goal is to cope with an even higher interaction rate of 50 kHz for Pb–Pb collisions. The present Multi Wire Proportional Chambers of the Time Projection Chamber will then be replaced by Gas Electron Multiplier technology. At the same time, the front-end electronics and readout system will also be replaced. [ABSTRACT FROM PUBLISHER]

We developed a direct memory access (DMA) engine compatible with the Xilinx PCI Express (PCIe) core to provide a high-performance and low-occupancy alternative to commercial solutions. In order to maximize the PCIe throughput while minimizing the FPGA resources utilization, the DMA engine adopts a novel strategy where the DMA address list is stored inside the FPGA and not in the central memory of the host CPU. The FPGA design package is complemented with simple register access to control the DMA engine by a Linux driver. The design is compatible with Xilinx FPGA Families 6 and 7, and operates with the Xilinx PCIe endpoint Generation 1 and 2 with all lane configurations (x1, x2, x4, x8). A multi-engine architecture is also presented, where two x8 lanes cores are used in parallel together with a PCIe bridge, to exploit fully the capabilities of a PCIe Gen2 x16 lanes link. A data throughput of 3461 MBytes/s has been achieved with a single PCIe Gen2 x8 lanes endpoint. If the dual-engine architecture is used, the throughput is increased up to 6920 MBytes/s. The presented DMA is currently used in several experiments at the ANKA synchrotron light source. [ABSTRACT FROM PUBLISHER]

The TileCal Demonstrator is a prototype for the future upgrade of the ATLAS hadron calorimeter when the Large Hadron Collider increases luminosity in year 2023 (HL-LHC). It will be used for functionality and performance tests. The Demonstrator has 48 channels of upgraded readout and digitizing electronics and a new digital trigger capability, but is backwards-compatible with the present detector system insofar as it also provides analog trigger signals and can communicate as the present system. The on-detector part of the Demonstrator is comprised of 4 identical mechanical mini-drawers, each equipped with up to 12 photomultipliers (PMTs). The on-detector electronics includes 45 Analog Front-End Boards, each serving an individual PMT; 4 Main Boards, each to control and digitize up to 12 PMT signals, and 4 corresponding high-speed Daughter Boards serving as data hubs between on-detector and off-detector electronics. It is fully compatible with the present system, accepting ATLAS triggers, timing and slow control commands for the data acquisition, detector control, and detector operation monitoring. We plan to insert one fully functional Demonstrator module into the present ATLAS TileCal detector for the LHC RUN 2 in Christmas shutdown in 2015 or 2016. [ABSTRACT FROM PUBLISHER]

This paper presents the fabrication, modeling, and characterization of a micromachined piezoelectric directional microphone. The microphone structure consists of a 20-μm-thick semirigid beam structure that rotates about torsional pivots in response to in-plane pressure gradients across the length of the beam. The motion of the beam structure is transduced by piezoelectric cantilevers, which deflect when the structure rotates. While the structure has been introduced in prior publications, this is the first paper summarizing rigorous acoustic characterization of first generation prototypes. An analytical model and multimode, multiport network model utilizing finite-element analysis for parameter extraction are presented and compared with acoustic sensitivity measurements. Directivity measurements are interpreted in terms of the multimode model. A noise model for the sensor and readout electronics is presented and compared with measurements. [ABSTRACT FROM PUBLISHER]

This paper describes a solid-state image sensor for high-speed X-ray imaging. The sensor is made up of a light sensitive detector layer bump-bonded to a readout integrated circuit (ROIC). The detector layer is high resistivity n-type silicon and is fully depleted in operation. The p-implanted islands are used to define pixel regions with 100-μm × 100-μm area. The detector layer contains 852 × 209 pixels indium bump-bonded to four identical CMOS ROICs. Each ROIC contains 213 × 209 pixels and is fabricated using a 0.25-μm CMOS process. The ROIC utilizes a capacitive transimpedance amplifier-type front-end coupled to a switched capacitor analog memory. This architecture allows storage of eight frames for high-speed burst imaging of up to a million frames per second, followed by a slower multiplexed readout. Details of the sensor design and operation are presented together with characterization results. [ABSTRACT FROM PUBLISHER]

This paper presents the design, implementation, and measurements of a complete electronic frontend intended for high-resolution spatial detection of ion beams at counting rates higher than $10^6$ particles per second (p/s). The readout system is made up of three main multichannel building blocks, namely, a transimpedance preamplifier, a signal-conditioning line receiver, and a charge-to-digital converter, as well as some off-the-shelf components. The preamplifier and the line receiver have been specifically designed and optimized to minimize the overlapping probability of ion beams tracking, at high counting rates, in low-pressure gaseous secondary electron detectors. Experimental results are shown, considering $\alpha $ particles sources and particles beams, featuring an adaptive shaping time frame of 170–230 ns with a peak signal-to-noise ratio of up to 25 dB. These performance metrics are competitive with the state of the art, demonstrating the suitability of the reported data acquisition and instrumentation system for precise and fast particle tracking detection. [ABSTRACT FROM PUBLISHER]

Pulse diagnosis is one of the major methods used in traditional Chinese medicine to evaluate a patient's health conditions. Determination of pulse patterns is, however, a matter that depends on technical skill and subjective experience of a doctor. Development of a pulse diagnosis apparatus can lead to modernization and advancement of the field by providing more objective and accurate evaluations. This paper aims at demonstrating real-time pulse measurement using the developed flexible capacitive tactile sensors. A $5\times 5$ sensor array of 0.75 cm $\times $ 1 cm in size was implemented using flexible printed circuit boards and integrated with CMOS switched-capacitor readout circuits. The measured average output sensitivity was 1.57 mV/mmHg and minimum detectable pressure and capacitance were at the sub-mmHg and sub-fF levels, respectively. The cross sensitivity was measured to be 7.8%. Real-time pulse measurement has been successfully demonstrated using the developed flexible sensor array. [ABSTRACT FROM PUBLISHER]

This paper describes a new CMOS readout circuit, which makes the microbolometer focal plane array have low spatial noise over a wide operating temperature range without a thermoelectric cooler. The readout circuit corrects the nonuniformity of each microbolometer pixel by the proposed self-bias equalization technique. The proposed readout circuit adopting the self-bias equalization has a feedback loop that makes the readout circuit find the bias voltage for the correction of nonuniformity by itself. The proposed circuit was fabricated using a 0.35-μm standard CMOS process. The measured results of the fabricated chip show that the spatial noise is less than the allowed spatial noise for the equivalent temperature difference of 50 mK over a wide operating temperature range. [ABSTRACT FROM PUBLISHER]

Resistive sensor arrays have been increasingly adopted in wearable electronic applications, which require low-complexity and low-energy circuits. However, current readout strategies for resistive sensor arrays require additional electrical components, such as transistors, diodes, multiplexers, op-amps, switches, current sources, and A/D converters, leading to a considerable increase in circuit complexity, power consumption, system instability, and crosstalk error. To address the problem, this paper proposes a new approach, which determines sensor resistance values by establishing and solving resistance matrix equations of sensor arrays. Unlike conventional approaches, it allows crosstalk currents in arrays to avoid additional components that are originally used for eliminating crosstalk currents and minimizing crosstalk error. Meanwhile, it takes advantage of on-chip resources of wearable platforms, thereby reducing redundant chips. It was implemented on a prototype of 10 × 10 textile resistive sensor array, which was taken in a sensing cushion for sitting pressure monitoring of chair bound people. Experimental results on this array platform showed the new approach achieved a satisfactory accuracy (0.61% ± 0.41%), as well as a low crosstalk error (2.77% ± 0.61%). The fabricated sensing cushion also exhibited a relatively low pressure measurement error (6.30% ± 0.75%). Compared with other approaches, the proposed approach demonstrated the lowest circuit complexity on a microcontroller based wearable platform, and a sufficient sensor capacity. It is ideal for a wide range of applications like wearable or implantable sensing, presenting a reference for the design of low-complexity and low-crosstalk error wearable systems based on resistive sensor arrays. [ABSTRACT FROM PUBLISHER]

This study presents the recently developed monolithic photonic-integrated circuits that provide efficient amplitude modulation for wavelength division multiplexed optical channels. The circuits were designed for application as a read-out unit in a high-energy physics experiment, and are sufficiently general to be applied in various types of high-speed photonic transmitters. They were constructed using basic building blocks provided in an indium phosphide-based generic integration technology process and fabricated in a multi-project wafer run. Two variants of the circuits, utilizing modulators in Mach-Zehnder and Michelson interferometer configuration, are discussed. A modulation bandwidth of 18.6 GHz was measured and error-free transmission of a 10-Gb/s signal through 85 km of optical fiber was achieved. [ABSTRACT FROM PUBLISHER]

We report on the fabrication of imagers based on organic semiconductors both in the photodiode layer and in the readout backplane. The photodiode is based on evaporated ultrathin (<;100 nm) stack of SubPc/C60, sensitive in the wavelength range between 300 and 650 nm. The readout circuit is a switch matrix fabricated with a solution processed semiconductor (XPRD30B01) and two solution processed, crosslinkable dielectrics (XDRD30B01). The readout TFTs (140/5-μm channel width/length, respectively) have leakage current lower than 1 pA with the ON-current higher than 0.1 μA. The 32 × 32 pixel imagers with pixel pitch down to 200 μm are demonstrated with mean dark signal of a few μA/cm2 and linear photoresponse up to the incident power of 100 μW. These results show feasibility of fabricating readout circuits with TFTs based on crosslinkable dielectrics. This enables reduction of two patterning steps (opening of the gate dielectric and of the encapsulation layer) to just photolithography, leading to simplification of the backplane manufacturing process. [ABSTRACT FROM PUBLISHER]

This letter presents a CMOS-compatible photodetector displaying direct light-to-time conversion and intrinsic charge integration with a very low dark current. This device is particularly adapted for applications requiring high sensitivity such as bioluminescence detection. The effects of the physical structure, the process parameters, and the bias conditions on the device are discussed with the support of TCAD simulations and experimental measurements. The photodetector and its readout circuit are designed and implemented in standard 0.18-μm CMOS process. The experimental study shows promising tunability and sensitivity characteristics. [ABSTRACT FROM PUBLISHER]

In this paper, we propose novel fully analog uncalibrated readout circuits for wide-range capacitance estimation. The working principle is based on a modified De-Sauty ac bridge configuration where two capacitances and two resistances are employed. Through the use of a voltage controlled resistor and of a suitable feedback loop, an accurate estimation over a wide range of the sensor capacitance variation is possible, also without the knowledge of the other bridge component values. The first two proposed solutions are able to estimate, experimentally, ~1.5 decades (optimized range: [25-840 nF]) and more than 3 decades [900 pF-1.1 μF] of capacitive variations, respectively, ensuring, continuously, the bridge equilibrium condition; the third interface allows the evaluation of the sensor capacitance also outside this condition, increasing the capacitive variation decades to more than 4 [81 pF-1.1 μF]. The proposed topologies have been also modified to detect the capacitive sensor parasitic resistance. In this case, experimental results on PCB have demonstrated the capability to simultaneously estimate ~ 1.7 capacitive [2-100 nF] and 1.5 resistive variation decades [33 kΩ-1.2 MΩ]. Finally, a suitable optimization of the operating range of the first proposed solution, obtained through a proper passive components sizing, has been performed with the aim to employ the commercial humidity sensor HCH-1000 in a high accuracy (11.4 bits) RH% detection. [ABSTRACT FROM PUBLISHER]

An analog correlator-based readout circuit for amperometric glucose electrochemical biosensors is designed and implemented in 0.35- μm CMOS process. The readout circuit offers lower noise and wider dynamic range compared with the conventional transimpedance amplifier architecture. The operational amplifier achieves a 118.3-dB gain and 47.3 ° phase margin. The readout circuit dc response for input range of 5-30 μA gives a linear output voltage range of 0.21-1.38 V. The total output rms noise is measured to be 6.6 m Vrms. It is applied for a microneedle glucose sensor and has a mean error of 1.6% and consumes 5.1 mW of power. The total area of the proposed readout circuit is 300 μm× 167 μm. [ABSTRACT FROM PUBLISHER]

This paper presents a novel and compact compensation architecture for uncooled microbolometers without substrate temperature stabilization. The substrate temperature-induced nonuniformity and nonlinear resistance characteristics of the microbolometer array elements are investigated in detail. We propose an analytical model to identify the main nonideal effects and dispersion sources caused by the substrate temperature and their respective impacts on the uncooled microbolometers array. This proposed compensation approach is based on a differential current mirror readout architecture, which allows pixel response and offset correction to be performed as a function of the uncooled infrared focal plane array (IRFPA) sensor's operating temperature. An experimental FPA chip based on this approach has been designed and implemented on silicon using a 0.5- μm CMOS technology and surface micromachining process. The proposed architecture allows the microbolometer array nonuniformity control over a wider range of readout integrated circuits substrate temperatures while maintaining better than 63-mK noise equivalent temperature difference with f/1 optics. As a result of the elimination of the temperature stabilization requirement, the IRFPA turn-on time for high performance imaging can be greatly reduced. Power, volume, and weight of the IRFPA are also significantly reduced. This approach is ideally suited for high-volume, low-cost, low-power, and low-weight production applications. [ABSTRACT FROM PUBLISHER]

We present an enhanced in-plane capacitive readout for sensing out-of-plane displacement in a MEMS acoustic sensor. The sensor is fabricated in a multi-user silicon-on-insulator process, using a thicker device layer to reduce misalignment between moving and fixed comb fingers. This misalignment is found to reduce the sensitivity and render the response nonlinear. In addition, incorporation of a branched comb design doubles the readout capacitor surface area for a given sensor size, to further increase the sensitivity. These two modifications restore linearity to the readout and increase its sensitivity to displacement by an order of magnitude. [ABSTRACT FROM AUTHOR]