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This paper studies the coordinated use of smart inverters with legacy voltage regulating devices to help increase the energy savings from conservation voltage reduction (CVR) in distribution systems with high photovoltaic penetration. Two voltage optimization algorithms are developed to evaluate the CVR benefit by considering two types of smart inverter functions: aggregated reactive power control and autonomous volt/VAR control. In each algorithm, smart inverters are coordinately controlled with the operation of legacy voltage regulating devices including load tap changers and capacitor banks. Both algorithms are tested on representative utility distribution system models. Simulation results demonstrate that the proposed algorithms can achieve around 1.8-3.6% energy savings when only using legacy voltage regulating devices and an additional 0.3-0.9% when adding smart inverters.

The steep voltage slopes of today’s wide-bandgap (WBG), fast-switching power semiconductors — like SiC and GaN — lead amongst other challenges to reflection on long cables and thereby overvoltage at inductive loads. To enable the use of these inverters with motors without specially reinforced insulation the voltage slopes need to be slowed down. This article presents a new low-loss countermeasure, which involves the parallel connection of two half-bridges via an interphase transformer. For this one half-bridge is delayed relative to the other one by a delay tuned to a resonant circuit. Undesired DC components in the cross-current of the interphase transformer occur due to non-idealities in the voltage symmetry. The subsequent DC magnetization ultimately can cause the core to saturate. The paper describes the effects due to inaccurate timings and the aspects to keep in mind when dimensioning the magnetic core. Also, this article describes an approach to deal with the undesired current components using a closed-loop control. For that, a special differential-mode shunt is used which enables a dedicated measurement of the cross-current mean value and mitigates the influence of the switching frequency. Finally, the controller concept is presented. The controller is implemented and verified on a 500 kVA SiC inverter test bench.

This paper presents a reliable microgrid for residential society with control methods to design grid forming inverter (GFI) to emulate the seamless-synchronization features to deal with the dynamic concerns of the grid. In this microgrid a photovoltaic (PV)-based GFI with a control scheme in parallel with a PV-battery supported inverter with an enhanced current control is considered to operate under non-ideal grid voltage conditions. The PV-GFI is adaptable to operate either in islanded mode (IAM) or grid integrated mode (GIM) depending under the grid conditions. An adapted power control technique is implemented such that power demand of local loads and harmonic currents are compensated by respective distributed generation. Moreover, the active power demand of all local loads is shared between the main grid and respective local DG. The adapted power controller achieves transient free operation even under the load disturbances. The proposed control methods of microgrid are validated in simulation under various operating conditions.

A number of transport vehicles have been fitted with electric traction motors and their inverters. The traction motor is required to continue to operate even if the inverter is under fault conditions. We propose a motor with two controllable rotors for a traction motor, which consists of 2 rotors and 1 stator. In this paper, we propose a fault-tolerant control method for a two-controllable-rotor motor using a 6-phase inverter. The operational principle of the two-controllable-rotor motor is described. The mathematical model under fault tolerant control is shown, and a fault-tolerant control method for the two-controllable-rotor motor is described. The proposed fault tolerant control method is verified by conducting finite element analysis and carrying out measurements on a prototype.

In regions such as hawai'i, south australia, Tasmania, Texas, and Ireland, power systems are commonly experiencing instantaneous penetration levels of inverter-based power sources (IBPSs) such as wind, solar photovoltaics (PV), and battery storage in excess of 50n60% relative to system demands.

Compared to conventional microgrids (MGs) with pre-defined and static topology, dynamic MGs feature varying electric boundaries and enhanced operational resiliency. This paper evaluates the operation stability of inverter-based dynamic MGs in terms of fulfilling the requested MGs topology change and associated network reconfiguration, which falls into the category of large-signal stability analysis. A complete nonlinear state-space model of inverter-based dynamic MGs is derived, where coordinated controls among inverters along with the effect of communication delays have been considered. In response to reconfiguration demands, an evaluation scheme is developed to determine whether the system could perform seamless topology variation without losing synchronism. Specifically, the system’s stability region is quantified by the domain of attraction (DoA) around the desired operating point using Takagi-Sugeno fuzzy modeling (T-S multimodeling). The large-signal stability of a multi-bus inverter-based dynamic MG with both interface inverters and sectionalizing switches have been analyzed. The stability regions estimated under different scenarios of topology variation have been validated using time-domain simulation in MATLAB/Simulink. The developed evaluation scheme is used to quantify the effects of control gain designs and communication delays on system large-signal stability.

This paper introduces a new modular cascaded multilevel inverter (MLI) which is composed of a cascaded connection of submodules (SMs). The combination of basic cells (BCs) with polarity changer H-Bridge produces the SMs, which is the basis of the introduced inverter. Owing to its high modularity, the proposed inverter can be extended to reach higher voltage levels. Hence, two extensions are suggested: 1) Extension based on cascading more BCs within each SM, and 2) Extension based on cascading more SMs. Using a set of algorithms, the magnitude of DC voltage sources is determined to synthesize the proper AC side voltage waveform. Furthermore, the proposed topology is optimized in different ways to achieve the desired purposes, such as maximizing the number of voltage levels, minimizing the number of switches and DC sources, and providing the least total standing voltage on the switches. Therefore, in each of the mentioned optimization goals, the optimal structure is obtained. A prototype of the presented MLI is defined and its performance is verified through several simulation studies in MATLAB/Simulink and experimental tests. Besides, a comprehensive comparison is made with the best performance of the existing alternatives to demonstrate the merits and superiorities of the proposed MLI.

This paper presents the elimination of common mode (CM) conducted emissions in three-phase four-wire four-pole inverters connected to an AC distribution bus and operating in grid-following mode. Two novel control strategies are proposed and compared to the CM emission limits in the military standard 461G. Delta modulation and model predictive control both demonstrate elimination of the common mode voltage at the output of the three-phase four-pole inverter and the ability to meet the military standard’s requirements without a CM choke. The differential mode performance is comparable to that of three-dimensional space vector modulation, which does not cancel CM emissions. A physics-based model of the system was developed using state space equations to simulate the conducted emissions that can be expected with the two proposed methods. As the proposed methods result in increased switching frequency, wide bandgap devices were used to build a laboratory prototype, which successfully validate the simulated results.

This paper introduces a new active-neutral-point clamped (ANPC) seven-level inverter with a switched-capacitor technique. The introduced inverter generates a seven-level ac output voltage with a maximum voltage-boosting gain of 1.5. Also, a simple modulation technique was proposed, where the capacitors voltages are naturally balanced by the series-parallel connection of the input voltage source. Compared with seven-level inverter topologies, the proposed topology is simpler and its control system does not requires sensors or balancing circuits to stabilize the dc-link voltages. Additionally, the dc-link voltage requirement is reduced by 33.33%, eliminating the need for an intermediate dc-boosting stage and making the introduced inverter a good candidate for applications such as photovoltaic panels and full-cells systems, both characterized by a low input voltage. The operation and performance of the proposed topology is validated through simulation and experimental results.

This paper proposes a completely non-centralized Volt/VAr control (VVC) algorithm for active distribution networks which are faced with voltage magnitude violations due to the high penetration of solar photovoltaics (PVs). The proposed VVC algorithm employs a two-stage architecture where the settings of the classical voltage control devices (VCDs) are decided in the first stage through a distributed optimization engine powered by the alternating direction method of multipliers (ADMM). In contrast, the PV smart inverters are instructed in the second stage through linear Q(P) decision rules - which are computed in a decentralized manner by leveraging robust optimization theory. The key to this non-centralized VVC routine is a proposed network partition methodology (NPM) which uses an electrical distance metric based on node Q􀀀jV j2 sensitivitiesfor computing an intermediate reduced graph of the network, which is subsequently divided into the final partitions using the spectral clustering technique. As a result, the final network partitions are connected, stable, close in cardinality, contain at least one PV inverter for zonal reactive power support, and are sufficiently decoupled from each other. Numerical results on the UKGDS-95 bus system show that the non-centralized solutions match closely with the centralized robust VVC schemes, thereby significantly reducing the voltage violations compared to the traditional deterministic VVC routines.

Total harmonic distortion (THD) and voltage stress across the switches are critical issues in power electronic systems. Although multilevel inverters (MLIs) were initially used to minimize these issues, doing so is challenging when simultaneously attempting to minimize the number of components such as switches, DC sources, and gate drivers. To address this problem, a new pd-type MLI is presented with two back-to-back connected d-type modules with an H-bridge, that generates the negative voltage levels. The proposed topology with 10-unidirectional switches, and 4 DC sources operates in symmetric and asymmetric configuration to generate 9, 13 and 17-voltage levels. The presented inverter is extended using cascaded connections to attain more output voltage levels, making it usable for the applications with diverse number of DC links for medium and high voltage applications. The proposed topology also exhibits small THD, low number of power electronic components, and low total voltage stress across the switches in each cycle. Furthermore, a widely used nearest level control modulation technique is used to generate output voltage levels with minimum amount of THD at the output. Finally, simulations were performed using MATLAB/Simulink and experiments were conducted to validate the performance of the proposed topology.

In this work, a multi-level 42-sided polygonal space vector structure (SVS) for suppression of lower order harmonics for Open-End Induction Motor(OEIM) drive applications is proposed. The proposed power circuit topology consists of two inverters feeding an OEIM from either side. The main inverter fed with a single DC link providing active power for motoring operation is switched at low switching frequency. The secondary inverter fed with a capacitive supply is switched at high frequency to suppress lower order harmonics upto 39th order, up to the base speed of operation allowing maximum utilization of the DC link. The advantages of lower order harmonic suppression in motor phase voltage, for polygonal space vector structures are combined with multi-level inverter topology. This offers various advantages like multilevel operation with low inverter switching for the main power delivery inverter and harmonic suppression throughout the modulation range. The low switching frequency primary inverter generates low order harmonics. The harmonics are suppressed by the capacitor fed secondary inverter which supplies only reactive power for suppression of lower order harmonics in motor phase voltage. Use of a single DC link facilitates four-quadrant operation of the inverter.

Multilevel topologies with SiC devices for medium voltage (MV) motor drive have advantages to reduce the harmonics and device voltage stress as well as to increase the efficiency. However, with the application of SiC devices, the reflected wave phenomenon still happens in multilevel motor drive due to its high dv/dt, resulting in overvoltage at motor terminals. This paper proposed a T-type circuit based active reflected wave canceller (ARWC) to suppress the overvoltage of a M-level motor drives with reduced voltage rating of Vdc/(M-1). A coupled inductor is applied to isolate the ARWC output and the main inverter. In addition, the coupled inductor is designed with a small resistor to allow low current flowing into ARWC. The proposed ARWC configuration can be applied for general multilevel topologies. A 3-level ANPC converter with 3.3 kV SiC device is built in the laboratory. A 1.2 kV SiC module is applied in the proposed ARWC. The experimental results at 1.6 kV Vdc and 16 A (RMS) load current with and without proposed ARWC are provided and compared to verify the validity of proposed method.

This paper describes an integrated voltage-boosting technique, which is essential to achieve compatibility between low-voltage PV panels and high voltage DC-links needed for the dc-to-ac conversion. To achieve the twin objectives of voltage-boosting and multilevel inversion, this paper proposes a transformerless T-type nine-level hybrid boost inverter. To improve the efficiency in the boosting stage of the proposed converter system, a significant portion of the PV energy is directly transferred from the PV source to the load, while the other part is processed through an interleaved converter, which is fused with the inverter. Thus, the proposed converter ensures a higher power density and reduces the power ratings of the semiconductor devices. This paper also introduces a modified zone-based PWM technique, which achieves a complete elimination of the switching frequency voltage transitions in the total common-mode voltage (TCMV). Thus, this technique mitigates the generation of leakage current while preserving the advantages of conventional multilevel inverters such as low dv/dt, inductive power capability. Besides that, a rigorous mathematical analysis for the common-mode equivalent circuit of the proposed configuration is also presented in this paper. Detailed simulation and experimental studies are carried out to validate the feasibility of the proposed configuration.

In this paper, the generic analysis and design of Zero-Voltage-Switching (ZVS) multi-phase AC/DC converters are proposed. With the Edge Aligned PWM (EA-PWM) scheme, all switches of ZVS multi-phase AC/DC converters can realize ZVS operation. Besides, the switching frequency is fixed and the auxiliary switch only operates once in each switching period. Its operation stages in a switching cycle are analyzed and a generic ZVS condition is derived. Based on the proposed theory, a ZVS two-stage three-phase photovoltaic (PV) inverter is investigated, which is regarded as a 5-phase converter. Its ZVS condition under different working conditions is discussed. Finally, a 10kW prototype with 150kHz switching frequency of the ZVS two-stage three-phase PV inverter is built and the experiment results are given to verify the analysis. In addition, the extension of the ZVS multi-phase converter in different applications is introduced.

In this paper, a fault-tolerant model-free predictive controller (FT-MFPC) for cascaded H-bridge multilevel inverters (CHMLIs) is proposed. FT-MFPC is based on an association of model-free predictive controller (MFPC) and a PI-like structure known as current variation controller (CVC). As in MFPC, the dynamic structure (DS) which is used for prediction of the system output is obtained from past measurements of current variations, but CVC modifies the dynamics before they are stored for prediction. As a consequence, even if the converter operates with bypassed modules, FT-MFPC adapts its DS to represent the real dynamics of the system and enables a closed-loop response with balanced load currents in unbalanced CHMLIs. Simulation and experimental results validate the adaptability of the proposed strategy to operate a seven-level inverter under various configurations of bypassed H-bridge modules. The experimental results show that, for different post-fault operations, the maximal current THD and imbalance factor at steady state in the worst-case scenario are below 5% and 2%, respectively.

Pulse width modulation (PWM) based power electronics inverters are being widely used for various applications, including motor drives. However, the common-mode voltage (CMV) resulting from switching operations in the PWM inverters causes significant performance degradation of the system and can cause potential damage to motors. Since the effects of the CMV can be more severe in wide bandgap (WBG) and high switching frequency-based converter systems, various methods have been proposed to mitigate the CM noise issues. This work presents a multi-level inverter system composed of a multi-level inverter with a proposed multi-level active power filter (APF). For attenuating the CMV in multi-level inverters using multi carrier-based PWM methods, a novel PWM method is presented for the proposed multi-level APF. The three-phase five-level Active-Neutral-Point-Clamped (ANPC) II-type inverter using the Apparent Switching Frequency Doubling (ASFD) PWM is used as an example of the multi-level inverters and carrier-based PWM methods to analyze and verify the proposed CMV attenuation method. The APF generates and injects the APF voltage equal to the CMV to attenuate the CM noise accurately. Various key challenges, including the dead-time compensation, are addressed through the proposed advanced PWM techniques to improve the CMV attenuation performance. Simulation and experimental results are provided to verify the comparison and effectiveness of the proposed CMV attenuation method.

The wide bandwidth impedance of grid and inverter are critical parameters for small-signal stability analysis and control optimization of grid-tied inverter sys-tems. The impedance measurement is an effective way to obtain the grid and inverter impedance by injecting a series of perturbations into the measured system. However, pre-vious studies fail to fully consider the adverse grid voltage conditions, including harmonics, unbalance, frequency de-viation, voltage sag, and phase jump, which may bring er-rors to the measured impedance. In this paper, a cascaded delayed signal cancellation (CDSC) based method is pro-posed to accurately obtain the impedance of the measured system under adverse grid voltage conditions. The pro-posed CDSC-based method is mainly composed of the perturbation extraction module (PEM) and frequency adap-tive module (FAM). Different CDSC blocks are applied to implement the PEM and FAM to extract the injected per-turbations adaptively, under various adverse grid voltage conditions. Simulation and hardware-in-the-loop experi-ment results are presented to validate the effectiveness and feasibility of the proposed impedance measurement method.

This paper proposes an improved hybrid parallel compen-sator (IHPC) for enhancing the power transfer capability of a photovoltaic (PV) grid-connected inverter. A thyristor switched capacitor (TSC) module is used in series with a conventional inductive-coupling voltage source inverter (IVSI) to reduce the DC-link voltage. Under a low DC-link voltage, the voltage across the insulated gate bipolar tran-sistor (IGBT) will also be low, which will reduce the voltage stress of the IGBT, thereby improving the reliability and reducing the loss of the VSI. First, the mechanism of reac-tive compensation for improving the PV inverter power transmission capability is analyzed. Then, the circuit con-figuration and operating principle of the IHPC are intro-duced. After that, an optimal control strategy for the IHPC is proposed to address the resonance problem caused by the TSC connected in series with the L filter and to improve the compensation performance of the IHPC. Finally, the effec-tiveness of the proposed IHPC and the control method is validated by the simulation and experiments. The results show that the IHPC with optimal control strategy can achieve continuous reactive power compensation under a low DC-link voltage, thereby enhance PV power transfer capability.

Aiming at the misdiagnosis problem of the inter-turn short-circuit (ITSC) fault detection method caused by the inverter nonlinearity and the current measurement errors, a d-axis residual voltage-based fault diagnostic strategy is proposed for sensorless control of the surface permanent magnet synchronous motor (SPMSM). The model of the 3-phase wye-connected SPMSM with ITSC fault is established, and the expression of the d-axis residual voltage caused by the ITSC fault, the inverter nonlinearity, the current measurement errors and the motor parameter errors is derived. The proposed fault diagnostic strategy can eliminate the current relative gain coefficient error and locate the ITSC fault by using the 8th and 2nd harmonics of the estimated d-axis residual voltage, respectively. The experimental results verify the effectiveness of the proposed fault diagnostic strategy.

For the grid-connected inverter, grid voltage sag can be a typical phenomenon. From the prospective of safe and robust operation, the inverter should be stable when the grid voltage sag (or large disturbance) occurs. Although the inverter stability in this case has attracted considerable attentions, few studies have given suggestions on the system stability boundary and parameter design. To fill this gap, this paper deeply discusses the large-signal stability of the system under different situations and reveals the quantified impact of the phase-locked loop (PLL) on the large-signal stability of the system based on the fundamental current-source model. The large-signal stability criterion and boundaries for grid voltage sags are established, which are instructive to the design of PLL parameters. Besides, a novel design guideline for the PLL parameters is proposed to ensure the robust operation of the system both under the steady-state and grid voltage sags, as well as to achieve good dynamic performance after large disturbance occurs. The theoretical, simulation and experimental results show that the proposed stability boundary has a certain accuracy and the PLL parameters design guideline can ensure the system stability both under steady-state and grid voltage sag conditions.

A gallium nitride (GaN)-based resonant step-up converter is proposed for the application in the satellite electric propulsion (EP) system. This converter consists of a full-bridge inverter, a resonant tank and a multi-stage Cockcroft-Walton (CW) voltage multiplier to provide a high gain. Additionally, the air-core transformer is introduced due to the megahertz switching frequency allowed by the GaN device. Thus, the limited magnetizing inductance of transformer and the remarkable junction capacitance of diode have to be carefully considered in the resonant tank design, especially after considering that this converter normally operates at the light load in the EP system. In this work, the 4-order LCLC resonant converter is investigated. The recommended parameter selection for the 4-order resonant tank is also provided. A 1.2-MHz, 23-V/2.5-kV, and 6-W prototype is demonstrated. It achieves a low harmonics distortion and a low power loss with the zero voltage switching (ZVS).

Online condition monitoring of winding insulation has been proved to be an effective means to improve the reliability of an inverter-fed machine, but little work has been done on the insulation of line-end coil subjected to much higher transient voltage stress with a higher risk of premature insulation break down. In this paper, the inverter self-excited high-frequency switching oscillations are utilized for the line-end coil insulation condition monitoring. To improve the condition monitoring sensitivity and its robustness to dynamic operating conditions, a switching oscillation mode decomposition (SOMD) method is proposed. Firstly, the condition-sensitive mode, i.e. high-frequency common-mode (HFCM) current is selected and separated by the variation mode decomposition (VMD) algorithm among three dominant modes in switching oscillation current. Then, the amplitude-frequency features of HFCM current are extracted for condition monitoring. Finally, the overall insulation condition of three-phase line-end coils and the degree of asymmetric degradation are quantitatively evaluated by the frequency and amplitude features respectively. Experimental work was carried out and the results demonstrate the good performance of high sensitivity, good robustness, and non-contract safety.

Pole-zero cancellation technique has drawn much attention to tackle the filter resonance of the LCL-type grid-connected inverter for simplifying the stability-oriented design. However, its potential stability risk was rarely concerned. As one representative of this technique, the weighted average current (WAC) control is assessed. It is found that the LCL resonance in the state variable WAC is cancelled out by pole-zero cancellation, but the ones in some uncontrollable or unobservable state variables such as the grid current are still inherited, resulting in harmonic instability. From this perspective, this paper appeals that this technique should be cautiously used or even avoided. An extended WAC control which avoids pole-zero cancellation is proposed accordingly. The theoretical expectations are finally validated by simulation and experimental results.

Vehicle to Vehicle (V2V) energy sharing is emerging as an alternate solution to range anxiety and limited charging infrastructure challenges associated with electric vehicles (EVs). The existing off-board DC fast charging options for V2V ap- plication found in the literature are not effective due to the additional weight, size and cost of the external charger or interface. In this paper, a new V2V interface is proposed in which both EVs motor winding neutrals and negative rails of on-board drivetrains are directly connected to each other. This further helps in forming an integrated dual bidirectional DC-DC converter to control the direction of power flow. The proposed approach does not require reconfiguration of motor winding or mechanical clutch to arrest the motor from rotating and/or the reconfiguration of drivetrain inverter connections. The major hardware requirement for the proposed approach is, access to the already existing neutral connection of the EV motor phase windings. Furthermore, Finite Element Analysis is presented for 150 kW EV motor model and its performance validation with the high frequency DC current flowing in the motor windings during the V2V operation. A scaled lab prototype is developed to demonstrate the energy sharing between two Lithium-ion battery banks through proposed direct V2V power transfer concept.

The back-electromotive force (BEMF) model-based observer is an attractive sensorless control strategy for permanent magnet synchronous motor (PMSM) drives. However, the accuracy of BEMF observer is deteriorated due to the dc offsets caused by current measurement and inverter nonlinearity. To address this problem, the paper proposed a two-degree-of-freedom structure-based backstepping observer (TSBO) for sensorless PMSM drives. First, a two-degree-of-freedom structure is presented to improve the frequency-domain response of the BEMF observer. Second, a second-order complex vector transfer function is inversely introduced into the studied structure to achieve bandpass characteristics. Compared with the conventional BEMF observer, the studied TSBO can achieve dc error suppression without introducing the extra bandpass filter. The studied algorithm is verified by the experimental results on a 4.4kW PMSM platform.

To utilize the full potential of the direct matrix converter (DMC) and improve the output waveform quality, a three-level output strategy for conventional 3 × N ( N ≥3) DMCs is presented, where three-level output voltages are achieved without any changes in the topology. In this developed strategy, the DMC is treated as a two-stage converter that consists of a fictitious rectifier and a neutral-point clamped (NPC) three-level inverter. By applying a phase-shifted carrier modulation strategy to the rectifier and a modified carrier-based double-signal pulsewidth modulation strategy to the NPC inverter, sinusoidal input and output, reduced switching losses, and controllable input power factors are achieved in conventional 3 × N DMCs. The developed three-level output strategy improves output waveform quality while sacrificing input performance to some extent. Finally, the effectiveness of the developed strategy is verified by both simulations and experimental results.

The reduction in the cost of PV energy is still required to be competitive as an alternative energy source. The efficiency and reliability of PV inverters are important aspects to be enhanced to reduce the cost of PV energy since it is closely related not only to the annual energy production but also to the reduction of operational and maintenance costs of PV systems. In this paper, a single-phase IT-type NPC inverter with one-leg clamping pulse width modulation (OLC-PWM) is proposed for efficiency and reliability improvements. The proposed IT-type NPC inverter with OLC-PWM can improve the efficiency by taking the advantages of I-type and T-type NPC inverters regarding the power loss. Furthermore, its reliability has been improved compared with conventional I-type and T-type NPC inverters. The IT-type NPC inverter also has an ability to balance the neutral-point voltage. The superiorities of the proposed IT-type NPC inverter in terms of reliability and efficiency are validated through the simulations and experiments by comparing the reliabilities and efficiencies of the conventional I-type and T-type, asymmetric I-type and T-type and IT-type NPC inverters.

Junction temperature fluctuation is the main cause of failure of power devices including silicon carbide (SiC) MOSFETs, and active junction temperature control is an effective way to improve their reliability. Most existing methods of active junction temperature control rarely consider the system efficiency and the complexity of hardware implementation, which limits their applications. This paper proposes an active junction temperature control method for SiC MOSFETs based on a resistor-less gate driver, which consists of two auxiliary MOSFETs with adjustable gate-source voltages. Hence, the switching loss of the SiC MOSFET can be continuously and accurately adjusted to mitigate the efficiency suffer with the junction temperature control. The power loss model of SiC MOSFETs with the proposed gate driver was established. The design principle of the junction temperature controller is introduced. The experimental results show that the junction temperature fluctuation is reduced by 24.1%, and that the lifetime of the SiC MOSFET is prolonged by 3.92 times via using the proposed junction temperature control method. The energy loss of the prototypical inverter is decreased by 4.15% over the whole testing period. The experiment was conducted with SiC MOSFETs, and the proposed method is also suitable for other Sibased semiconductor devices.

Dc-link oscillation in electromechanical equipment drive system with film capacitor is a common problem when system impedance mismatch. For this problem, an inverter voltage compensation (IVC) strategy is proposed in this article to suppresses the oscillation of dc-link voltage. This method improves the motor input impedance by designing a damping compensation link so that the input and output impedances of the system can meet the stability conditions. It injects the damping signal into the inverter reference voltage of PWM modulation, which avoids the influence of current loop bandwidth and does not directly affect the motor speed or motor current. Moreover, the compensation impedance of this method is related to the motor voltage, which can compensate system damping dynamically according to the motor operating conditions, and the effect of the compensation link on the motor dynamic performance is reduced. Furthermore, the selection of compensation coefficients in this method is more intuitive and it simplifies the system design. Finally, experimental results demonstrate the effectiveness of the proposed method after building an experimental platform.

Buck-boost inverter with unfolding circuit in a grid-connected mode has numerous advantages but suffers from nonlinear nature and zero-crossing spike, which is difficult to eliminate; it therefore requires an accurate control approach. This paper presents an optimal tuning approach of the digital control system based on a proportional resonant and repetitive controller along with proper pulse-width modulation block. Optimal performance consists in the minimal steady-state error and fast transient response keeping the system in the stable domain in a wide range of operation. It is achieved by a derived set of coefficients of the controller for different operation points. To tune the system, an appropriate transfer function of the plant is developed in the z-domain, taking into account nonlinearity of the system and digital delay. In advance, we present a detailed study of various discretization methods for best coincidence with the simulation and experimental results. Simulation and experimental results confirmed theoretical statements. The proposed approach allows double improvement of the THD of the grid current in most of the operating points.

To balance the phase output currents of a multi- phase inverter, negatively coupled inductors (NCIs) can be used to achieve a larger differential mode (DM) loop impedance than the common mode (CM) loop impedance. For a good current sharing effect, the inductances of the NCIs should be large, leading to bulky size and cost ineffectiveness, which should be avoided in high-power applications. This paper proposes a novel current balancing method based on parallel resonance. A parallel resonant network (PRN) is inserted between any two phases. With -Y transform, the inductor common point and the capacitor common point are generated, either of which can be used as the CM output node. For a series-series compensated wireless power transfer system, part of the existing compensating capacitance can be employed to form PRNs with the added paralleling inductors. The DM currents are suppressed by the large impedance of the PRNs. Compared with the existing method, the inductances of the NCIs can be greatly reduced to achieve better current balancing performance. The added paralleling inductors are of small current ratings, which are only visible to DM currents. A prototype is implemented to validate the proposed method.

In order to improve the power quality and decrease the consumed power of an induction motor (IM) which supplied by an alternate battery-powered system, an algorithm that can be used to save its energy consumption has been proposed. Control mechanism is to reduce the wasted energy which caused by IMs start-up current based on bounding its optimal starting voltage. Proposed algorithm includes two parts: 1) use Branch and Bound (BB 2) according to the control rule to adjust on-line voltage of the zinc bromine flow battery which is used to feed the IM. Due to proposed approach, the minimum start-up voltage of the battery-powered system can be predicted and by which one the IMs surge current has been suppressed on line. Moreover, the relationship of the output voltage of battery and inverter supply to the load current has been derived by modelling the battery-powered system. Experiments demonstrate that compared with before optimization, amount of energy consumption of the IM supplied by zinc bromine flow battery decreases by 8.5% and corresponding indicator parameters of the power quality can reach the standard IEC TS62749-2015.

The semi-Z-source inverter with least switch count (only two switches) eliminates the leakage current due to the doubly grounded structure. However, the main disadvantage is the high voltage stresses of the switches (the sum of double PV output voltages and the amplitude grid voltage). This paper proposed an improved inverter based on the SZSI. It inherits the advantage of the less leakage current and owns other merit of lower switch voltage stresses. Besides, the operation of the proposed inverter is bimodal and only two switches operate at high frequency in each mode. Firstly, the circuit structure and the operation principle are introduced in detail. Then, the grid current controllers in both modes are designed. Two comparisons are investigated for better clarification of the pros and cons of the proposed inverter. Finally, experimental results, obtained with a 500-W laboratory prototype are presented to validate its performance.

In this letter, an improved model predictive control (MPC) has been proposed for single-phase grid-tied converter with virtual vectors in a reshaped and compacted solution space, while improving ac power quality, without increase of the virtual vectors number. Combining linear solution space reconstruction method, the global optimization solution space can be shrunken and reshaped in real-time, only relying on grid angle information. Therefore, MPC can select the optimal virtual-vector in a finer and closer solution subspace, then, much finer control effect can be obtained. Implemented by finite-control-set MPC with an integrated difference modulator, equivalent fixed double switching frequency at the output can be achieved. Experimental results validate the effectiveness of the proposed methods.

This paper introduces a fault-tolerant reconfiguration topology and control strategy for symmetric open-winding multiphase machines. Bidirectional switching devices are proposed to connect the inverter bridge legs on different ends when the open-circuit fault occurs, and the reconfigured circuit can regenerate the missing voltage phasors due to the faults. Furthermore, to prevent overcurrent problems on the reconfigured bridge legs and maximize the torque output capability of the reconstructed system, winding currents are optimized with zero-sequence component injection during fault-tolerant operation. The experiments implemented on the five-phase system validate that the proposed fault-tolerant scheme is effective and has higher torque output capability compared with the traditional fault-tolerant solutions.

Finite control-set model predictive control (FCS-MPC) shows superior dynamic performance with simple structure for motor drives. However, conventional FCS-MPC method presents unfixed switching frequency, making it intractable for the design of heat sinks and output filters. To address this issue, this study is devoted to developing a new FCS-MPC strategy with constant switching frequency for permanent magnet synchronous motor (PMSM) drives fed by three-level T-type inverter. The switching frequency regulation is realized by extending the period control technique, where the periods are measured between each rising edge and falling edge of the gate signals. The proposed algorithm can be embedded in the iterative process of the FCS-MPC, which can easily achieve the fixed switching frequency with balanced neutral point potential. The performance of this control strategy is numerically evaluated and experimentally verified by an 11-kW PMSM drive platform.

In single-phase voltage source inverters (VSI) under a weak grid, the frequency coupling, caused by the asymmetrical system structure, poses a challenge to system modeling and controller design. In this article, a frequency coupling suppression control strategy is presented, where all the frequency coupling components in the current reference are eliminated. As a result, the single-phase grid-tied inverter is directly modeled as a simple single-input single-output (SISO) admittance rather than a complicated multiple-input multiple-output (MIMO) admittance matrix. The SISO admittance model is simple, compact, and accurate, which facilitates design-oriented analysis. The admittance characteristic analysis shows that the Sym-PLL has a critical impact on the system stability under weak grid conditions. To improve the system stability, a prefilter-based impedance-shaping control strategy is proposed by mitigating the negative resistor behavior of the Sym-PLL. Finally, simulations and experimental results validate the effectiveness of the frequency-coupling suppression control strategy.

Virtual oscillator control (VOC) is an emerging decentralized control technique for grid-forming inverter applications. In contrast to conventional phasor-based droop control or virtual synchronous machine control, VOC is a time-domain controller designed to emulate the dynamics of a nonlinear oscillator. VOC is a current controlled voltage source, lacking the ability to regulate the inverter terminal voltage, which will result in significant voltage deviations caused by dead-time effects, non-ideal semiconductor devices and output filter voltage drops. In this paper, a voltage and current dual-loop control structure augments the VOC to compensate these voltage deviations and regulate the inverter output variables directly. A complete small-signal model for a multiple inverter based microgrid with the proposed control structure is presented in order to assess system stability using eigenvalue and participation factor analysis. Analytical results show that the parameter related to the frequency regulation and the integral gain of the voltage controller affect the location of the system’s dominant modes significantly. The stability margin is determined by modifying these control parameters. Experimental results on a laboratory test microgrid verify the predication from the small-signal analysis and time-domain simulations.

Three-phase four-leg four-wire (3P4L4W) three- level (3L) inverters have the ability to supply both balanced and unbalanced loads. This letter establishes common-mode (CM) and differential-mode (DM) circuit models for the 3P4L4W 3L inverter. The 3L phase-leg CM voltage is determined by the voltage balancing control (VBC) for the split dc-bus voltages, that the DM load voltages are subject to the DM voltage control for the 3L phase-leg, and that the CM load-voltage is subject to the control for the fourth phase-leg. On this basis, a decoupled modulation is proposed where the 3L phase-legs are modulated to attain VBC and closed-loop DM load-voltage control, whereas the fourth phase-leg is independently modulated to realize the closed-loop CM load-voltage control. The proposed work has been experimentally verified, showing that the 3P4L4W 3L inverter with this decoupled modulation scheme can provide well-balanced ac load voltages and low total harmonic distortion (THD) for any type of ac loads: balanced, unbalanced, linear, and nonlinear.

Photovoltaic (PV) power generation plant with integrated battery energy storage (BES) is becoming increasingly attractive and necessary as the PV penetration increases. Traditional solutions involve two paralleled inverter systems at the same site. This increases the balance of the system cost as well as the control complexity. Furthermore, high-power step-up transformers are needed to connect to the distribution grid, further increasing the capital cost, land use and installation cost. Combining PV and BES into a single inverter system without the 60Hz step-up transformer is therefore very attractive as the next generation technology for utility scale solar. This effectively calls for the development of a PV+BES Solid State Transformer (PVS-SST). This paper proposes a 13.8kV/3MVA PVS-SST targeting 13.8 kV grid connection on the AC side and 1500V PV farm on the DC side. The PVS-SST utilizes a modular SST concept with total 27 SiC submodules. Each submodule is based on 1700V SiC power MOSFET devices and single stage DAB-based DC/AC power conversion technology. In order to utilize the inevitable parasitic capacitances in the actual hardware, a novel turn-off loss model is proposed and experimentally verified. A comprehensive optimization strategy including the proposed novel turn-off loss model, ZVS range, deadtime calculation, and minimum circulation current is proposed. Medium frequency transformer (MFT) design to achieve very high efficiency and isolation voltage is a grand challenge in the proposed PVS-SST and is discussed in detail. The power-density of the SiC power submodule is 1.6MW/m3 (26W/inch3). The PVS-SST control architecture is discussed with a focus on voltage balancing and real and reactive power controls.

This paper proposes an intensive study for common-mode voltage (CMV) elimination/reduction in a five-level dual T-type multilevel converter (5LDT-MLC) drive. An advanced and fast model predictive control (MPC) approach is developed for CMV reduction (CMVR) and CMV elimination (CMVE) based on preselection of the switching states (SS). In addition, the proposed approach considers the torque control and the capacitor balancing of the proposed drive as essential aspects of MLC drives. A detailed study for the impact of the converter SS on the CMV is presented. The main features of the proposed MPC approach are reducing the complexity of the cost-function, the tuning burden of the weighting factors, and the computation time by more than 80% compared to conventional MPC techniques. A hardware implementation based on Silicon Carbide (SiC) T-type MLC is built. The experimental results demonstrate the effectiveness of the proposed MPC approach to mitigate/eliminate the CMV along with achieving the torque command and balancing the DC link capacitors. Unlike conventional CMVR techniques, the proposed approach reduces the CMV by 75% of its normal values without jeopardizing the harmonic contents, drive efficiency, and flux as well as torque ripples.

In this paper, a robust wireless power transfer (WPT) system considering a wide variation in load resistance and coupling coefficient is proposed for electric vehicles (EVs) charging. Here, a new implementation of the parity-time(PT)-symmetric circuit using a phase synchronization method is presented, in which a power-adjustable negative resistor is constructed only by a single-stage inverter. Moreover, based on the PT-symmetric circuit, a control strategy that does not require dual-side communication and extra dc-dc converters is developed for battery charging. Theoretical analysis shows that constant current (CC) and constant voltage (CV) outputs independent of load and position can be achieved, and the charging mode can be switched automatically. A scaled-down prototype with an 8 A charging current and a 120 V charging voltage is built to verify the feasibility of the proposed method. Experimental results demonstrate that within the transfer distance of 10-25 cm, the CC/CV outputs can be maintained during the charging process.

Line-commutated converters are extensively used as the interface between ac grids and classic HVDC systems. At the inverter side, commutation failure of switches is one of the most common faults that can pose threats to the system operation. Practical and reliable study of such phenomena relies on accurate and efficient converter models for simulations. Recently, a parametric average-value model (PAVM) has been presented for acdc rectifiers, which considers the internal faults of the converter. In this paper, the PAVM methodology is extended to the dcac inverter systems, including the commutation failure of switches. The proposed PAVM also augments an automatic fault detection technique to determine the faulty switches. Using comprehensive simulation studies, the developed model is verified to accurately predict the commutation failure of switches and reconstruct the waveforms consistent with the detailed switching models of inverters while being computationally more efficient. The proposed PAVM is envisioned to be an efficient and accurate asset for simulation of HVDC systems and inevitable when faults of switches need to be considered.

A three-level bidirectional AC-DC converter with H8 topology is proposed to combine the advantages of both neutral-point clamped and flying-capacitor three-level converters for medium voltage AC-DC solid-state transformer applications. The innovative H8 converter features self-balanced capacitor voltage, common-mode voltage elimination, and small capacitance of the flying capacitors. The proposed carrier-based modulation enables the H8 converter to operate under both active and reactive power conditions. A 10 kVA AC-DC converter prototype with 1.7 kV SiC MOSFETs and 3.3 kV SiC diodes verifies the feasibility and advantages of the proposed topology and the modulation method. The capacitance of the flying capacitors in the H8 converter is reduced by 45 times compared to that of the flying-capacitor converters. The H8 converter efficiency is tested up to 99% at 2 kV DC voltage. The proposed H8 converter is suitable for the next-generation PV inverter, grid-forming inverter, MV fast charger, and SST applications.

The advancements in smart grid technologies had brought forth the prospect of self-healing distribution grid through intentional islanding, aided by the steadily rising penetration of inverter-based distributed generations (IBDGs). Adaptive protection is the key enabler for this resilient grid architecture. For cost-effectiveness, overcurrent relays (OCRs) with adaptive features had been proposed, often with the sensitivity problem due to low short-circuit current magnitude from the IBDG taken into consideration and largely addressed. However, apart from this widely discussed sensitivity problem, there is an underlying issue on selectivity of the OCR which is frequently disregarded when designing an adaptive overcurrent protection scheme for IBDG dominated microgrid. This selectivity problem is mainly caused by the current diversion to load during fault, which is often disregarded when performing OCR grading for a conventional grid. In this paper, this selectivity problem of the OCR is discussed in depth through a comparative study of conventional grid and a modern IBDG dominated grid. The coordination time interval margin violations problems are demonstrated through theoretical calculations and real-time hardware-in-the-loop experiments. This research aims to provide better insights into the selectivity problem as a step towards achieving a cost-effective yet reliable overcurrent-based adaptive protection for IBDG dominated microgrid.

Different harmonic mitigation techniques have been utilized in grid-connected inverters to suppress the effect of grid voltage distortion on the output current of these inverters. In practice, to scale up the injected current into the grid, a set of parallel grid-connected inverters are often utilized rather than a single high-power inverter in solar Photovoltaic or motor drive systems. Conventional Point of Common Coupling (PCC) feedforward approaches have been used for harmonic rejection of multi-parallel grid-connected inverters. However, these methods need to implement a separate feedforward scheme for each individual inverter. In this paper, a novel full PCC voltage feedforward strategy is proposed to reduce the cost investment, which is implemented only in one of the grid-connected inverters. The proposed strategy is based on cancelling the total parallel admittance of the system by adding a virtual negative admittance to the target inverter. It is shown that the proposed scheme causes no instability issue on the system since it does not affect the system phase margin. To verify the efficiency of the proposed strategy against emitted harmonics from the grid, simulations and experiments on a system with two parallel single-phase grid-tied inverters are performed.