1. Effects of Fabrication Parameters on the Electrical Stability of Gate Overlapped Lightly Doped Drain Polysilicon Thin-Film Transistors
- Author
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Luigi Mariucci, Antonio Valletta, A. Bonfiglietti, Guglielmo Fortunato, and Matteo Rapisarda
- Subjects
inorganic chemicals ,Fabrication ,Materials science ,genetic structures ,Physics and Astronomy (miscellaneous) ,Gate overlapped lightly doped drain (GOLDD) ,General Physics and Astronomy ,Electrical stability ,Bias stress ,law.invention ,Condensed Matter::Materials Science ,law ,Condensed Matter::Superconductivity ,Hot carrier effect (HCE) ,Doping profile ,Thin-film transistors (TFTs) ,Kink effect ,business.industry ,Transistor ,Doping ,technology, industry, and agriculture ,General Engineering ,social sciences ,Thin-film transistor ,Optoelectronics ,Degradation (geology) ,lipids (amino acids, peptides, and proteins) ,Condensed Matter::Strongly Correlated Electrons ,business ,human activities - Abstract
We analysed the electrical characteristics and the stability of gate overlapped lightly doped drain (GOLDD) thin-film transistors (TFTs) with different channel length, n- region doping concentration and lateral doping profile at the junctions. A reduction of kink effect and an increase of device stability have been observed with the increase of the lateral doping profile. These results are explained by numerical simulation of electrical characteristics and hot carrier induced degradation. We found that different doping profiles produce, after bias stress, different interface state distributions across the channel/n- and n-/n+ junctions.
- Published
- 2006