114 results on '"Truong T"'
Search Results
2. WFIRST Low Order Wavefront Sensing and Control (LOWFS/C) Performance on Line of Sight Disturbances from Multiple Reaction Wheels
3. WFIRST low order wavefront sensing and control testbed performance under flight like photon flux
4. WFIRST low order wavefront sensing and control testbed performance under flight like photon flux
5. Effects of Mitochondrial-Targeted Human Catalase in Skeletal Tissue of Mice Exposed to Simulated Spaceflight
6. Simulated Space Radiation and Weightlessness: Vascular-Bone Coupling Mechanisms to Preserve Skeletal Health
7. Dynamic testbed demonstration of WFIRST Coronagaph Low Order WaveFront Sensing and Control (LOWFS/C)
8. Dynamic testbed demonstration of WFIRST Coronagaph Low Order WaveFront Sensing and Control (LOWFS/C)
9. Simulated Space Radiation and Weightlessness: Vascular-Bone Coupling Mechanisms to Preserve Skeletal Health
10. WFIRST Coronagraph Low Order Wavefront Sensing and Control (LOWFS/C) dynamic demonstration
11. WFIRST Coronagraph Low Order Wavefront Sensing and Control (LOWFS/C) dynamic demonstration
12. Mitochondrial Oxidative Stress: Importance for Skeletal Structure and Responses to Simulated Spaceflight
13. Effects of Simulated Spaceflight on Mitochondrial Oxidative Stress in Bone Remodelling
14. Transgenic Mouse Model for Reducing Oxidative Damage in Bone
15. WFIRST Coronagraph Low Order Wavefront Sensing and Control (LOWFS/C)
16. WFIRST Coronagraph Low Order Wavefront Sensing and Control (LOWFS/C)
17. Transgenic Mouse Model for Reducing Oxidative Damage in Bone
18. Real-time wavefront processors for the next generation of adaptive optics systems: a design and analysis
19. Real-time wavefront processors for the next generation of adaptive optics systems: a design and analysis
20. The algebraic decoding of the (41, 21, 9) quadratic residue code
21. A VLSI architecture for simplified arithmetic Fourier transform algorithm
22. A VLSI design for a trace-back Viterbi decoder
23. Fourier analysis and signal processing by use of the Moebius inversion formula
24. A VLSI design for a systolic Viterbi decoder
25. Simplified Correction Of Errors In Reed-Solomon Codes
26. Fast transform decoding of nonsystematic Reed-Solomon codes
27. Decoding of 1/2-rate (24,12) Golay codes
28. A new VLSI architecture for a single-chip-type Reed-Solomon decoder
29. A simplified procedure for decoding the (23,12) and (24,12) Golay codes
30. A comparison of VLSI architecture of finite field multipliers using dual, normal, or standard bases
31. Efficient multiplication algorithms over the finite fields GF(q sup m), where q equals 3,5
32. A pipeline design of a fast prime factor DFT on a finite field
33. A comparison of VLSI architectures for time and transform domain decoding of Reed-Solomon codes
34. Fast-Polynomial-Transform Program
35. A simplified procedure for correcting both errors and erasures of a Reed-Solomon code using the Euclidean algorithm
36. A complex integer multiplier using the quadratic-polynomial residue number system with numbers of form (2 exp 2n) + 1
37. A new VLSI complex integer multiplier which uses a quadratic-polynomial residue system with Fermat numbers
38. A comparison of VLSI architecture of finite field multipliers using dual, normal or standard basis
39. A VLSI single chip (255,223) Reed-Solomon encoder with interleaver
40. A VLSI architecture of a binary updown counter
41. A single VLSI chip for computing syndromes in the (225, 223) Reed-Solomon decoder
42. Techniques for computing the discrete Fourier transform using the quadratic residue Fermat number systems
43. The VLSI design of an error-trellis syndrome decoder for certain convolutional codes
44. A VLSI architecture for performing finite field arithmetic with reduced table look-up
45. A new VLSI complex integer multiplier which uses a quadratic-polynomial residue system with Fermat numbers
46. VLSI Architectures for Computing DFT's
47. Simplified Decoding of Convolutional Codes
48. A VLSI pipeline design of a fast prime factor DFT on a finite field
49. Single-Chip VLSI Reed-Solomon Encoder
50. Multiplier Architecture for Coding Circuits
Catalog
Books, media, physical & digital resources
Discovery Service for Jio Institute Digital Library
For full access to our library's resources, please sign in.