35 results on '"Agarwal, Alpana"'
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2. Entropy optimized semi-supervised decomposed vector-quantized variational autoencoder model based on transfer learning for multiclass text classification and generation
3. Prioritizing implications of Industry-4.0 on the sustainable development goals: A perspective from the analytic hierarchy process in manufacturing operations
4. A Machine Learning Driven PVT-Robust VCO with Enhanced Linearity Range
5. A 1 μs Locking Time Dual Loop ADPLL with Foreground Calibration-Based 6 ps Resolution Flash TDC in 180 nm CMOS
6. Functional validation of highly synthesizable voltage comparator on FPGA
7. Performance of Copper Sulfide Hollow Rods in a Supercapacitor Based on Flexible Substrates
8. Intra and inter-patient arrhythmia classification using feature fusion with novel feature set based on fractional-order and fibonacci series
9. Voltage Controlled Ring Oscillator with Phase Compensation Technique for Jitter Reduction in 180 nm CMOS Technology
10. Voltage Controlled Ring Oscillator with Phase Compensation Technique for Jitter Reduction in 180 nm CMOS Technology.
11. Modelling Key Drivers of Employee Behaviour for Personal and Professional Excellence.
12. An Efficient R-Peak Detection Using Riesz Fractional-Order Digital Differentiator
13. Modelling the barriers to blockchain implementation in human resource function
14. Analysis of barriers in green human resource implementation for enhancing organizational sustainability: a DEMATEL approach
15. Impact of Social Media on Spiritual Tourism in India: An SEM analysis of the critical factors impacting on decision making
16. A 1 μs Locking Time Dual Loop ADPLL with Foreground Calibration-Based 6 ps Resolution Flash TDC in 180 nm CMOS
17. A Scalable Fully-Digital Differential Analog Voltage Comparator
18. Methodology for Hardware testing of an Application Specific Integrated Circuit (ASIC).
19. Unsteady development of a deformable bubble rising in a quiescent liquid
20. Analysis of barriers in green human resource implementation for enhancing organizational sustainability: a DEMATEL approach
21. A Scalable Fully-Digital Differential Analog Voltage Comparator.
22. A review on MXene for energy storage application: effect of interlayer distance
23. A Wide Frequency Range Low Jitter Integer PLL with Switch and Inverter Based CP in 0.18 μm CMOS Technology
24. A 2.3 mW Multi-Frequency Clock Generator with −137 dBc/Hz Phase Noise VCO in 180 nm Digital CMOS Technology
25. An Efficient R-Peak Detection Using Riesz Fractional-Order Digital Differentiator
26. Implementation of Low Supply Rail-to-Rail Differential Voltage Comparator on Flexible Hardware for a Flash ADC
27. Fast digital foreground gain error calibration for pipelined ADC
28. Highly‐digital voltage scalable 4‐bit flash ADC
29. A Wide Frequency Range Low Jitter Integer PLL with Switch and Inverter Based CP in 0.18 μm CMOS Technology.
30. A 2.3 mW Multi-Frequency Clock Generator with −137 dBc/Hz Phase Noise VCO in 180 nm Digital CMOS Technology.
31. Implementation of Low Supply Rail-to-Rail Differential Voltage Comparator on Flexible Hardware for a Flash ADC.
32. Low‐power 10‐bit 100 MS/s pipelined ADC in digital CMOS technology
33. A Digital-Based Low-Power Fully Differential Comparator
34. Highly‐digital voltage scalable 4‐bit flash ADC.
35. A Digital-Based Low-Power Fully Differential Comparator.
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