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Abstract This study presents a binarized neural network (BNN) comprising quasi‐nonvolatile memory (QNVM) devices that operate in a positive feedback loop mechanism and exhibit an extremely low subthreshold swing (≤ 5 mV dec−1) and a high on/off ratio (≥ 107). A pair of QNVM devices are used for a single synaptic cell in a cell array, in which its memory state represents the synaptic weight, and the voltages applied to the pair act as input in a complementary fashion. The array of synaptic cells performs matrix multiply‐accumulate (MAC) operations between the weight matrix and input vector using XNOR and current summation. All the results of the MAC operations and vector‐matrix multiplications are equivalent. Moreover, the BNN features a high accuracy of 93.32% in the MNIST image recognition simulation owing to high device uniformity (1.35%), which demonstrates the feasibility of compact and high‐performance neuromorphic computing.

Abstract In this study, a binarized neural network (BNN) of silicon diode arrays achieved vector–matrix multiplication (VMM) between the binarized weights and inputs in these arrays. The diodes that operate in a positive-feedback loop in their p+-n-p-n+ device structure possess steep switching and bistable characteristics with an extremely low subthreshold swing (below 1 mV) and a high current ratio (approximately 108). Moreover, the arrays show a self-rectifying functionality and an outstanding linearity by an R-squared value of 0.99986, which allows to compose a synaptic cell with a single diode. A 2 × 2 diode array can perform matrix multiply-accumulate operations for various binarized weight matrix cases with some input vectors, which is in high concordance with the VMM, owing to the high reliability and uniformity of the diodes. Moreover, the disturbance-free, nondestructive readout, and semi-permanent holding characteristics of the diode arrays support the feasibility of implementing the BNN.

Abstract In this study, a triple‐gated transistor with a p+‐i‐n+ silicon nanosheet (NS) is proposed as a single synaptic device, and bidirectional synaptic functions are realized using reconfigurable memory characteristics. The triple‐gated NS transistor features steep switching and bistable characteristics with a subthreshold swing below 5 mV dec−1 and an ON/OFF current ratio of ≈5 × 106 for both the n‐ and p‐channel modes. This transistor exhibits electrically symmetric reconfigurable memory characteristics with an ON current ratio of 1.02 for the n‐ and p‐channel modes. Moreover, the bidirectional synaptic weight updates of binarized spike‐timing‐dependent plasticity learning are successfully performed in a single transistor. This study demonstrates the potential of a triple‐gated NS transistor for achieving compact synaptic arrays in large‐scale silicon‐based neuromorphic computing systems.

In the process of implementing and trying various measures to achieve carbon neutrality around the world, Korea is also presenting various policies to advance to a low-carbon economy. Energy prosumer is a consumer who produces electricity directly and sells surplus electricity after consumption through an electric power company. Currently, advanced countries such as the U.S. and Germany are developing various business models beyond the initial energy prosumer model. However, in Korea, it is difficult for individuals to directly participate in the electricity market and buy and sell electricity due to policy limitations and complex reasons. In addition to these problems, low electricity bills and relatively high solar power prices are factors that hinder energy prosumers. Basically, in order for energy prosumers to be activated, the unit price of solar power must be lower than the unit price of electricity bill. In addition, an electricity market must be formed in which individuals can freely trade, and policies and legislation must be prepared to support them. If such a step is prepared to revitalize energy prosumers, energy self-sufficiency will be possible and a new energy industry will be established. Ultimately, decentralized resource systems such as smart grids are activated, enabling carbon neutrality. As the unit price of solar power in Korea has fallen and electricity bills are on the rise, energy prosumer’s prospects are positive. If the electricity bill system is implemented first through restructuring of the electricity industry, it will be possible to establish the energy prosumer system in Korea while trying to develop various energy prosumer business models and transaction methods.

Abstract A reconfigurable logic‐in‐memory (R‐LIM) cell performs logic‐in‐memory functions as well as reconfigurable logic gates. The R‐LIM cell is constructed with triple‐gated (TG) feedback field‐effect transistors (FBFETs) that are reconfigured in n‐channel or p‐channel modes via electrostatic doping. Each TG FBFET has one control gate electrode and two program‐gate electrodes that determine the channel mode. Their reconfigurability enables the symmetrical operation of the n‐channel and p‐channel modes through an on‐current ratio of 1:04. Furthermore, the R‐LIM cell performs eight Boolean logic operations, storing the logic outputs for ≈100 s under zero‐bias conditions. The R‐LIM cell is useful for developing in‐memory computing systems with high energy efficiency and functional logic.

Abstract The reconfigurable feedback field‐effect transistors (R‐FBFETs) with a double‐gated structure are designed and the logic and memory operations of a logic‐in‐memory (LIM) inverter comprising two R‐FBFETs are investigated. The R‐FBFETs exhibit an extremely low subthreshold swing of ≈1 mV dec−1, a high on/off current ratio of ≈107, and a long retention time of 10 s, owing to a positive feedback loop mechanism. The on‐current ratio of the p‐ to n‐channel modes is 1.03, which indicates a high degree of reconfigurability. The LIM inverter retains the output logic “1” and “0” states for over 50 s under zero‐bias conditions. The symmetric reconfigurable switching and memory operations of the R‐FBFETs enable the LIM inverter to perform logic and memory operations for a long retention time without a power supply.

Abstract In this study, the logic‐in‐memory operations are demonstrated of ternary NAND and NOR logic gates consisting of double‐gated feedback field‐effect transistors. The component transistors reconfigure their operation modes into n‐ or p‐channel modes by adjusting the gate biases. The highly symmetrical operation between these operation modes with an excellent on‐current ratio of 1.03 enables three distinguishable and stable logic levels in the ternary logic gates. Moreover, the ternary logic gates maintain the three logic states for several tens to hundreds of seconds under zero‐bias condition. This study demonstrates that the ternary logic gates are promising candidates for next‐generation low‐power computing systems.