Search

Space vector modulation (SVM) is a mature modulation scheme, which is widely used for voltage source inverters. In this article, a flexible online SVM scheme is proposed for a cascaded H-bridge multilevel inverter (CHMI) under short-circuit and open-circuit switch as well as cell failure conditions. The proposed scheme directly calculates all the active redundant switching states and the dwelling duty cycles of the three space vectors enclosing the reference vector for a CHMI such that balanced line-to-line voltages and currents under failure conditions are generated. Accordingly, the resultant switching sequences are determined to meet any specific requirement, e.g., even-order harmonics elimination and minimization of switching losses. Furthermore, in order to reduce voltage stress on the semiconductors under short- and open-circuit switch conditions, an equal power distribution criterion is introduced. The proposed SVM scheme is fast and independent of the number of levels. Experimental results are presented to demonstrate performance and effectiveness of the proposed scheme. [ABSTRACT FROM AUTHOR]

Varistors are widely used in dc circuit breaker (DCCB) application as fault energy absorption elements, which is not an application the varistors are originally designed for. The fault energy stress adversely impacts the varistor lifetime, thus affecting DCCB reliability and performance. This article presents two methods for choosing the appropriate varistor type and arrangement in a DCCB by linking 1) varistor lifetime and 2) DCCB component- and system-level parameters. The first method uses a set-based design approach with random Latin hypercube sampling to narrow down viable solutions. In comparison, the second method relies on a point-based design approach and proposes an integer programming problem to optimize varistor lifetime. Both procedures are applied to the selection of varistors in 1) a 12 kV DCCB rated for 2-kA nominal current and a peak fault current of 15 kA and 2) a reduced-scale 1.2-kV DCCB hardware prototype, using publicly available varistor data. The article shows the possibility of design for varistor lifetime in DCCB applications, and concludes that both selection procedures provide consistent, reasonable, and verifiable results. However, the results also pinpoint the significant gaps and call for future work on impulse stress versus lifetime relationships for DCCB varistors. [ABSTRACT FROM AUTHOR]

This article proposes a multiport modular single-stage current-source solid-state transformer (SST) for applications like photovoltaic, energy storage integration, electric vehicle fast charging, data center, etc. The 7.2 kV 50 kVA current-source SST consists of five input-series output-parallel modules, each based on 3.3 kV SiC reverse-blocking mosfet-plus-diode modules. The proposed SST has some unique features. First, compared with the voltage-source or matrix converter-based SSTs, the current-source SST has a unique advantage of single-stage isolated ac/dc or ac/ac conversion with an inductive dc link, but no medium-voltage (MV) ac experiments have been reported. This article for the first time demonstrates MV ac current-source SST up to 7.5 kV peak. Second, the multiport SST has a buffer port for active power decoupling (APD) or energy storage integration. The double-line-frequency power ripple from single-phase ac grid normally results in a large capacitor size in MV SSTs. The APD scheme is proposed in MV applications for the first time to enable a reduced dc link and the electrolytic capacitor-less SST with high reliability. Third, for a direct grid-connected converter without line-frequency transformer, insulation and protection are critical. A medium-frequency transformer design passes 55 kV basic-insulation level (BIL) and 60 kV high potential dielectrics withstand test with only 0.09% leakage inductance. Importantly, a lightning protection scheme is presented to protect the SST itself from 90 kV BIL impulse. Fourth, the proposed current-source SST topology is a modular soft-switching solid-state transformer (M-S4T) with full-range zero-voltage switching and controlled dv/dt for low electromagnetic interference. These concepts are verified in a three-port M-S4T prototype with forced oil cooling under single-module, stacked-module, steady-state, and dynamic operations. [ABSTRACT FROM AUTHOR]

The hybrid AC/DC admittance of interlinking converters operating under AC voltage control mode may contain right half-plane (RHP) pole(s), and thus, the existing harmonic stability analyses on grid-tied interlinking converter systems may become inapplicable as well. Aiming at addressing this deficiency, this letter modifies the hybrid AC/DC admittance definition and re-studies the harmonic stability of a grid-tied interlinking converter operating under AC voltage control mode. The results reveal that when the control mode of an interlinking converter changes from $P/Q$ control to AC voltage control, the system minor-loop gain utilized to assess the AC-side stability evolves to its inverse matrix. In contrast, the stability assessment related to the DC side (and the coupling interaction between the AC and DC sides) remains unchanged. Furthermore, the DC- and AC-side stabilities can also be regulated independently and are dominated by the $d$ -axis and the $q$ -axis controllers, respectively. [ABSTRACT FROM AUTHOR]

The dc-capacitor voltage drift is the main technical drawback of a multilevel diode-clamped converter (DCC) system. This paper proposes a space vector modulation (SVM)-based switching strategy that takes advantage of the redundant switching states of the SVM to counteract the voltage drift phenomenon of a five-level DCC-based back-to-back high-voltage direct-current (HVDC) converter system. The proposed strategy is based on online minimization of a quadratic cost function, associated with the voltage deviations of the dc capacitors. The salient feature of the proposed strategy is that it enables voltage balancing of the dc capacitors with no requirements for offline calculations, additional controls, or auxiliary power circuitry. Performance of the proposed SVM-based balancing strategy for a back-to-back HVDC converter system, based on time-domain simulation studies in the PSCAD/EMTDC environment, is evaluated and experimentally verified. The studies demonstrate capability of the proposed SVM strategy to control and maintain voltage balance of dc capacitors. Index Terms--AC-DC-AC converter, dc-capacitor voltage balancing, high-voltage direct-current (HVDC) transmission, multilevel converter, sinusoidal pulsewidth modulation (SPWM), space vector modulation (SVM).

In this article, an optimized design for a dual-coupled inductor–capacitor–capacitor-series (LCC-S)-compensated wireless power transfer (WPT) system with zero-phase angle (ZPA) input condition and load-independent constant current (CC) output is presented. To this end, based on the misalignment characteristics of the reversed-series compensation coil structure, a novel design method for determination of the compensation parameters is proposed. By introducing a stability factor, any restriction on the variation correlation of the mutual inductances between the transmitter and receiver coils, and between the compensation and receiver coils within the range of misalignment tolerant design, is eliminated, thereby increasing the degree of freedom in the coil structure. According to a predetermined misalignment tolerant range, the proposed method can limit the fluctuation of the output current within a certain range and maintain the ZPA input condition. A 200-W/85.3-kHz prototype based on the proposed method is implemented and its performance is experimentally validated. The system can operate in ZPA input and load-independent CC output with a misalignment tolerance factor of 4, as the load varies from 5 to 20 $\Omega$. [ABSTRACT FROM AUTHOR]

The phenomenon of dc-capacitor-voltage drift is the main technical drawback of a passive front-end multilevel diode-clamped converter (DCC). This paper formulates and analyzes the dc-capacitor-voltage-drift phenomenon of a passive front-end five-level DCC, which operates based on a sinusoidal pulsewidth-modulation (SPWM) switching strategy. The analysis shows dependence of the voltage drift on the modulation index and the ac-side power factor of the DCC. The analysis concludes that an SPWM strategy, without the use of auxiliary power circuitry, is not able to prevent the voltage-drift phenomenon of a five-level DCC. This paper also proposes a space-vector-modulation (SVM)-based switching strategy that takes advantage of redundant switching vectors of the SVM method to counteract the voltage-drift phenomenon. The limit to the range of operation of a five-level DCC, which is based on the proposed SVM strategy, is also presented. The salient feature of the proposed strategy is that it enables voltage balancing of the dc capacitors with no requirements for additional controls or auxiliary-power circuitry, within the specified range of operation. The performance of a DCC under various operating conditions, based on time-domain simulation studies in the MATLAB/SIMULINK environment, is evaluated. This paper demonstrates capability of the proposed SVM strategy to control and maintain voltage balance of dc capacitors. Index Terms--Capacitor-voltage balancing, multilevel converter, sinusoidal pulsewidth modulation (SPWM), space-vector modulation (SVM).

This paper presents the application of a space vector modulation (SVM) strategy for a multimodule converter system that 1) enables low switching frequency, 2) eliminates/minimizes ac-side voltage harmonics, particularly low-order harmonics, and 3) provides maximum ac-side fundamental voltage component. The SVM strategy is based on a sequential sampling technique. The SVM provides harmonic cancellation/minimization by introducing appropriate phase shift for the corresponding voltage harmonics of the converter modules, while maintaining the fundamental voltage components of modules in-phase to obtain maximum ac-side voltage. The SVM eliminates the need for complicated transformer arrangement for harmonic reduction, and thus provides high degree of modularity by utilization of identical transformers for converter modules. The proposed SVM strategy is developed for a back-to-back HVDC converter station in which each converter system is composed of four identical modules. Based on a dynamic model of the system, converter controls are designed and performance of the SVM strategy in terms of converter harmonics and dynamic performance are presented. The studies are performed in time-domain, using the PSCAD/EMTDC software tool. Index Terms--Dynamic model, harmonics, HVDC, multimodule converter, space vector modulation (SVM).

Three-level neutral point clamped (NPC) voltage source converters have recently emerged as important alternatives to conventional two-level converter topologies in high-power medium-voltage energy conversion applications, particularly in high performance ac motor drive systems. An all-inclusive modulation strategy for NPC converters should have the capability of extending the operating range of the converter into the overmodulation region with a smooth and linear transition characteristic. An overmodulation switching strategy based on the space vector classification technique for three-level NPC converters is introduced in this paper. The proposed overmodulation modes, make possible continuous control of the output voltage up to the maximum possible with a smooth linear transition characteristic, and minimum distortions. A theoretical basis for the vector classification space vector modulation technique in the overmodulation region is presented, and the proposed overmodulation schemes are validated by analysis, simulation and experimentation on a 2-KVA three-level NPC converter laboratory prototype. Index Terms--Classification Algorithm, overmodulation, space vector modulation (SVM), three-level converter.

This paper presents a space vector modulation (SVM)-based switching strategy for a three-level neutral point clamped (NPC) converter that is adapted as a STATCOM. The main feature of the proposed SVM switching strategy is that it enables balancing voltages of the dc capacitors, with no requirement of additional controls or auxiliary devices. The proposed SVM strategy also improves the STATCOM ac-side harmonic spectrum and reduces voltage variations of the converter neutral point. Based on a dynamic model of the NPC-based STATCOM, two controllers to regulate the dc-side voltage and control the injected reactive power are designed. Performance of the STATCOM and the corresponding controllers are evaluated based on digital time-domain simulation studies in the PSCAD/EMTDC environment. The studies demonstrate the capabilities of the proposed SVM technique to maintain voltage balance of the dc capacitors and control the STATCOM reactive power exchange for various operating conditions. Index Terms--Control design, dynamic model, multilevel converter, space vector modulation, static compensator (STATCOM).

Force-commutated multiconverter systems have been proposed and recently implemented for high power applications, particularly high-voltage direct current (HVDC) transmission and flexible ac transmission systems (FACTS) devices, including STAtic var COMpensators (STATCOM). This paper demonstrates that pulse-width modulation (PWM) based on space vector modulation (SVM), and using low switching frequencies (a few hundred Hertz) can be implemented in multimodule power converter systems. The proposed scheme is based on a delayed sampling technique and allows output voltage control and minimization of harmonic components. Pattern generation options are analyzed and system waveforms are presented for different switching frequencies and number of modules. Results are validated by simulation and confirmed by experiments on a 5-kVA prototype unit. Index Terms--Delayed sampling technique, multimodule converters, space vector modulation (SVM).

Growing concerns with the harmonic oscillation phenomenon of multiterminal DC (MTDC) systems calls for appropriate harmonic stability analysis methods. However, the conventional ac or dc admittance-based stability assessment methods cannot effectively protect trade secret and user privacy, distinguish different system instability root causes, and put forward corresponding instability mitigation methods. To address the aforementioned issues, this article first establishes a hybrid ac/dc admittance-based stability assessment model for a MTDC system. Then, by introducing the determinant-based General Nyquist Criterion (GNC), the system stability is assessed and three types of instability root causes, including the ac side, the dc side, and the coupling interaction between the ac and dc sides are identified. Regarding the instability caused by the ac side, the dominant interlinking converter is directly identified, in which the instability can be mitigated by reshaping its q-axis admittance. In contrast, for the instability caused by the latter two root causes, the most influential interlinking converter is recognized by an additional sensitivity analysis. The instability is then mitigated by reshaping the dc-side equivalent admittance of the most influential interlinking converter. Compared with the conventional methods, the proposed method offers advantages as follows: 1) trade secret and user privacy is effectively protected, 2) different system instability root causes can be effectively distinguished, and 3) instabilities caused by diverse root causes can be mitigated by corresponding methods. Finally, the proposed method is verified by simulations in the MATLAB/Simulink environment. [ABSTRACT FROM AUTHOR]

Medium-voltage dc (MVdc) grids are attractive for electric aircraft and ship power systems, battery energy storage system (BESS), fast charging electric vehicle (EV), etc. Such EV or BESS applications need isolated bidirectional MVdc to low-voltage dc (LVdc) or LVac converters. However, the existing Si-based solutions cannot fulfill the requirements of a high-efficiency and robust converter for MVdc grids. This article presents a 5-kV SiC-based universal modular solid-state transformer (SST). This universal current-source SST can interface either an LVac or LVdc grid with an MVdc grid in single-stage power conversion, while the conventional dual-active bridge (DAB) converter needs an additional inverter. The proposed SST module using 3.3-kV SiC MOSFETs and diodes is bidirectional and can serve as a building block in series or parallel for higher voltage higher power systems. The topology of each module is based on the soft-switching solid-state transformer (S4T) with reduced conduction loss, which features reduced electromagnetic interference electromagnetic interference (EMI) through controlled dv/dt, and high efficiency with full-range zero-voltage switching for main devices and zero-current switching for auxiliary devices. Operation principle of the modular S4T (M-S4T), capacitor voltage balancing control between the cascaded modules, design of components including a medium-voltage (MV) medium-frequency transformer (MFT) to realize a 50-kVA, 5-kV dc to 600 V dc or 480 V ac M-S4T are presented. Importantly, the MV MFT prototype achieves very low leakage inductance (0.13%) and 15-kV insulation with coaxial cables and nanocrystalline cores. The proposed universal modular SST is compared against the DAB solution and verified with dc–dc and dc–ac simulation and 4-kV experimental results. Significantly, the MV experimental results of a modular dc transformer with each module at MVdc are rarely covered in the literature and reported for the first time. [ABSTRACT FROM AUTHOR]

High-fidelity electromagnetic transient (EMT) simulation plays a critical role in understanding the dynamic behavior and fast transients involved in operation, control, and protection of multiterminal dc (MTdc) grids. This article proposes a cost-effective high-performance real-time EMT simulation platform for large-scale cross-continental MTdc grids based on graphics processing unit (GPU). Fast dynamic transients from both ac and dc networks are captured in real time with 5 μs time step, using advanced hybrid-discretized modular multilevel converter model, frequency-dependent transmission line model, and EMT-type model of synchronous generators. The proposed simulation platform i) assembles detailed EMT models of all components within an MTdc–ac grid into a single platform. This setup provides a complete simulation solution to capture fast transient signals required for high-bandwidth controller design and protection studies without any compromise; ii) implements the first GPU-based simulation architecture and corresponding algorithms for MTdc–ac grids with real-time performance at scales of 1s; iii) is highly efficient and balances the high utilization of GPU resources and low latency required for the simulation; and iv) outperforms the existing central processing unit- or digital signal processor (DSP)/field-programmable gate array-based simulators in terms of its higher scalability on large-scale MTdc–ac grids and superior price–performance ratio on the hardware. Accuracy and performance of the proposed platform are evaluated with respect to the reference results from power system computer aided design (PSCAD)/EMTdc environment. [ABSTRACT FROM AUTHOR]

Expansion of the DC distribution networks in the future power system has raised concerns over their stability assessment. To assess stability of the expanded DC distribution networks, the conventional zone aggregation method requires access to not only the nodes connected to the converters but also some other nodes within the DC passive network. However, access to the nodes within the DC passive network is not always feasible as some parts of the DC network may be buried or encapsulated. To address this issue, this paper proposes a new zone aggregation method for impedance-based stability assessment of the expanded DC-distribution networks. Compared with the conventional method, the main advantages of the proposed method are as follow: i) it only utilizes the impedance/admittance information of the nodes connected to the converters. Moreover, all the impedances/admittances can be measured directly without knowing the internal structure and/or parameters; ii) it can assess stability of expanded distribution networks with minimum number of nodes. Performance and effectiveness of the proposed method are evaluated and validated by simulation studies on a 10-bus DC distribution network and a modified IEEE 37-bus system in the Matlab/Simulink software environment. [ABSTRACT FROM AUTHOR]

This article proposes a magnetic integration design for EV wireless power transfer (WPT) systems, where the compensation and transmitting coils overlap one on top of the other to share the ferrite layer without any decoupling consideration. The magnetic field generated by both the compensation and transmitting coils are exploited to transfer power. To this end, a compensation method is proposed to enable magnetic field enhancement without any reactive power flow between the compensation and the transmitting coils, and to achieve input zero phase angle and constant current output. In addition, an efficient finite element analysis-based coil optimization algorithm is proposed to improve the coil misalignment tolerance on the horizontal plane, in which a reversely connected inner coil is used to stabilize the system output under misalignment conditions. Analytical and simulation results confirm transmission flux density enhancement and reduced leakage field characteristics of the proposed coil design. Finally, a scaled-down WPT prototype is built and tested to verify the performance and effectiveness of the design. The proposed design achieves 91.17% efficiency and misalignment tolerance up to 200 mm in any XY-direction while maintaining the power transfer and its efficiency. The results of this work provide insights into magnetic integration design of high-order compensation topologies featuring higher compactness, less ferrite usage, magnetic field enhancement, and misalignment tolerance for WPT systems. [ABSTRACT FROM AUTHOR]

In the future power systems, a large number of offshore wind farms will be connected to the AC grids through high voltage DC (HVDC) and multi-terminal DC (MTDC) grids. As wind power penetration level increases, complex grid codes and regulations will be imposed on wind turbines for frequency support. To follow any grid code and requirement for frequency support, two important features should be included in the wind turbine frequency support: i) It should be able to adjust the maximum additional power that the wind turbine temporarily provides for frequency support; ii) It should be capable of adjusting the time interval in which the wind turbine provides additional temporary power. The first feature is mainly important for reducing rate of change of frequency (RoCoF) and improving the frequency nadir while the second one is mainly important for fast frequency recovery from its nadir and improving the second frequency drop. This paper indicates that the conventional method cannot offer both of the two aforementioned features. To address this issue, two approaches are proposed for frequency support by wind turbines. The first one uses P-ωr and P-ƒWF droops in each wind turbine controller, where P, ωr, and ƒWF represent the wind turbine power, rotor speed, and wind farm frequency. The second method employs P-ωr and P-ƒWF droops in each wind turbine controller. Performance and effectiveness of the proposed methods are evaluated by time-domain simulation studies on an MTDC grid in the PSCAD/EMTDC software environment. [ABSTRACT FROM AUTHOR]

Silicon carbide (SiC) MOSFETs with ratings of 3.3 to 15 kV represent a dramatic improvement over available silicon devices, enabling the realization of medium-voltage converters in demanding applications such as solid-state transformers. Typical voltage-source converter configurations realize significant reduction in switching loss with SiC devices, but high dv/dt of 30–50 kV/μs generates high levels of electromagnetic interference (EMI) and displacement currents. Current-source based zero-voltage switching (CS-ZVS) converters such as the soft-switching solid-state transformer (S4T), dramatically reduce switching loss using ZVS, thus realizing both controlled dv/dt and low EMI. CS-ZVS converters require reverse blocking (RB) modules that are realized using series connection of a diode and a MOSFET. However, no data are available from manufacturers or from literature on RB module characterization under ZVS conditions. This article presents detailed characterization results and model extraction for a 3.3 kV 45 A and a 1.7 kV 10 A SiC RB module, under both hard switching and ZVS modes. A novel double-pulse testbed is designed and built for this characterization of RB devices under both hard switching and ZVS conditions. Significantly, it is shown that when the RB modules are used in CS-ZVS converters, the dynamic voltage sharing between the RB modules in a phase leg and within the RB module (between the diode and the switch) results in a unique voltage stress. Modulation strategies to address this unique voltage stress are proposed and verified through experiment results, using a S4T prototype rated at 1.5 kV, 10 kVA. [ABSTRACT FROM AUTHOR]

The cascaded H-bridge multilevel converter (CHMC) is a promising topology for medium- and high-voltage applications, as it features modularity and scalability. In this letter, a simplified space vector modulation (SVM)-based reconfiguration strategy is proposed to enable fault-tolerant operation of a CHMC. Assuming that the faulty power cells are bypassed, the proposed strategy decomposes the asymmetric CHMC into two parts, i.e., healthy part with healthy modules and unhealthy part with faulty modules. Consequently, the basic reference vector (BRV) and the remainder reference vector (RRV) are generated from the reference vector (RV) to achieve balanced line-to-line voltages and currents with optimized harmonic performance. The proposed strategy can be easily implemented online. Performance and effectiveness of the proposed strategy is verified by experimental results. [ABSTRACT FROM AUTHOR]

This article proposes a mission profile-based reliability prediction method for modular multilevel converters (MMCs). It includes key modeling steps, such as long-term mission profile, analytical power loss models, system-level and component-level thermal modeling, lifetime modeling, Monte Carlo analysis, and redundancy analysis. Thermal couplings and uneven thermal stresses among submodules are considered. A case study of a 15-kVA down-scale MMC has been used to demonstrate the proposed method and validate the theoretical analysis. The outcomes serve as a first step for developing realistic reliability analysis and model-based design methods for full-scale MMCs in practical applications. [ABSTRACT FROM AUTHOR]

This paper proposes a time-domain method to calculate the fault response in multiterminal dc (MTdc) grids and the performance of hybrid dc breakers. The proposed method, based on traveling waves: 1) provides a sound representation of fault performance by considering all created traveling waves; 2) introduces a new approach to estimate the reflection coefficients; and 3) provides an approximation of the worst case fault location. Then, based on the analytical results, three parameters of the hybrid dc circuit breaker, i.e., current limiting reactor, arrester rated voltage, and time delay are optimally selected with respect to maximum overcurrent, maximum overvoltage, fault clearance time, and energy absorption in arresters through multiobjective optimization. Accuracy and performance of the proposed method are evaluated and verified by time-domain simulation studies in the power systems computer aided design (PSCAD)/electromagnetic transients including DC (EMTDC) environment using frequency-dependent models. The results confirm reasonable accuracy of the proposed fault performance calculation and represent a further step towards optimized design of hybrid dc circuit breakers. [ABSTRACT FROM AUTHOR]

The increasing power/load demand is becoming a new concern for the grid operators as it can potentially overload transmission lines. Among advantages of a multi-terminal dc (MTDC) grid, its high controlability makes it a promising asset for ac line overload alleviation. This paper proposes a model predictive control based strategy, which regularly updates the power setpoints of the MTDC converter stations and ac generators to alleviate ac line overloads. To compute and update the power setpoints, necessary measurements are received by the controller within regular time intervals. The proposed controller ensures that subsequent to any ac line overload, changing the power setpoints of the MTDC converter station does not cause any operation violation in the MTDC grid. Furthermore, it ensures that the ac voltage limits and voltage stability criteria are met to avoid voltage instability. Performance and effectiveness of the proposed controller are evaluated by simulation studies on two systems, i.e., the 39-bus New England system integrated with a 5-bus MTDC system and the IEEE 118-bus system connected to a 6-bus MTDC system. Simulation results confirm that the MTDC grid can play a major role in controlling active powers of most of the ac transmission lines. [ABSTRACT FROM AUTHOR]

A sequential switching strategy for hybrid dc circuit breaker (CB) is proposed to improve transients during dc fault interruption in multiterminal high voltage direct current (HVdc) grids. Compared to the conventionally tripped dc CB, the proposed switching strategy, which sequentially trips the breaking modules within the CB, reduces the peak fault current and overvoltage as well as fault clearance time. These metrics are analytically computed through a time-domain calculation approach considering the traveling wave phenomena in dc transmission systems. By rescheduling the tripping sequence and optimal rating and number of individual modules of the CB, the energy distributed among the modules is well balanced. Finally, an analytic evaluation of the proposed sequential tripping is performed and, subsequently, the best practice and the optimal design process are provided. Performance of the sequential switching strategy as well as the optimal design process are verified through simulation studies in the PSCAD/EMTdc software environment. [ABSTRACT FROM AUTHOR]

The dc–dc modular multilevel converter (MMC), derived from the ac–dc MMC, is an attractive converter topology for interconnection of medium-/high-voltage dc grids. The dc–dc MMC generates an ac voltage component in each arm to drive an ac circulating current for maintaining the energy balance of its submodule capacitors. The power transfer capability of the dc–dc MMC and the amplitude of the ac circulating current are closely coupled with the available arm ac voltage headroom. As the voltage conversion ratio of the dc–dc MMC deviates from 0.5, the power transfer capability of the converter diminishes. This paper proposes an enhanced closed-loop control strategy, which increases the power transfer capability and at the same time reduces the ac circulating current of the dc–dc MMC. Performance and effectiveness of the proposed control strategy are demonstrated by simulation studies in the MATLAB/Simulink as well as experiments conducted on a laboratory prototype. [ABSTRACT FROM AUTHOR]

The alternate arm converter (AAC) is a promising candidate for HVdc converter stations due to its reduced number of devices and capability of blocking the dc fault current. This paper is focused on modeling and control of the AAC with an extended overlap period. First, a generic mathematical model considering all the switching state combinations of the AAC is developed, which governs the characteristic of the time-varying, three-phase imbalanced circuit parameters of the AAC. Based on the developed model, an ac-side current control strategy with a feed-forward compensation method to overcome the time-varying nature of the circuit parameters is proposed. Then, by introducing the so-called “double-overlap period,” a synthetic circulating current strategy is proposed, which enables both dc current active filtering and zero-current switching of the director switches. The validity of the model and effectiveness of the proposed strategies are confirmed by simulation studies on an HVdc system. [ABSTRACT FROM AUTHOR]

The modular multilevel converter (MMC) has become the most promising converter topology for medium- and high-power applications. In this paper, a sliding mode control (SMC) based method is proposed for the MMC. Based on analysis of the system dynamics under the proposed control method, relations among control parameters and their validity conditions are obtained, which provide a guidance for systematic controller design. Compared with the conventional proportional-integral based method, the proposed SMC-based method provides comparable steady state performance and faster dynamic responses, without compromising the computational effort or requirement for precise system model. Simulation studies in the PSCAD/EMTDC software environment are carried out to validate the performance and effectiveness of the proposed control method in the context of an HVdc transmission system. A laboratory prototype is also developed to experimentally validate the proposed control method. [ABSTRACT FROM AUTHOR]

Protection against dc faults is one of the main technical challenges for the operation of converter-based HVdc systems. Protection becomes even more challenging when the HVdc systems are expanded to multi-terminal dc (MTdc) grids with more than two terminals/converter stations. Similar to their ac counterparts, proper protection of the MTdc grids necessitates both primary and backup protection schemes in which, in case of malfunctioning/failure of primary protection, backup protection trips as fast as possible. Although several backup relaying algorithms, such as current threshold- and classifier-based methods, have been proposed, none of them offers sufficient speed, robustness, and scalability. In this paper, a novel backup protection algorithm based on quickest change detection technique is proposed, which offers fast and robust backup protection functionality for the primary relay. The performance and effectiveness of the proposed algorithm are evaluated and verified with time-domain simulation studies in the PSCAD/EMTDC environment. The study results confirm satisfactory performance of the proposed algorithm in terms of accuracy, robustness, and speed under various fault scenarios. The proposed method is applicable to different grid configurations and is able to cooperate with different primary protection algorithms and breaker configurations. [ABSTRACT FROM AUTHOR]

This paper presents a general space vector modulation (SVM) method for the modular multilevel converter (MMC). Compared with earlier modulation methods, the proposed SVM method not only utilizes the maximum level number (i.e., $2n+ 1$, where $n$ is the number of submodules in the upper or lower arm of each phase) of output phase voltages, but also leads to an optimized control performance in terms of capacitor voltage balancing, circulating current suppression, and common-mode voltage reduction. The maximum level number is achieved by introducing a new equivalent circuit of the MMC, and the optimized control is obtained by selecting the optimal redundant switching states. Since the computational burden of the SVM scheme is independent of the voltage level number, the proposed method is well suited to the MMC with any number of submodules. Simulation and experimental results are presented to validate the proposed method. [ABSTRACT FROM PUBLISHER]

The modular multilevel converter (MMC) has become the most attractive converter technology for medium/high-power applications, specifically for high-voltage dc (HVdc) transmission systems. One of the technical challenges associated with the operation and control of the MMC-based system is to precharge the submodule (SM) capacitors to their nominal voltage during the startup process. In this paper, considering various SM circuits, a generalized precharging strategy is proposed for the MMC-based systems, which can implement soft startup from the dc or ac side. The proposed precharging strategy can be applicable for various SM circuits and MMC configurations. The proposed startup strategy does not require extra measurements and/or auxiliary power supplies. The charging current is controlled by adjusting the changing rate of the number of blocked and bypassed SM capacitors. Based on the proposed startup strategy, the startup processes of MMC/MMC-HVdc systems with various SM circuits are analyzed and a generalized startup procedure for various MMC-HVdc systems is proposed. In addition, the uncontrollable steady-state SM capacitor voltages of various MMC-based systems are analyzed and the associated precharging time is also investigated. Performance of the proposed strategy for various MMC-HVdc systems is evaluated based on time-domain simulation studies in the PSCAD/EMTDC software environment and experimental results are based on a scaled-down prototype. [ABSTRACT FROM PUBLISHER]

The three-level neutral point-clamped (NPC) converter has attracted much attention in high-power medium-voltage applications, but it is well-known that the NPC topology suffers from unequal power loss distribution among its semiconductor devices. The power loss unbalance problem becomes especially severe when the converter is operating at low fundamental frequencies. To overcome the loss unbalance problem of the NPC converter, the active NPC (ANPC) technique was introduced. However, it is demonstrated in this paper that in many cases, the conventional modulation method for the ANPC converter only marginally relieves the loss unbalance problem. This paper proposes a new modulation scheme (named the adaptive doubled frequency modulation) for the three-level ANPC converter, which significantly improves the power loss and thermal sharing among the semiconductor devices. The basic idea of the proposed scheme is adaptively adjusting the duty cycles of the switching states for every switching cycle, so as to optimize the power loss distribution. Simulation and experimental results verify this new method. [ABSTRACT FROM AUTHOR]

The dc–dc modular multilevel converter (MMC), which has originated from the ac–dc MMC circuit topology, is an attractive converter topology for interconnection of medium-/high-voltage dc grids. Proper operation of the dc–dc MMC necessitates injection of an ac circulating current to maintain its submodule (SM) capacitor voltages balanced. The ac circulating current, however, needs to be minimized for efficiency improvement. In addition, a unique type of imbalance amongst the SM capacitor voltages that is caused by dc power flow needs to be mitigated. This paper proposes a closed-loop control strategy for the dc–dc MMC to simultaneously regulate the dc-link currents, maintain the SM capacitor voltages balanced, and minimize the ac circulating current. Performance and effectiveness of the proposed control strategy are evaluated based on simulation studies in the MATLAB Simulink and experimentally verified on a laboratory prototype. [ABSTRACT FROM AUTHOR]

The modular multilevel converter (MMC) has become one of the most promising topologies for high-voltage applications. Although the MMC has a modular and redundant structure, which can significantly enhance its reliability and fault tolerance, its fault handling capability can be further improved by adopting a postfault strategy. In this paper, a postfault strategy based on the neutral-shift method is proposed, which, subsequent to bypassing the faulty submodule(s), aims at improving the maximum attainable line-to-line voltages of the MMC. Based on a newly developed internal variable analysis method, the impact of the neutral-shift strategy on the operation of the MMC is analyzed. In conjunction with the proposed postfault strategy, a modified circulating current suppression (CCS) method is used to mitigate the double-frequency component of the circulating currents. Performance and effectiveness of the proposed neutral-shift strategy with and without the CCS method is evaluated based on time-domain simulation studies in the PSCAD/EMTDC software environment. [ABSTRACT FROM PUBLISHER]

The dc–dc modular multilevel converter (MMC), which originated from the ac–dc MMC, is an attractive converter topology for the interconnection of medium-/high-voltage dc grids. This paper presents design considerations for the dc–dc MMC to achieve high efficiency with reduced component sizes. A steady-state mathematical model of the dc–dc MMC in the phasor domain is developed. Based on the developed model, a design approach is proposed to size the components and to select the operating frequency of the converter to satisfy a set of design constraints while achieving high efficiency. The design approach includes sizing the arm inductor, submodule capacitor, and phase filtering inductor along with selection of the ac operating frequency of the converter. The accuracy of the developed model and the effectiveness of the design approach are validated based on the simulation studies in the PSCAD/EMTDC software environment. The analysis and developments of this paper can be used as a guideline for designing the dc–dc MMC. [ABSTRACT FROM PUBLISHER]

The modular multilevel converter (MMC) has become one of the most promising converter topologies for medium/high-power applications. Since the MMC is structured based upon stacking up a number of series-connected identical submodules (SMs), to improve its fault tolerance and reliability, SM failure detection and location is of significant importance. In this paper, the impact of open-circuit switch failures of the SMs on the operation of the MMC is analyzed. Based on the analysis under SM failure conditions, two SM failure detection and location methods are proposed, that is, a clustering algorithm (CA)-based method and a calculated capacitance (CC)-based method. In the proposed CA-based method, a pattern-recognition-based fault diagnosis approach, which employs the clustering algorithm to detect and locate the faulty SMs with open-switch failures through identifying the pattern of 2-D trajectories of the SM characteristic variables, is developed. The proposed CC-based method is based on the calculation and comparison of a physical component parameter, that is, the nominal SM capacitance, and is capable of failure detection, location, and classification within one stage. The performance of the proposed failure detection methods for an MMC system is evaluated based on time-domain simulation studies in the PSCAD/EMTDC software environment. The reported study results demonstrate the capabilities of the two proposed methods in detecting and locating any SM failure under various conditions accurately and efficiently. [ABSTRACT FROM PUBLISHER]

One of the main technical challenges associated with the modular multilevel converter (MMC) for any application is the optimal control of its states. Optimal control of the MMC requires determination of the following: 1) an accurate MMC model, 2) the MMC states to be controlled and their corresponding reference trajectories, and 3) an appropriate controller type/form and its parameters. The aforementioned tasks lead to the formulation of a multistate control optimization problem, which is tackled in this paper. This paper enhances the accuracy of the existing MMC state-space model by including the following: 1) a piecewise affine insulated-gate bipolar transistor/diode model and 2) the impact of dead time. This paper also proposes a simulation-based gradient-descent optimization algorithm (cosimulation) to optimize the controller gains, given the controller type/form and the reference state trajectory. The theoretical proofs of the gradients required in the optimization algorithm are also provided. The aforementioned optimization algorithm is applied to a variable-frequency MMC-based drive system. Experimental results on a scaled-down prototype and simulation results on a real-world application are provided to validate the accuracy of the proposed MMC model and to show the effectiveness of the proposed optimization algorithm. [ABSTRACT FROM AUTHOR]

The modular multilevel converter (MMC) has attracted significant interest for medium-/high-power energy conversion applications due to its modularity, scalability, and excellent harmonic performance. One of the technical challenges associated with the operation of the MMC is the circulation of double-frequency harmonic currents within its phase legs. This paper proposes a circulating current control strategy in a double-frequency rotating reference frame, which, contrary to the existing solutions that are based on approximate/inaccurate models, relies on an experimentally identified nonparametric model of circulating currents to determine the coefficients of the controller. Minimizing the squared second norm of the error between the open-loop transfer function of the system and a desired one, the coefficients of the controller are determined. To guarantee the stability of the closed-loop system, the minimization problem is subjected to a few constraints. The validity and effectiveness of the proposed control strategy is confirmed, and its dynamic performance is compared with that of an existing solution by experimental results. [ABSTRACT FROM AUTHOR]