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This study introduces an enhanced thermal management strategy for efficient heat dissipation from GaN power amplifiers with high power densities. The advantages of applying an advanced liquid-looped silicon-based micro-pin fin heat sink (MPFHS) as the mounting plate for GaN devices are illustrated using both experimental and 3D finite element model thermal simulation methods, then compared against traditional mounting materials. An IR thermography system was equipped to obtain the temperature distribution of GaN mounted on three different plates. The influence of mass flow rate on a MPFHS was also investigated in the experiments. Simulation results showed that GaN device performance could be improved by increasing the thermal conductivity of mounting plates’ materials. The dissipated power density of the GaN power amplifier increased 17.5 times when the mounting plate was changed from LTCC (Low Temperature Co-fired Ceramics) (k = 2 Wm−1 K−1) to HTCC (High-Temperature Co-fired Ceramics) (k = 180 Wm−1 K−1). Experiment results indicate that the GaN device performance was significantly improved by applying liquid-looped MPFHS, with the maximum dissipated power density reaching 7250 W/cm2. A thermal resistance model for the whole system, replacing traditional plates (PCB (Printed Circuit Board), silicon wafer and LTCC/HTCC) with an MPFHS plate, could significantly reduce θjs (thermal resistance of junction to sink) to its theoretical limitation value.

This paper presents micro-Pirani vacuum gauges using low-resistivity monocrystal silicon for the heaters and the heat sinks. We designed a new Pirani gauge with an embedded Wheatstone bridge made by thick-silicon resistors that allows an improvement in resolution and sensitivity. With the optimized Wheatstone bridge structure, the temperature coefficient of the gauges pressure measure decreases from 2.5%/°C to 0.74%/°C, and the resolution was optimized from 0.071 to 0.008 Torr at 1 Torr. In addition, the gauges were packaged into non-hermetic cavities by wafer-level AlGe eutectic bonding to undergo the wafer-dicing process, with sensitivity improved from 1.65 to 17.1 V/Torr at 1 Torr.

This paper presents a wafer-level packaged MEMS (Micro-electromechanical Systems) Pirani gauge with surrounded heat sinks with improved characteristics during the low limit of the cavity vacuum. Different to the reported gauges in other papers, it has four heat sinks, and one of these is the cap of the wafer-level package. And it utilizes two heaters and two constant resistors to construct an Whetstone Bridge, two meander-shaped suspended silicon coils is set as the heaters and two isolated comb-shaped silicon structures as the dual-lateral heat sinks. In addition, the substrate and capped wafers are used as dual-vertical heat sinks. The gauge is finally realized with the volume 1.4mm×1.2mm×0.5mm using the CMOS (Complementary Metal Oxide Semiconductor)-MEMS compatible process. The gauge was measured twice before and after wafer-level packaging. It denotes that with the introduction of the capped heat sink, the device bears a better sensitivity compared to the intermediate device before packaging. With a hole on the edge of the device, the gauge could be widely and flexibly used for the characterization of vacuum packaged MEMS devices.

Ultra-low pressure application of Pirani gauge needs significant improvement of sensitivity and expansion of measureable low pressure limit. However, the performance of Pirani gauge in high vacuum regime remains critical concerns since gaseous thermal conduction with high percentage is essential requirement. In this work, the heat transfer mechanism of micro-Pirani gauge packaged in a non-hermetic chamber was investigated and analyzed compared with the one before wafer-level packaging. The cavity effect, extremely important for the efficient detection of low pressure, was numerically and experimentally analyzed considering the influence of the pressure, the temperature and the effective heat transfer area in micro-Pirani gauge chamber. The thermal conduction model is validated by experiment data of MEMS Pirani gauges with and without capping. It is found that nature gaseous convection in chamber, determined by the Rayleigh number, should be taken into consideration. The experiment and model calculated results show that thermal resistance increases in the molecule regime, and further increases after capping due to the suppression of gaseous convection. The gaseous thermal conduction accounts for an increasing percentage of thermal conduction at low pressure while little changes at high pressure after capping because of the existence of cavity effect improving the sensitivity of cavity-effect-influenced Pirani gauge for high vacuum regime.

As the costs of packaging and testing account for a substantial portion of microelectromechanical system (MEMS) devices, an effective and convenient characterization method is urgent to be investigated to lower the cost. In this paper, an electrical test method was utilized, and the test key used for a four-probe current-voltage test was designed to monitor the quality of the AuSn eutectic bonding. The electrical test can directly detect whether or not voids existed in the bonding layer. The difference in alloy state, for example, the existence of the (Au, Ni) 3Sn2 phase confirmed by the scanning electron microscope and energy dispersive x-ray spectroscopy test, can also be reflected by resistivity variation. The electrical test can be implemented automatically and conveniently unlike other characterization methods. Therefore, it is suitable to be applied in quality inspection in industrial production.