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A bipolar junction transistor (BJT)‐based CMOS temperature sensor exploiting the piecewise BJT process spread compensation property of the base recombination current is proposed to reduce the process variations of the base–emitter voltage (Vbe). The weighted combinations of different on‐chip resistors are explored to minimise their associated process spread. Fabricated in standard 0.18‐μm CMOS, the chip prototype occupies an active area of 0.036 mm2 and draws 3 μA from a 1.2 V supply, with a measured maximum inter‐/intra‐die variation in Vbe of <1.5 mV from −40 to 125°C from two batches. Using the measured Vbe, ΔVbe and the first‐batch‐only calibration parameters, the chip prototype demonstrates an untrimmed batch‐to‐batch inaccuracy of ± 1.5°C (3σ) within the same temperature range (24 samples from 2 batches). [ABSTRACT FROM AUTHOR]

A compact voltage-mode bandgap voltage reference (BGR) is presented. Instead of using overhead circuits, the silicon bandgap narrowing effect is exploited for bipolar junction transistor’s (BJT) curvature reduction and residual curvature correction. Prototype measurements in a 0.18- \mu \textm standard CMOS process show that the curvature of the BJT is effectively reduced from its inherent 3.6 mV to 1.4 mV. The proposed BGR measures a minimum temperature coefficient of 8.7 ppm/ °C from −55 °C to 125 °C by batch trimming one resistor. After a curvature trimming, it further improves to 4.1 ppm/ °C. The BGR has a minimum supply voltage of 1.3 V, 4.3 \mu \textA nominal current consumption, 0.03%/V line sensitivity, and 2 mV/mA load sensitivity at 25 °. The output rms noise in the $0.1\sim 10$ -Hz band measures 10.23 \mu \text{V} . [ABSTRACT FROM PUBLISHER]

This letter presents a compensation topology which minimizes the inter-/intra-die spread and proportional-to-absolute-temperature (PTAT) drift of the base–emitter voltage ( V\text {be} ) of a bipolar junction transistor (BJT). Without using special devices, the base recombination current from a deep-saturated BJT is utilized in this scheme. Before compensation, the V\text {be} standard deviation (STD) of 15 standalone BJTs measures 3.24 mV at 25 °C with constant external bias currents. After compensation, V\text {be} STD of 30 dies from two batches reduces to 1.8 mV with on-chip bias current. The PTAT drift of V\text {be} as that in typical BJT-based designs are also alleviated. [ABSTRACT FROM PUBLISHER]