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A new soft-punch-through (SPT) buffer concept for 600-1200 V insulated-gate bipolar transistors (IGBTs) based on thin wafer technology is proposed. The new SPT structure employs an epitaxial layer for the lightly doped n-type drift region, which is grown on a thick starting material or substrate. The n-type substrate serves as the SPT buffer region. The doping concentration of both drift and buffer regions are comparably low with the buffer region having a higher doping level. The design options of this new concept are discussed based on experimental data and 1200 V IGBTs using the new buffer concept are compared to IGBTs employing previously published buffer technology.

A new type of high-voltage termination, namely the “deep p-ring trench” termination design for high-voltage, high-power devices, is presented and extensively simulated. Termination of such devices consumes a large proportion of the chip size; the proposed design concept not only reduces the termination silicon area required but also removes the need for an additional mask as is the case of the traditional p+ ring-type termination. Furthermore, the presence of the p-ring under and around the bottom of the trench structure reduces the electric field peaks at the corners of the oxide, which results in reduced hot carrier injection and improved device reliability.

A novel Trench IGBT design, namely the p-ring Trench Schottky IGBT, with improved latch-up immunity and an enhanced safe-operating area is proposed. This design improves the performance of the FS+ IGBT by facilitating the collection of holes through a p-doped (p-ring) buried region connected through a Schottky contact to the source/cathode contact. This unique structure approach allows the improvement in the device reliability and it is shown under numerical studies to be highly effective in expanding the safe operating area (SOA), suppress dynamic avalanche, improve the latch up robustness and have the potential to improve the device switching operation.

The maximum-punch-through (MPT) buffer is a state-of-the-art insulated gate bipolar transistor (IGBT) field stop concept compatible with $\ge$ 200 mm diameter and thin wafer technology. $(\lt 200 \mu \mathrm{m})$ This buffer concept suited for low voltage (LV $\lt 2000\mathrm{V})$ applications has been studied here in the full technology curve V$_{CE} - E_{off}$ range. Furthermore, the extended operational capabilities and limitations of this buffer concept in terms of reverse bias safe operating area (RBSOA) and short-circuit (SC) have been evaluated. This was done in enhanced planar IGBT technology for 1200 V and 1700 V, 150 A rated, 13.6 x 13.6 mm2 devices within a wide operation temperature up to 175°C. In here we show how the RBSOA and SCSOA capabilities of the MPT buffer devices can be extended when low turn-off losses are required at room temperature. This was accomplished by the simple implementation of an extra proton peak creating the so-called controlled punch through (CPT) buffer making an already robust field stop technology stronger.

In this paper, the oscillation mechanism limiting the ruggedness of insulated gate bipolar transistors (IGBTs) is investigated through both circuit and device analysis. The work presented here is based on a time-domain approach for two different IGBT cell structures (i.e., trench-gate and planar), illustrating the two-dimensional effects during one oscillation cycle. It has been found that the gate capacitance varies according to the strength of the electric field near the emitter, which in turn leads to charge-storage effects associated with low carrier velocity. For the first time, it has been discovered that a parametric oscillation takes place during the short circuit in IGBTs, whose time-varying element is the Miller capacitance, which is involved in the amplification mechanism. This hypothesis has been validated through simulations and its mitigation is possible by increasing the electric field at the emitter of the IGBT with the purpose of counteracting the Kirk effect.

In this paper, we will present an overview of the latest results covering both Insulated Gate Bipolar Transistor (IGBT) and packaging technologies intended for demanding high-power applications. We will present the recently developed press pack module rated at 4500 V and 3000 A utilizing an advanced reverse conducting RC-IGBT for hard switching application, which together with the improved module layout yields the most powerful IGBT-based device up to date. For applications that require isolated modules, we will show our new dual IGBT module rated up to 3.3 kV and 450 A. The module layout was optimized to allow highly scalable converter designs with overall low stray inductances. This opens up new possibilities to further reduce losses due to the fact that the devices can be made thinner than today’s limits for achieving lower switching losses with soft performance. We will show the latest results from the enhanced trench IGBT-cell development and give an outlook for the power levels that can be achieved by combining the new cell with the RC-IGBT concept.

In this paper, the impact of the p-n-p bipolar transistor gain on the short-circuit behavior of high-voltage trench insulated-gate bipolar transistors (IGBTs) is analyzed. The short-circuit ruggedness against high-frequency oscillations is strongly improved by increasing the hole current supplied by the collector. By doing so, the electric field at the emitter of the IGBT is increased and less influenced by the amount of the excess charge (i.e., the electric field is fixed). The charge-field interactions during the short circuit event, leading to periodic charge storage and charge removal effect and provoking miller capacitance variations, can be mitigated. The effectiveness of using IGBTs with a high bipolar gain is validated through both simulations and experiments, also a design rule to tradeoff the IGBT’s losses and short-circuit robustness is provided.

The design elements of the Bi-mode Insulated Gate Transistor BIGT show that the combination of the high hole injection levels supplied from the collector together with the presence of a localized lifetime control at the MOS cells have brought improvements on the short circuit capability, strongly minimizing the high-frequency oscillations observed in IGBTs. The BIGT concept and the traditional IGBT structures have been compared under short circuit conditions to investigate the charge-field interactions at the MOS cells, triggering the oscillation mechanism. The effect of the lifetime control and the irradiation method on the short circuit capability is investigated.

In this paper, we present and discuss simulation and experimental results obtained from investigating the impact of local alterations of the electric field profile in the power device planar junction termination region. Such local modifications are due to possible various extrinsic causes (manufacturing, operational or environmental) and are shown to have a critical influence on the device voltage blocking capability and reliability. The results point towards junction termination sensitivity to locally modified fields especially under voltage switching conditions due to higher leakage current densities in the modified area compared to the rest of the JT region.

A shallow phosphorus buffer peak has been added to state-of-the-art planar soft punch through IGBT buffer (1200 V and 1700 V, 150 A, 13.6 × 13.6 mm2) to lower the leakage current and expand the temperature operation range up to 200°C. The new buffer design is experimentally demonstrated to provide rugged switching (RBSOA) up to 200°C without compromising other high performance characteristics like soft switching and short circuit capability.

In this paper we present a low leakage current 6.5 kV field shielded anode (FSA) diode with high forward bias safe operating area (FBSOA) ruggedness capable of reliable operation up to 150 °C. This is achieved through optimization of the junction termination, the resistive zone (RZ) between this area and the active region and selective shallow ion irradiation for local lifetime control. As a result, the diode maintains or exceeds the softness, surge current and FBSOA capabilities set by the 6.5 kV carrier axial lifetime (CAL) diode, while also reducing its (125 °C) leakage current by more than 4 times achieving magnitudes typically associated with low leakage emitter efficiency control (EMCON) based concepts.

In this paper, a 3.3-kV Enhanced Trench IGBT has been designed with a high emitter efficiency, for improving its short-circuit robustness. The carrier distribution profile has beenshaped in a way that it is possible to increase the electric field at the surface of the IGBT, and thereby, counteract the Kirk Effect onset. This design approach is beneficial for mitigatinghigh-frequency oscillations, typically observed in IGBTs under short-circuit conditions. The effectiveness of the proposed design rule is validated by means of mixed-mode device simulations. Then, two IGBTs have been fabricated with different emitter efficiencies and tested under short circuit, validating that the high-frequency oscillations can be mitigated, with higher emitter efficiency IGBT designs.

Despite the previously reported benefits of High Voltage Reverse Conducting RC-IGBT concepts such as the BIGT, the main obstacle for adopting them in mainstream applications is the dependency of the diode conduction losses on the applied gate voltage polarity. In most applications, adaptations are required at both control and gate drive levels for providing lower diode conduction losses. The paper investigates this particular issue with respect to the device design. With the aid of both simulation and experimental results, an advanced low loss BIGT, which can operate efficiently under all gate bias conditions is proposed.

In this paper, a 3300V Bimode Insulated Gate Transistor BIGT chip utilizing an Enhanced Trench MOS cell is demonstrated. The paper provides an insight into the ET-BIGT device design along with the static and dynamic electrical results obtained from the first manufactured prototypes. The combined advantages of a low loss Enhanced Trench cell concept and BIGT chip integration sets a new milestone for delivering higher output power for the next generation BIGT power modules.

The purpose of this work is the experimental extraction of the local average temperature occurring in silicon resistors when a transmission line pulse is applied. The local temperature is determined by combining transmission line pulses of different amplitude and at different ambient temperatures with three-dimensional electro-thermal simulation. The obtained calibration curves can be applied to convert the phase shift information as obtained by interferometric techniques (e.g. in Transient Interferometric Mapping) into absolute temperature readings.

A novel insulated gate bipolar transistor (IGBT) featuring thin-wafer processing and a combined dopant activation laser annealing and contact metal laser sintering is presented. The device concept includes a new back-side boron anode (collector) activation process by laser annealing through a titanium layer to enhance the absorption of the deposited energy from the laser beam. This technology enables improved activation control of the anode injection efficiency for thin-wafer-based IGBTs rated normally below 1700 V. The IGBT concept will therefore be provided with a wider range of performance options on the loss technology curve when compared to state-of-the-art devices processed with conventional activation techniques.

The BIGT is a Reverse Conducting IGBT device which combines functionality of a high power IGBT and fast diode on a single chip. In this paper, an investigation of the IGBT mode short circuit performance of the BIGT is carried out. The behavior of the BIGT under IGBT mode short circuit conditions is illustrated by measurements on a 3.3kV 1500A HiPak1 module and then supported by circuit and detailed device physics simulations. The short circuit conditions of type II and type III are discussed, with the variations introduced due to the gate control of the BIGT when operated in reverse conducting mode. Comparison to standard IGBTs with Soft-Punch-Through (SPT) technology in a HiPak2 module is also provided.

In this paper, we introduce the Field Shielded Anode (FSA) concept that enables higher temperature operation of fast recovery diodes with planar junction termination. Conventional diodes utilizing local lifetime control principles show excellent dynamic properties at the expense of a higher leakage current, which is generated during reverse blocking when the space charge region penetrates into the zone containing the radiation defects. In contrast to this, the FSA concept spatially separates the space charge region from the zone with the radiation defects. The ruggedness of conventional diodes can be exceeded with the new FSA concept, while the leakage current is reduced by a factor of ∼4. This was achieved using a special junction extension introduced between the active area and the guard-ring termination. The design parameters and their influence on the softness and the safe-operating area are presented.