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The effects of a metal–interlayer–semiconductor (MIS) source/drain (S/D) contact structure on a dynamic random access memory (DRAM) cell transistor are investigated using 3-D technology computer-aided design simulation. When the MIS S/D contact structure is used in a DRAM cell, the retention time increases by approximately 16.22 times when compared with that of the device using the metal–semiconductor (MS) S/D contact structure owing to the lowered S/D doping concentration, leading to a decrement of the gate-induced drain leakage. Furthermore, the write time and charge-sharing time, respectively, are approximately 0.74 and 0.69 times shorter when compared with the device using the MS S/D contact structure owing to better ohmic characteristics, which increase the drain current during the write/read operations. Thus, the MIS S/D contact structure can effectively enhance the retention and write/read characteristics of a DRAM cell, and it can be a promising S/D contact alternative for the DRAM cell in the sub-2y-nm technology node. [ABSTRACT FROM AUTHOR]

Herein, the line-edge roughness (LER)-induced random performance variation–immune effect of metal–interlayer–semiconductor (MIS) source/drain (S/D) in 7 nm n-type Ge (n-Ge) junctionless field-effect transistors (JLFETs) were investigated by 3-D TCAD simulations. Compared to the device without MIS S/D, the n-Ge JLFET with MIS S/D could effectively reduce the Ge fin doping concentration while maintaining the performance. It was demonstrated analytically that the reduced Ge fin doping concentration of the device with MIS S/D, compared to the device without MIS S/D, decreased the LER-induced random performance variations of the n-Ge JLFET; the standard deviations were reduced to ~0.0318 V for Vth (reduced by ~51.6%), 4.89 ×10−6 A/μm for Ion (reduced by ~92.1%), 1.44 ×10−9 A/μm for Ioff (reduced by ~93.7%), 1.27 mV/dec for SS (reduced by ~23.1%), and ~5.40 mV/V for drain-induced barrier lowering (DIBL) (reduced by ~30.8%). In addition, LER-induced random performance variation was investigated in terms of scaling down fin widths. The results provided critical insight into the variability reduction of the 7 nm n-Ge JLFETs. [ABSTRACT FROM AUTHOR]

We present a universal metal–interlayer–semiconductor (MIS) contact model to demonstrate the effect of Fermi-level unpinning, considering both the extrinsic interface-state density (${D} _{\textsf {it}}$) and the density of metal-induced gap states (${D} _{\textsf {MIGS}}$) at the semiconductor surface. Previous studies on MIS contact modeling have quantified only the impact of ${D} _{\textsf {MIGS}}$ on Fermi-level pinning. However, the extrinsic interface states such as interface traps and local vacancies significantly affect the contact resistivity degradation in MIS contacts. Moreover, field emission (FE) and thermionic FE (TFE) current density models in MIS contact are described in detail, for the extraction of the specific contact resistivity ($\rho _{c}$). The physical validity of the proposed model is demonstrated by comparing its calculated $\rho _{c}$ with those obtained in prior experimental studies employing a GaAs substrate (Ti/ZnO/n-GaAs and Ti/TiO2/n-GaAs). The $\rho _{c}$ values for the MIS contacts are also evaluated with various ${D} _{\textsf {it}}$ levels and the interlayers. This model is promising for the development of a comprehensive next-generation MIS contact for the sub-10-nm complementary metal–oxide–semiconductor technology. [ABSTRACT FROM AUTHOR]

In this paper, the effects of a metal–interlayer–semiconductor (MIS) source/drain (S/D) structure with a heavily doped interlayer on enhancement-mode n-type germanium (Ge) junctionless FinFETs (JLFETs) are demonstrated via 3-D technology computer aided design simulation. N-type Ge JLFETs using metal–semiconductor (MS) S/D structures face difficulty in operating in the enhancement mode, as severe Fermi-level pinning (FLP) triggers extremely high off-state current (${I}_{ \mathrm{OFF}}$) and extremely low on-state current (${I}_{ \mathrm{ON}}$). The MIS S/D structure can solve these problems by mitigating FLP. In the simulation of an n-type Ge JLFET with the MIS S/D structure, ${I}_{ \mathrm{OFF}}$ of $9.42 \times 10^{-10}$ A/ $\mu \text{m}$ , ${I}_{ \mathrm{ON}}$ of $6.09 \times 10^{{-4}}$ A/ $\mu \text{m}$ , and subthreshold slope of 65.38 mV/dec are achieved. The performance of the device for different channel-doping concentrations and fin dimensions is also evaluated. Thus, an MIS S/D structure with a heavily doped interlayer can effectively strengthen the performances of n-type Ge JLFETs beyond the sub-7-nm technology node. [ABSTRACT FROM AUTHOR]

A new method of forming an ohmic contact without an increase in parasitic resistance is proposed in the Ti/GeO2/Ge substrate. Fermi-level depinning in Ti/GeO2/n–Ge contacts is possible with the formation of an interfacial TiOx layer in the contacts via an interfacial reaction. Unlike the intentional deposition of a metal oxide on a Ge substrate, this method provides easy process integration to lessen Fermi-level pinning in n-type Ge substrates. [ABSTRACT FROM PUBLISHER]

Nickel germanide (NiGe) was formed from atomic layer deposition (ALD) Ni on Ge and a subequent annealing process; the Ni film with low resistivity ( 34~\mu \Omega \cdot \text cm ) at 15 nm was obtained by N2 + H2 plasma treatment after Ni precursor injection. The formed NiGe film showed low specific contact resistivity ( \rho c) values of 9.01 \mu \Omega \cdot \text cm^2 for an NiGe/n+Ge contact and 3.61 \mu \Omega \cdot \text cm^2 for an NiGe/p+Ge contact. These values were comparable to those obtained using sputtered Ni. In addition, the ALD process-based NiGe showed excellent thermal/electrical stability up to 600 °C. [ABSTRACT FROM AUTHOR]

The effect of post-deposition H2 annealing (PDHA) on the reduction of a contact resistance by the metal–interlayer–semiconductor (M–I–S) source/drain (S/D) structure of the germanium (Ge) n-channel field-effect transistor (FET) is demonstrated in this letter. The M–I–S structure reduces the contact resistance of the metal/n-type Ge (n-Ge) contact by alleviating the Fermi-level pinning (FLP). In addition, the PDHA induces interlayer doping and interface controlling effects that result in a reduction of the tunneling resistance and the series resistance regarding the interlayer and an alleviation of the FLP, respectively. A specific contact resistivity ( \rho c) of 3.4\times 10^-4 \Omega \cdot \text cm^2 was achieved on a moderately doped n-Ge substrate ( 1\times 10^17 cm ^-3) , whereby $5900\times $ reduction was exhibited from the Ti/n-Ge structure, and a $10\times $ reduction was achieved from the Ti/Ar plasma-treated TiO2–x/n-Ge structure. The PDHA technique is, therefore, presented as a promising S/D contact technique for the development of the Ge n-channel FET, as it can further lower the contact resistance of the M–I–S structure. [ABSTRACT FROM PUBLISHER]

A metal nitride-interlayer-semiconductor source/drain (MN-I-S S/D) model is newly proposed to investigate the effect of tantalum nitride (TaN) on the specific contact resistivity ( \rho c ) of an MN-I-S S/D with an undoped interlayer (undoped-IL) or a heavily doped IL (n+-IL) in sub-10-nm n-type Ge FinFETs. In this model, the workfunction variation of TaN was considered following the Rayleigh distribution. Compared with MN-I-S structures with an undoped-IL, structures with an n+-IL generate much lower \rho c values (i.e., $\sim 2 \times 10^{{\mathbf {-9}}}\Omega \cdot \text {cm}^{2}$ ) and are less prone to variation. In addition, the impact of \rho c variation on device performance is investigated using 3-D technology computer aided design simulation for undoped or heavily doped ILs in MN-I-S S/D structures. MN-I-S S/Ds with an n+-IL can achieve much lower current variation and a higher ON-state drive current. [ABSTRACT FROM PUBLISHER]

In this letter, we discuss the mechanism of Schottky barrier height (SBH) modulation of the TaN/Ge contact by varying the nitrogen concentration in the TaN. The Fermi level, which is strongly pinned near the valence band edge of Ge, moves to the conduction band edge of Ge with higher nitrogen concentration in the reactive sputtered TaN. This SBH modulation is attributed to the presence of an electric dipole induced by Ge–N bonds at the interface of the TaN/Ge contact. This SBH modulation due to the semiconductor-nitrogen bonds at the interface is not specific to TaN/Ge, but rather is a general feature in various transition-metal nitride systems on various semiconductors. [ABSTRACT FROM PUBLISHER]

We investigate the impact of metal-interfacial layer-semiconductor source/drain (M-I-S S/D) structure with heavily doped n-type interfacial layer (n+-IL) or with undoped IL on sub-10-nm n-type germanium (Ge) FinFET device performance using 3-D TCAD simulations. Compared to the metal-semiconductor S/D structure, the M-I-S S/D structures provide much lower contact resistivity. Especially, the M-I-S S/D structure with n+-IL provides much lower contact resistivity, resulting in \sim 5 \times lower contact resistivity than 1\times 10^{\mathrm {\mathbf {-8 }}}~\Omega - \mathrm{cm}^{\mathrm {\mathbf {2}}}$ , specified in International Technology Roadmap for Semiconductors. In addition, we found that the M-I-S structure with n+-IL remarkably suppresses the sensitivity of contact resistivity to S/D doping concentration. [ABSTRACT FROM AUTHOR]

We demonstrate contact resistivity reduction by inserting an Ar plasma-treated TiO2−x heavily doped interfacial layer to metal/semiconductor contact to overcome a Fermi-level pinning problem on germanium (Ge). A specific contact resistivity of \(3.16 \times {10}~^{\mathrm {-3}} \Omega \cdot {\rm cm}^{2}\) on moderately doped n-type Ge substrate \((6\times 10^{16}{\rm cm}^{\mathrm {-3}})\) was achieved, exhibiting \(\times 584\) reduction from Ti/Ge structure, and \(\times 11\) reduction from Ti/undoped TiO2/Ge structure. A novel doping technique for TiO2 interfacial layer at low temperature using Ar plasma was presented to lower \(S/D\) contact resistance in Ge n-MOSFET. [ABSTRACT FROM AUTHOR]

We present a new model to demonstrate the effect of heavily doped interfacial layer (IL) insertion on contact resistivity reduction in metal-germanium (Ge) structure. It is found that the doping of IL results in lowering Schottky barrier of Ge significantly, and based on this lowering effect, a metal-IL-semiconductor model is newly proposed. From this model, the abrupt reduction of contact resistivity is observed in heavily doped condition as IL thickness is increased, and the minimum contact resistivity for \(1 \times 10^{20}\) cm \(^{-3}\) doping concentration is reduced by \(\times 25\) compared with that of undoped one. These results are promising toward enhancing the device performance of Ge MOSFET, which is for sub-22-nm CMOS technology. [ABSTRACT FROM AUTHOR]