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In this paper, a 60 V tolerance transceiver with ESD (electrostatic discharge) protection is proposed for FlexRay-based communication systems. The FlexRay transceiver comprises three protective devices, including an over-voltage detector, high-voltage ESD devices, and high-voltage diodes. The over-voltage detector is in charge of detecting bus (BP and BM) status to distinguish whether any hazard has happened. If the over-voltage detector is activated, the FlexRay transceiver must be turned off for safety. The high-voltage ESD device uses a base-floating PNP serving as a bi-directional device. Besides, it can protect the FlexRay transceiver whenever it is short-circuited in positive or negative high voltages. Notably, the high-voltage diode will eliminate the negative leakage current when negative high voltage hazards appear in FlexRay channels. An experimental prototype is implemented using a 0.18 \mum CMOS mixed-signal based generation II HV BCD process. The measurement results justify the functional correctness and 60 V tolerance of the proposed FlexRay transceiver design. [ABSTRACT FROM AUTHOR]

A novel process and temperature compensation design for 2\,\times\,VDD output buffers is proposed, where the threshold voltages (Vth) of PMOSs and NMOSs varying with process and temperature deviation could be detected, respectively. A prototype 2\,\times\,VDD output buffer using the proposed compensation design is fabricated using a typical 0.18 \mum CMOS process. By adjusting output currents, the slew rate of output signals could be compensated over 117%. The maximum data rate with compensation is 120 MHz in contrast with 95 MHz without compensation, which is measured on silicon with an equivalent probe capacitive load of 10 pF. [ABSTRACT FROM PUBLISHER]

This paper proposes a high speed bidirectional mixed-voltage I/O buffer using 90 nm 1.2 V standard CMOS process. By using a dynamic gate bias generator to provide appropriate gate drive voltages for the output stage, the I/O buffer can transmit/receive 2\timesVDD voltage level signal without any gate-oxide overstress hazard. Most important of all, the gate-oxide overstress hazard is eliminated by adopting a dual-path gate-tracking circuit. The maximum data rate and jitter are measured to be 800 Mbps/12.37 ps and 704 Mbps/14.79 ps for 1.2 V and 2.5 V signal voltage, respectively, with a given capacitive load of 20 pF. [ABSTRACT FROM AUTHOR]