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Switching characteristics of edge and bulk device structures and an unusual backward-scan effect are investigated in SiOx-based resistive memory. Adding external resistance is found to dramatically affect reset voltage, providing insight into the unique unipolar operation. Non-edge, bulk SiOx-based devices allow flexibility in the fabrication process and hydrogen incorporation improves electroforming and device yield. A backward-scan phenomenon is examined by investigating the DC and AC pulse responses, which defines requirements for ON and OFF programming duration. Circuit-level simulation using a Verilog-A model aids device characterization and programming strategy development for future nonvolatile memory applications. [ABSTRACT FROM AUTHOR]

In0.53Ga0.47As and In0.7Ga0.3As surface channel metal-oxide-semiconductor field-effect transistors (MOSFETs) with atomic layer deposition of Al2O3 and ZrO2 have been fabricated and investigated. The device performance of InGaAs channel MOSFETs with various indium compositions (53% and 70%) has been studied, including drain current, transconductance, subthreshold swing, and interface trap density (Dit). It has been found that In0.53Ga0.47As MOSFETs exhibit higher transconductance and lower subthreshold swing than In0.7Ga0.3As MOSFETs for both Al2O3 and ZrO2 gate dielectric (e.g., 125 mV/decade versus 160 mV/decade for Al2O3). The interface trap density measured using conductance method (1.1×1012 eV-1 cm-2 versus 3.2×1012 eV-1 cm-2 for Al2O3) suggests a better interface at high-k dielectric/In0.53Ga0.47As channel. Capacitance-voltage measurement at 77 K also correlates with the above results, showing smaller frequency dispersion for In0.53Ga0.47As devices. [ABSTRACT FROM AUTHOR]

The effects of incorporating a thin silicon layer into a \SiO2-based resistive-switching random access memory are presented. An improved performance, including a lower electroforming voltage and a more stable device current in the high-resistance programmed state, has been achieved by physical vapor deposition of a thin silicon layer onto the sidewall region of the device. Tristate pulse endurance performance over \10^6\ \cycles has been demonstrated. The programmed data show immunity to read disturb testing at 1 V and can be sustained up to 150 ^\circ\C thermal exposure. It is concluded that the improved performance is due to formation of a more robust and more uniform conducting filament. As a result of this advantage, stable tristate programming can be realized in the \SiO2-based resistive memory device. [ABSTRACT FROM AUTHOR]

We have studied channel thickness dependence of InGaAs quantum-well field-effect transistors (QWFETs) with high-\kappa gate dielectrics. Device performances of ultrathin 5- and 10-nm-channel \In0.7\Ga0.3\As QWFETs with gate length down to sub-50-nm regime have been investigated. Thinning down the channel improves subthreshold characteristics and reduces the short-channel effect. The 5-nm \In0.7\Ga0.3\As channel (Lg = \40\ \nm) devices exhibit a reduced subthreshold swing (SS) of around 100 mV/dec and drain-induced barrier lowering (DIBL) of 128 mV/V compared to 10-nm \In0.7\Ga0.3\As channel devices (SS of \sim140 mV/dec and DIBL of \sim275 mV/V). However, the drawback for thinner channel devices is that the effective channel mobility also decreases. At inversion charge density of \3 \times \10^12/\cm^2, 10-nm \In0.7\Ga0.3\As channel devices exhibit mobility of 1860 \cm^2/\V\cdot\s versus mobility of 1460 \cm^2/\V\cdot\s for 5-nm \In0.7\Ga0.3\As channel devices. [ABSTRACT FROM AUTHOR]

The resistive switching between high impedance ('off' state) and low impedance ('on' state) is demonstrated on e-beam evaporated SiOx/Si resistive random access memory devices in this paper. The set and reset voltages are independent of the device perimeters and oxide thicknesses after electroforming. A circuit model including filament conductance G is proposed to explain the measured 'on' state capacitances under frequency ranges from 1 KHz to 1 MHz. The electrochemical redox process is adopted to explain the formation of Si filament during electroforming and switching. 'On' and 'off' currents were also measured at various operating temperatures. It is found that both set and reset voltages increase as temperature decreases and that no electroforming is exhibited at low temperature T = 77 K. [ABSTRACT FROM AUTHOR]

Performance improvement of InGaAs buried channel metal-oxide-semiconductor field-effect-transistors (MOSFETs) has been achieved by inserting InAs layer and properly designing the inserted layer position. In0.7Ga0.3As and InAs channel buried channel MOSFETs were fabricated and analyzed including drive current, transconductance, effective mobility, and subthreshold swing. All InAs buried channel devices show good off-state and saturation property. By inserting InAs in the middle of InGaAs channel (InGaAs/InAs/InGaAs channel), 37% enhancement of high field effective channel mobility was achieved over devices with pure InGaAs channel. Devices with InAs inserted in the middle exhibits peak effective channel mobility around 6140 cm2/V s and subthreshold swing of 107 mV/dec. [ABSTRACT FROM AUTHOR]