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Nowadays, due to the growing demands of data centers, the traditional line frequency transformer based data center power distribution system (DC-PDS) is becoming bulky and inefficient. Although SST-based DC-PDS dramatically improves the system efficiency, the traditional multicell SST with input-series output-parallel architectures has limitations. Using high-voltage devices to develop single-cell SST improves system performance, however, its application is limited by high-voltage power devices. As an alternative solution, achieving high blocking voltage through the series connection of low-voltage devices brings several advantages. Nevertheless, the series connection brings about two main problems, namely the voltage imbalance among devices and the increment of switching loss. This article proposes a medium voltage series resonant converter (MVSRC) with series-connected SiC MOSFETs. By adding snubber capacitor to each SiC MOSFET and working at LLC resonant soft-switching mode, the voltage imbalance is reduced and switching loss is decreased. Due to snubber capacitors, there are differences between MVSRC and traditional LLC converter, hence the analytical model of MVSRC is established. Moreover, the voltage imbalance model is established and the voltage imbalance sensitivity is defined to guide the snubber parameter selections. Then, a design example of the 99% efficient 5-kV/400-V prototype is presented. Last, the experimental results show that the voltage imbalance is reduced effectively and the switching loss is decreased dramatically, verifying the validity of proposed methods and the accuracy of analysis. [ABSTRACT FROM AUTHOR]

The modular multilevel matrix converter (M3C) is introduced and applied to a single-stage ac/dc solid-state transformer (SST), which uses only one concentrated medium-frequency transformer (MFT) for isolation. As a result, the transformer insulation design is simplified significantly and higher power density could be achieved. Meanwhile, a novel decoupling transformation based on two internal three-phase circulating systems is proposed to improve the previous method. Through this transformation, the unbalanced capacitor voltage components can be divided into four independent dimensions, which correspond to four kinds of capacitor voltage ripple frequency. And a dc-side vector model is then established to calculate the required circulating current reference for capacitor balancing. Besides, under the application of SST, the capacitor voltage ripple suppression strategy via injection of extra circulating current is proposed. The amplitude and frequency index is optimized to obtain the best effect. Therefore, the submodule capacitor volume can be reduced to achieve higher power density. Simulation and experimental results are also provided to verify the theoretical analysis. [ABSTRACT FROM AUTHOR]

Medium-voltage high-speed drive is promising in applications, such as the centrifugal compressors and electrified transportation. However, it raises lots of design challenges for the converters, which drive the motors. A SiC and Si hybrid ANPC converter is developed to address these challenges. In this article, the essence of this hybrid structure is investigated to clearly show the derivation process of the hybrid active neutral-point-clamped (ANPC) converter and inspire future research on these hybrid topologies. A dedicated space vector modulation (SVM) scheme is proposed for the hybrid ANPC converter, which enables the three-phase hybrid ANPC converter operating with SiC mosfets in high frequency and Si IGBTs in fundamental frequency. A neutral point (NP) voltage balancing scheme is added to the SVM scheme to balance the NP voltage imbalance under low-frequency modulation index. All these efforts make the hybrid ANPC converter become a high power density and fairly low-cost solution. A 400 Hz fundamental frequency, 3.6 kHz switching frequency, medium-voltage high-speed drive system is assumed and tested by the scaled-down experimental results. The effectiveness of the proposed SVM and NP voltage balancing method have both been verified. [ABSTRACT FROM AUTHOR]

The crosstalk voltage on the gate-source terminal of SiC power mosfets in a phase-leg circuit is composed of the gate–drain capacitor introduced voltage and the common-source inductor introduced voltage. The mathematical model of the crosstalk voltage indicates that to suppress two types of crosstalk voltage, there exists a contradictory requirement on the off-state gate loop impedance. This challenge reduces the effectiveness of conventional crosstalk elimination methods. As an improvement, a crosstalk voltage suppression circuit that synchronously eliminates the crosstalk voltage of gate–drain capacitance and the common-source inductance is proposed. In this article, instead of creating low-impedance gate loop in the off-state, a high-impedance gate loop is formatted to eliminate the voltage drop on the common-source inductance. Meanwhile, the potential false turn-on or the negative voltage spikes caused by gate–drain capacitance is eliminated by the precharge voltage in the gate-source capacitor. The required prestored charge is analyzed considering the nonlinear behavior of the junction capacitance of the SiC mosfets. The proposed gate driver is experimentally verified in different switching conditions. [ABSTRACT FROM AUTHOR]

Submodule (SM) failure detection and localization is crucial to reliability improvement of modular multilevel converters (MMCs), which consist of numerous identical SMs. Upon SM failures, the capacitor voltages of the faulty SMs deviate from those of the healthy SMs. Hence, SM voltage consistency disruption can be utilized as an indicator of SM failures. To enable effective consistency evaluation of numerous SM voltages, the single ring theorem, which is an ideal analyzing tool for large size matrices, is applied to SM failure detection in this paper. The proposed SM failure detection method eliminates the need for ideal-state estimators and thus ensures sufficient robustness in terms of parameter uncertainties. Additional voltage/current sensors are not required, which is beneficial for cost efficiency. A statistical-analysis-based SM failure localization method enabling fast identification of the faulty SMs upon failure detection is also proposed. Both single and multiple SM failure detection and localization can be handled with the proposed method even if the faulty SMs are in different arms. The effectiveness of the proposed SM failure diagnosis method is verified by both simulation in MATLAB/Simulink and experimentation on a 13-level MMC prototype. [ABSTRACT FROM AUTHOR]

This paper proposes the adoption of the inherent emitter stray inductance $L_{{\rm{eE}}}$ in high-power insulated gate bipolar transistor modules as a new dynamic thermo-sensitive electrical parameter (d-TSEP). Furthermore, a family of 14 derived dynamic TSEP candidates has been extracted and classified in voltage-based, time-based and charge-based TSEPs. Accordingly, the perspectives and the implementation challenges of the proposed method are discussed and summarized. Finally, high-power test platforms are designed and adopted to experimentally verify the theoretical analysis. [ABSTRACT FROM PUBLISHER]

In this paper, a dynamic thermo-sensitive electrical parameter (DTSEP) for extracting the junction temperature of the trench gate/field-stop insulated gate bipolar transistor (IGBT) modules by using the maximum collector current falling rate is proposed. First, a theoretical model of the transient collector current during turn-off process is developed in terms of the behavior characteristics of the inside storage carriers. Then, the inherent linear relationship between the maximum collector current falling rate dIC/dt and junction temperature Tj is demonstrated and investigated. Fortunately, benefitting from the presence of the intrinsic parasitic inductance LeE between the Kelvin and power emitters of IGBT modules, the maximum dIC/dt can be easily measured to validate the theoretical analysis. Consequently, the maximum dIC/dt during turn-off process is a promising DTSEP for IGBT module junction temperature estimation. Moreover, the physical device parameters that affect the temperature sensitivity of the maximum dIC/dt are also discussed with the derived transient collector current falling model. [ABSTRACT FROM AUTHOR]

The modular multilevel converters (MMCs) are attractive topologies for the high-voltage direct current (HVDC) transmission system. Since the complicated structure of MMC with hundreds sub-modules per arm, building an accurate model to design the appropriate control strategy is one of the main technical challenges. In this paper, the average-value model (AVM) of the MMCs considering the sub-module capacitor voltage ripple is established to explore the control dynamic performance of MMCs. The effect of the sub-module capacitor voltage ripple on the MMC dynamic behavior is explored and the equivalent impedances of the DC and AC sides in the MMC converters are extracted and evaluated. Based on the equivalent impedances, a particular AVM of MMCs, which comprises the equivalent capacitors reflecting the capacitor voltage ripple, is presented. Furthermore, the detailed interaction of the AC side voltages, AC side currents and arm voltages and the coupling relationship of AC output current id and iq can be also precisely described by the introduced AVM. Finally, the effectiveness of the presented model is verified by the PSCAD/EMTDC simulations. [ABSTRACT FROM PUBLISHER]

In this paper, a soft-switching dc/dc converter with secondary-side phase-shift control strategy is proposed to improve the conversion efficiency and minimize the primary switch voltage stress in the high input voltage applications. Zero-voltage-switching performance is achieved for both the primary- and secondary-side power devices in a wide load range to reduce the switching losses due to the secondary-side phase-shift control scheme. Furthermore, compared with the conventional phase-shift control mechanism, the circulating current at the freewheeling stage is effectively suppressed as well to minimize the conduction losses. Moreover, the voltage stress of the primary switches is only half of the input voltage by employing the improved three-level structure, which makes the low-voltage rated power devices available to improve the circuit performance. In addition, the converter can work in the buck, balance, and boost modes to achieve a relatively wide input voltage range, which is an expected advantage for the communication power system to minimize the electrolytic capacitors with an acceptable hold-up time. The operation principle is analyzed and experimental results of a 1-kW 100-kHz prototype are provided to verify the effectiveness and the advantages of the proposed converter. [ABSTRACT FROM AUTHOR]

This paper presents a survey of existing gate driving approaches for improving reliability of Insulated Gate Bipolar Transistors (IGBTs). An extensive and various lists of techniques are introduced and discussed, including fast detection, identification and protection against IGBT failures, also considering cost-effective solutions. Gate-driver circuit solutions to improve short-circuit robustness, overload, voltage and current overshoots withstanding capability are first introduced to cope with abnormal conditions severely affecting lifetime expectation. Later, some advanced, state-of-the-art control techniques are discussed to minimize the real-mission-profile stresses in terms of voltage and current stresses to the device, together with, not least, temperature variations. Future challenges and perspectives are finally discussed at the end of the paper. [ABSTRACT FROM AUTHOR]