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Halide perovskite solar cells have been attracting tremendous attention as next-generation solar cell materials because of their excellent optical and electrical properties. Formamidinium lead tri-iodide (FAPbI3) exhibits the narrowest band gap among lead iodide perovskites and shows excellent thermal and chemical stability, also. However, the large-area coating of FAPbI3 needed for commercialization has not been successful because of the instability of the black phase of FAPbI3 at ambient temperature. This study presents a compositional engineering direction to control the polymorph of the FAPbI3 thin film for the shear coating processes, without halide mixing. By adopting a hot substrate above 100 oC, our shear coating process can produce the black phase FA-based halide perovskites without halide mixing. We carefully investigate the Cs-FA and MA-FA mixed lead iodide perovskites’ phase stability by combining the study with thin-film fabrication and ab initio calculations. Cs-FA mixing shows promising behaviors for stabilizing α-FAPbI3 (black phase) compared with MA-FA. Stable FA-rich perovskite films cannot be achieved via shear coating processes with MA-FA mixing. Ab initio calculations revealed that Cs-FA mixing is excellent for inhibiting phase decomposition and water incorporation. This study is the first report that FA-based halide perovskite thin films can be made with the shear coating process without MA-Br mixing. We reveal the origin of the stable film formation with Cs-FA mixing, and present future research directions for fabricating FA-based perovskite thin films using shear coating.

In this study, we tried to improve the oxidation resistance of Nb-12Si (wt%) alloys at 1200 °C or higher through pack cementation coatings. Nb-12Si (wt%) alloys were prepared by arc-melting under Ar atmosphere. When the alloys were coated using pack powder mixtures composed of Si, Al2O3 and NaF, two silicide layers composed of NbSi2 and Nb5Si3 phases were successfully produced on the substrate. The Si-pack coatings were performed with various heat treatment temperatures and time conditions. The microstructures and thickness changes of the coating layers were analyzed to determine the growth behaviors of the coating layer. The growth constant of 8.4 10–9 cm2/sec was obtained with a diffusion growth mode. In addition, in order to examine the resistance of the Si-pack coated alloys, isothermal static oxidation tests were performed at 1200 °C and higher temperatures. As a result, the oxidation resistance of the alloys was determined by protecting the surface of the alloys with silicide oxide layers formed by the silicide coatings. The uncoated specimens exhibited an abnormal weight increase due to the formation of Nb oxide. The coated specimen showed excellent oxidation resistance at 1200 °C for up to 12 hrs, while the previous reports on the same alloy verified oxidation resistance only up to 1100 °C. It appears that the excellent oxidation resistance is closely related to the NbSi2 coating layer thickness. The oxidation behaviors of the coating layers after the oxidation tests were discussed in terms of microstructural and phase analyses.

To achieve a surface-enhanced Raman spectroscopy (SERS) sensor that is easy to make and use, we propose periodic gold nanotrench arrays, which can be fabricated without surface contamination and intricate sensor alignment. Deep and narrow plasmonic nanotrenches for amplifying local electromagnetic fields were reliably generated on a wafer-scale substrate by nanoimprint lithography and two successive oblique-angle depositions. Electromagnetic simulations and Raman measurements show that the proposed plasmonic nanostructures function as SERS sensors, enabling nanomolar sensitivity. Furthermore, we successfully confirmed the microRNA detection capability of the proposed nanostructures to demonstrate their promising potential and feasibility for use in biomedical diagnostic sensors.

We quantitatively and analytically investigate the properties of buffer/window junctions and their effects on the energy band alignment and the current-voltage characteristics of Cu(In,Ga)Se2 (CIGS) thin film solar cells with solution processed silver nanowire (AgNW) composite window layers. AgNWs are generally embedded in a moderately conductive matrix layer to ensure lateral collection efficiency of charge carriers photogenerated in the lateral gaps present between AgNWs. Studies on the junctions between a buffer and AgNW-composite window layers and their effects on the performances of CIGS thin film solar cells have seldom been addressed. Here, we show that solution processed AgNW-composite window layers could induce defect states at the buffer/window interface, resulting in poor energy band alignment impeding carrier transport in the solar cells. On the basis of our analysis, we suggest an analytical expression of nmatrixDi2≥3.46×10−5e cm to avoid losses in the power conversion efficiency of the solar cells. nmatrix is the carrier concentration in a matrix layer embedding AgNWs, Di is the negative defect density at the buffer/window interface, and e is the relative dielectric constant of the matrix layer embedding AgNWs.

This work was supported by NSF Grants DMR 1207213, DMR1400432, and EFRI-2DARE 1433490, and by LEAST-STARnet, a Semiconductor Research Corporation program, sponsored by MARCO and DARPA and by SRC NRI SWAN. This work was also supported by the National Research Foundation of Korea (NRF) grant funded by the Korea government (MSIT) (Nos. NRF-2018R1C1B5085644 and NRF-2019R1A2B5B02070657).

Sn–Ag alloys are gaining importance among microelectronics manufacturers because of their potential benefits, e.g., low melting point, excellent wetting to common metallic substrates, and superior mechanical properties required for microelectronic packaging devices. In this work, Sn–Ag alloy was co-deposited from acidic citric acid bath on copper substrates. The plating solution was composed of SnSO4, Ag2SO4, thiourea, and citric acid as a supporting electrolyte. Further, the influence of current density on the Ag content of the coatings was studied. The results indicate that the citric acid bath produces bright Sn–Ag deposits over a wide range of current densities. The grains of the deposits obtained were bigger at lower current densities (10–30 mA cm−2) and become finer at higher current densities (40–50 mA cm−2). Initially, the coatings were very hard and become soft as the current density increases gradually due to the decreased amount of Ag in the deposit which modified the coating solderability.

We recently reported the successful replacement of both sputtered intrinsic zinc oxide (i-ZnO) and sputtered indium tin oxide (ITO) window layers by a solution processed silver nanowire composite window (SNCW) layer for fully solution processed high performance CuIn(S,Se)2 (CISS) thin film solar cells without any sacrifices in photovoltaic device performance. Here, we report the current density– voltage (J–V) characteristics of the fully solution processed CISS thin film solar cells with the SNCW layer under dark conditions, and under white and filtered red-light illumination. While control devices with sputtered conductive metal oxide window layers do not show J–V distortion, devices with the SNCW exhibit both crossover and red kink behaviors, which disappear during white-light illumination but gradually re-appear after turning off light. We propose the following model to explain the above observations. Acceptor-like defects at the CdS/SNCW interface become negatively charged by capturing electrons under dark conditions, but are neutralized by capturing photogenerated holes from the CdS valence band under white-light illumination. The illumination dependent state of the acceptor-like defects leads to the appearance and disappearance of the crossover and red kink from the J–V curves.

We have carried out microstructural studies of secondary phase formation at the Mo/CuIn(Se,S)2 interface, and of grain structure in hydrazine solution-processed CuIn(Se,S)2 films. The CuIn(Se,S)2 layers were deposited on Mo-coated glasses followed by thermal annealing under a nitrogen ambient. In our previous work, we identified [Cu6S4]2− and [In2(Se,S)4]2− as the two major molecular species present in hydrazine CuIn(Se,S)2 precursor solutions. The CuIn(Se,S)2 films prepared by the precursor solution containing only above two molecular complexes exhibited the undesired secondary interfacial phases such as CuSe and CuIn5S8. It is likely that the reactions between the Mo bottom electrode with sulfur in [Cu6S4]2− can result in the formation of a MoS2 phase, triggering the phase separation of CuIn(Se,S)2 into CuSe and CuIn5S8. To make matters worse, the final CuIn(Se,S)2 films contain a lot of voids that reduce the structural and electrical integrity of the device. The addition of polyselenide molecules [Se]n into the above CuIn(Se,S)2 precursor solutions introduced MoSe2 rather than MoS2 at the back interface which in turn allows sulfur to remain in [Cu6S4]2− complexes. As a result, only the desired phases, CuIn(Se,S)2 and MoSe2, were formed near the back interface. Furthermore, The formation of voids within the film can be also prevented by adding [Se]n into the CuIn(Se,S)2 precursor solution, leading to the formation of a dense film structure.

Recombination of charge carriers due to electronically active material defects is one of the major factors limiting power conversion efficiency in solar cells. We have studied the defect behavior in CuInS x Se 2− x solar cells fabricated through a solution process with a maximum heating temperature of 390 °C. By introducing a cadmium ion soaking step into the fabrication process, we find that the recombination rate can be reduced. Through the use of capacitance–voltage ( C – V ) profiling, drive level capacitance profiling (DLCP) and admittance spectroscopy analysis, the cadmium ion soaking process was found to increase the charge carrier concentration in the bulk of the absorber, and shift the energy level of the N1 defect toward the valence band edge. The soaking process was found to most obviously affect the open circuit voltage with an average improvement of 33 mV.

We have fabricated self-aligned thin-film transistors (TFTs) using a ultra-low temperature ( T 2 O 3 gate dielectric films. The TFT performances were enhanced by plasma oxidation of the polycrystalline Si surface prior to Al 2 O 3 gate dielectric film deposition. The fabricated TFT showed a field effect mobility of 95 cm 2 /Vs, a threshold voltage of −3 V and a sub-threshold swing of 0.45 V/dec.

We present the results of a systematic study of chemical vapor deposition of graphene on silicon substrates. The silicon substrate is covered with SiO 2 and capped with an electron-beam evaporator deposited nickel film, which serves as the catalyst for carbon precursor decomposition. Methane is used as the carbon precursor. Three key parameters of CVD growths, the growth temperature, time, and the post-growth cooling rate are studied and the optimized combination of the three allowed for the reproducible fabrication of single layer graphene of larger than 100 μm 2 covering more than 50% of the surface of 1-in. diameter Si wafers. We further demonstrate the transfer of CVD graphene onto SiO 2 /Si surfaces with higher than 95% success rate. Our result together with those reported by other research groups shows real promise of the integration of carbon electronics with silicon integrated circuit technology.

In this paper, we describe the fabrication of 3.5-inch QCIF active matrix organic light emitting display (AMOLED) panels driven by thin film transistors, which are produced by an ultra-low-temperature polycrystalline silicon process on plastic substrates. The over all processing scheme and technical details are discussed from the viewpoint of mechanical stability and display performance. New ideas, such as a new triple-layered metal gate structure to lower leakage current and organic layers for electrical passivation and stress reduction are highlighted. The operation of a 3.5-inch QCIF AMOLED is also demonstrated.

A large-grain polycrystalline silicon film was obtained on a plastic substrate by sequential lateral solidification. With various combinations of sputtering powers and Ar working gas pressures, the conditions for producing dense amorphous silicon (a-Si) and SiO2 films were optimized. The successful crystallization of the a-Si film is attributed to the production of a dense a-Si film that has low argon content and can endure high-intensity laser irradiation.

Indium tin oxide (ITO) films were prepared by radio frequency magnetron sputtering at room temperature, for use as a cathode in a transparent organic light-emitting diode (TOLED). To minimize damage to the TOLED by the ITO sputtering process, the target-to-substrate distance was increased to 20 cm. An ITO film deposited at the optimum oxygen partial pressure exhibited an electrical resistivity as low as 4.06 × 10− 4 Ω cm and a high optical transmittance of 91% in the visible range. The film was used as a transparent cathode for a TOLED with structure of an ITO coated glass substrate / Naphthylphenyldiamide (60 nm) / Tris–(8-hydroxyquinoline) aluminum (60 nm) / LiF (1 nm) / Al (2 nm) / Ag (8 nm) / ITO cathode (100 nm). A maximum luminance of 37,000 cd/m2 was obtained. The device performance was comparable to a conventional OLED.

The effects of a wet chemical surface treatment of molybdenum-tip (Mo-tip) emitters on the electrical characteristics of an active matrix cathode composed of hydrogenated amorphous silicon thin film transistors and Mo-tip emitters are described. X-Ray photoelectron spectroscopy measurements showed that the surface treatment removed MoO 3 from the surface of the e-beam evaporated Mo film. In addition, the surface roughness of the Mo film was increased as the result of the surface treatment. The surface-treated active matrix cathode showed stable emission characteristics and immunity from emitter failures during its operation. The response time of the active matrix cathode was decreased by the surface treatment of the Mo-tip emitters. A change in surface composition and surface roughness appear to be responsible for the enhancement of the active matrix cathode.

We have made an excimer laser annealed poly-Si thin film transistor (TFT). The stress of the poly-Si films crystallized by excimer laser annealing is studied by Raman spectroscopy. The transverse-optic phonon frequency is independent of the excimer laser energy, but dependant on the precursor a-Si film thickness. The nMOS TFT with a self-aligned lightly doped drain (LDD) structure shows low leakage current. The large leakage current of the pMOS TFT with non-LDD structure is reduced by the off-state stress. The gate to channel capacitance as a function of gate voltage for nMOS TFT shows the characteristic parallel shift of the capacitance–voltage curves with frequency variation.

Stable organic white light-emitting diodes are successfully fabricated by a single organic white emitting layer, which is Bis (2-methyl-8-quinolinato) (triphenylsiloxy) aluminum (III) (SAlq) doped red fluorescent dye of 4-(dicyanomethylene)-2- tert -butyl-6(1,1,7,7-tetramethyljulolidyl-9-enyl)-4 H -pyran (DCJTB). The incomplete energy transfer from blue-emitting SAlq to red-emitting DCJTB enables to obtain a stable white balanced light-emission by the DCJTB doping concentration of 0.5%. A device with the structure of ITO/TPD (50 nm)/SAlq:DCJTB (30 nm, 0.5%)/Alq 3 (20 nm)/LiF (0.5 nm)/Al (110 nm) shows maximum luminance of 20 400 cd/m 2 at 810 mA/cm 2 , external quantum efficiency of 2% at 200 cd/m 2 (∼3 mA/cm 2 ), power efficiency of 2.3 lm/W at 67 cd/m 2 (∼1 mA/cm 2 ), and a Commission Internationale de l'Eclairage chromaticity coordinates of (0.34, 0.39) at 1.8 mA/cm 2 to (0.31, 0.38) at 36 mA/cm 2 .

We present, for the first time, a prototype active-matrix field emission display (AMFED) in which an amorphous silicon thin-film transistor (a-Si TFT) and a molybdenumtip field emitter array (Mo-tip FEA) were monolithically integrated on a glass substrate for a novel active -matrix cathode (AMC) plate. The fabricated AMFED showed good display images with a low-voltage scan and data signals irrespective of a high voltage for field emissions. We introduced a light shield layer of metal into our AMC to reduce the photo leakage and back channel currents of the a-Si TFT. We designed the light shield to act as a focusing grid to focus emitted electron beams from the AMC onto the corresponding anode pixel. The thin film depositions in the a-Si TF Ts were performed at a high temperature of above 360 ° C to guarantee the vacuum packaging of the AMC and anode plates. We also developed a novel wet etching process for n + -doped a-Si etching with high etch selectivity to intrinsic a-Si and used it in the fabrication of an inverted stagger TFT with a very thin active layer. The developed a-Si TFTs performed well enough to be used as control devices for AMCs. The gate bias of the a-Si TFTs well controlled the field emission currents of the AMC plates. The AMFED with these AMC plates showed lowvoltage matrix addressing, good stability and reliability of field emission, and good light emissions from the anode plate with phosphors.

We have designed and monolithically integrated amorphous silicon thin-film transistor (a-Si TFT) with Mo-tip field emitter arrays (FEAs) on glass substrate for active-matrix cathodes (AMCs) in field-emission display (FED) application. In our AMCs, a light shield layer of metal was introduced to reduce the photo leakage and back channel currents of a-Si TFT. The light shield was designed to have the role of focusing grid to focus emitted electron beams from the AMC on the corresponding anode pixel by forming it around the Mo-tip FEAs as well as above the a-Si TFT. The thin film depositions in a-Si TFTs were performed at a high temperature of above 360/spl deg/C to guarantee the postvacuum packaging process of cathode and anode plates in FED. Also, a novel wet etching process was developed for n/sup +/-doped-a-Si etching with high etch selectivity to intrinsic a-Si and good etch controllability and was used in the fabrication of inverted stagger TFT with a very thin active layer. The developed a-Si TFTs had good enough performance to be used as control devices for AMCs with Mo-tip emitters. The fabricated AMCs exhibited very effective aging process for field emitters.

A novel oxide-silicon-oxide buffer structure to prevent damage to a plastic substrate in an ultralow temperature (

This letter presents technologies to fabricate ultralow-temperature (< 150 /spl deg/C) polycrystalline silicon thin-film transistor (ULTPS TFT). Sequential lateral solidification is used for crystallization of RF magnetron sputter deposited amorphous silicon films resulting in a high mobility polycrystalline silicon (poly-Si) film. The gate dielectric is composed of plasma oxidation and Al/sub 2/O/sub 3/ grown by plasma-enhanced atomic layer deposition. The breakdown field on the poly-Si film was above 6.3 MV/cm. The fabricated ULTPS TFT showed excellent performance with mobility of 114 cm/sup 2//V /spl middot/ s (nMOS) and 42 cm/sup 2//V /spl middot/ s (pMOS), on/off current ratio of 4.20 /spl times/ 10/sup 6/ (nMOS) and 5.7 /spl times/ 10/sup 5/ (pMOS), small V/sub th/ of 2.6 V (nMOS) and -3.7 V (pMOS), and swing of 0.73 V/dec (nMOS) and 0.83 V/dec (pMOS).