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Reports on the development of high-performance field-programmable gate arrays (FPGA) family with on-chip dedicated static random access memory (SRAM), by designers at the Vantis company, which is capable of delivering speeds of 250 MHz. Features of the FPGA; Indepth look at the usage of trench technology; What the variable-grain architecture consists of; Information on the configurable building block.

The article presents questions and answers related to the Field-Programmable Gate-array (FPGA). One of the questions asks about the various FPGA technologies rank with respect to standby power consumption. The editor answers that the three mainstream FPGA approaches significantly vary in static and standby power consumption due to the differences in the configuration technologies employed within the chips, volatile static RAM cells, reprogrammable flash-based nonvolatile memory cells, and antifuse, metal-to-metal one-time programmable nonvolatile programmable elements. Another question is about the impact of switching between active and low-power modes on system performance. The editor answers that when an FPGA switches into a standby mode, the circuits usually can power down immediately. In older FPGAs, externally gating the clock and possibly lowering the supply voltage can do this. The latest FPGAs have been designed to be more power-aware and include power-management circuitry on board to quickly switch into the standby state and help minimize leakage currents.

This article reports that control applications in space-based systems ranging from low-earth orbit to deep-space exploration need microcontrollers that can withstand extreme levels of radiation and temperature. To meet those requirements, Silicon Laude leveraged Actel Corp.'s RTAX-S series of radiation-tolerant field programmable gate arrays (FPGAs). Also, Silicon Laude implemented a radiation-hardened and radiation-tolerant version of the MCS8051 microcontroller in the UT6325 rad-hard FPGAs from Aeroflex. Adding a nonvolatile 64-kword by 16-bit rad-hard magnetoresistive memory from Honeywell Corp. creates a microcontroller subsystem in a single package that can handle up to a 300-krad total ionizing dose of radiation. The microcontrollers include 256 bytes of triple-module-redundancy (TMR) internal RAM, 1536 bytes of on-chip TMR extended data RAM, and memory soft-error detection and correction capability. The microcontrollers include Silicon Laude's proprietary hardware monitor and data exchange (HMDX) technology for real-time monitoring and debugging via an IEEE 1149.1-compatible test port. The HMDX technology also can be used to download programs into the MRAM and examine or edit data memory contents.

The article presents information on programmable-logic devices (PDL). Applications traditionally supported by high-density complex programmable-logic devices (CPLDs) and low-capacity field-programmable gate arrays (FPGA) now have another option, the MachXO series of logic devices. Developed by Lattice Semiconductor, the family brings lower cost and more features to the table. Lattice harnessed the efficiency of a logic architecture based on a lookup table and combined it with high-density, nonvolatile flash storage and distributed blocks of static memory. As a result, the MachXO devices shave cost by as much as 50 per cent per logic function. The MachXO series can handle many traditional FPGA and CPLD applications due in part to its on-chip distributed memory, a low-power sleep mode, and the ability to transparently update configuration data. Similar to the fabric in the company's XP series, the logic fabric consists of an array of programmable function units that each contains four logic slices. Each slice packs a pair of four-input lookup tables and the associated configuration SRAM. Such blocks perform logic, arithmetic, distributed RAM and distributed ROM functions.

Many of today's static random-access memory-based field programmable gate arrays employ four-input look-up tables (LUT) to implement basic logic functions that expand beyond a single LUT or simple functions that occupy only a fraction of an LUT, the basic four input structure can be very inefficient. To overcome this problem, Altera Corp. has developed a novel structure formed what the company calls 'adaptive logic modules'. These circuits enable adjacent logic functions to share logic. As a result, ALMs implement a function with higher performance and greater efficiency.