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10 results on '"Blomme, Pieter"'

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1. A new scalable self-aligned dual-bit split-gate charge-trapping memory device

2. Material selection for hybrid floating gate NAND memory applications.

3. Intergate Dielectric Engineering Toward Large P/E Window Planar NAND Flash.

4. Monocrystalline Floating Gate Structure for Ultimate NAND Flash Scaling Towards the 12nm Node.

5. Evaluation and Solutions for P/E Window Instability Induced by Electron Trapping in High- $\kappa$ Intergate Dielectrics of Flash Memory Cells.

6. Read and Pass Disturbance in the Programmed States of Floating Gate Flash Memory Cells With High-\kappa Interpoly Gate Dielectric Stacks.

7. Trades-off between lithography line edge roughness and error-correcting codes requirements for NAND Flash memories

8. Cross-cell interference variability aware model of fully planar NAND Flash memory including line edge roughness

9. Fast VTH Transients After the Program/Erase of Flash Memory Stacks With High-k Dielectrics.

10. Induced Variability of Cell-to-Cell Interference by Line Edge Roughness in nand Flash Arrays.

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