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Germanium combined with high-κ dielectrics has recently been put forth by the semiconductor industry as potential replacement for planar silicon transistors, which are unlikely to accommodate the severe scaling requirements for sub-45-nm generations. Therefore, we have studied the atomic layer deposition (ALD) of HfO2 high-κ dielectric layers on HF-cleaned Ge substrates. In this contribution, we describe the HfO2 growth characteristics, HfO2 bulk properties, and Ge interface. Substrate-enhanced HfO2 growth occurs: the growth per cycle is larger in the first reaction cycles than the steady growth per cycle of 0.04 nm. The enhanced growth goes together with island growth, indicating that more than a monolayer coverage of HfO2 is required for a closed film. A closed HfO2 layer is achieved after depositing 4–5 HfO2 monolayers, corresponding to about 25 ALD reaction cycles. Cross-sectional transmission electron microscopy images show that HfO2 layers thinner than 3 nm are amorphous as deposited, while local epitaxial crystallization has occurred in thicker HfO2 films. Other HfO2 bulk properties are similar for Ge and Si substrates. According to this physical characterization study, HfO2 can be used in Ge-based devices as a gate oxide with physical thickness scaled down to 1.6 nm. [ABSTRACT FROM AUTHOR]

Due to its high intrinsic mobility, germanium (Ge) is a promising candidate as a channel material (offering a mobility gain of approximately ×2 for electrons and ×4 for holes when compared to conventional Si channels). However, many issues still need to be addressed before Ge can be implemented in high-performance field-effect-transistor (FET) devices. One of the key issues is to provide a high-quality interfacial layer, which does not lead to substantial drive current degradation in both low equivalent oxide thickness and short channel regime. In recent years, a wide range of materials and processes have been investigated to obtain proper interfacial properties, including different methods for Ge surface passivation, various high-k dielectrics and metal gate materials and deposition methods, and different post-deposition annealing treatments. It is observed that each process step can significantly affect the overall metal-oxide-semiconductor (MOS)-FET device performance. In this review, we describe and compare combinations of the most commonly used Ge surface passivation methods (e.g. epi-Si passivation, surface oxidation and/or nitridation, and S-passivation) with various high-k dielectrics. In particular, plasma-based processes for surface passivation in combination with plasma-enhanced atomic layer deposition for high-k depositions are shown to result in high-quality MOS structures. To further improve properties, the gate stack can be annealed after deposition. The effects of annealing temperature and ambient on the electrical properties of the MOS structure are also discussed. [ABSTRACT FROM AUTHOR]

Very promising capacitance–voltage (C– V) characteristics of capacitors on both p- and n-type Ge substrates are demonstrated by using an in situ  \O2 plasma passivation and an \O2 ambient annealing. The capacitors exhibited a small equivalent oxide thickness of \sim1.5 nm and a low Dit \ (< \6\ast \10^11 \ \cm^-2\eV^-1) energy distribution covering the major part of the Ge bandgap (> 0.51 eV). The surface potential modulation efficiency was estimated to be \sim80% from flatband to strong inversion on both types of Ge. C–V hysteresis was less than 10 mV with positive bias up to 1.5 V. A low gate leakage current density of < \9\ast \10^-8 \ \A/cm^2 at VFB \pm \1 \ \V indicates high quality of the \HfO2/\GeO2 gate stacks. Excellent comprehensive properties suggest that a combination of \O2 plasma passivation and \O2 ambient annealing provides a promising technology for \GeO2 -based CMOS devices. [ABSTRACT FROM AUTHOR]

The electrical properties of plasma-enhanced atomic-layer-deposited (PE-ALD) TiO2 as gate dielectric were investigated for germanium-channel complementary metal-oxide-semiconductor capacitors by using ultrathin in situ HfO2/GeO2 interlayers. TiO2 grown by PE-ALD exhibited a k value of 50±5. An equivalent oxide thickness of 0.9 nm was obtained for the TiO2(3 nm)/HfO2(1.2 nm)/GeO2(0.7 nm)/Ge capacitor with very low leakage current density of 2×10-7 A/cm2 at VFB±1 V. Capacitance-voltage hysteresis was below 30 mV for the TiO2/HfO2/GeO2/Ge capacitors. Relatively low minimum density of interface states, Dit ∼5×1011 eV-1 cm-2 was obtained, suggesting the potential of HfO2/GeO2 passivation layer for the application of TiO2 as gate dielectric for both p- and n-type Ge channels. [ABSTRACT FROM AUTHOR]

In search of a proper passivation for high-k Ge metal-oxide-semiconductor devices, the authors have deposited high-k dielectric layers on GeO2, grown at 350–450 °C in O2. ZrO2, HfO2, and Al2O3 were deposited by atomic layer deposition (ALD). GeO2 and ZrO2 or HfO2 intermix during ALD, together with partial reduction of Ge4+. Almost no intermixing or reduction occurs during Al2O3 ALD. Capacitors show well-behaved capacitance-voltage characteristics on both n- and p-Ge, indicating efficient passivation of the Ge/GeOx interface. The density of interface states is typically in the low to mid-1011 cm-2 eV-1 range, approaching state-of-the-art Si/HfO2/matal gate devices. [ABSTRACT FROM AUTHOR]