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In this work, a ten-level inverter scheme is presented to extend the linear modulation range (LMR) by using a unique space vector pulsewidth modulation (SVPWM) technique, such that no lower order harmonics (such as 5th, 7th, 11th, and 13th, etc.) are present in the phase voltage as compared to six-step mode operation. The proposed scheme can increase the peak phase fundamental voltage of the inverter from 0.577 to $0.637 V_{dc}$ (maximum possible peak phase fundamental voltage of a conventional hexagonal space vector structure (SVS) voltage source inverters while operating in six-step mode), irrespective of the load power factor (p.f), where $V_{dc}$ is the dc link voltage of the inverter. The ten-level inverter structure is formed using a two-level inverter and an H-bridge (HB) in cascade from one end and a floating capacitor-based two-level inverter cascaded with an HB from the other end to drive an open-end winding induction motor (OEWIM). All the HB capacitor voltages are balanced by using space vector redundancy. The claim of balancing the capacitor voltages throughout the whole modulation range is verified experimentally in this article. Experimental results at different steady-state and transient conditions are shown to validate the proposed inverter scheme’s efficacy in increasing the LMR. [ABSTRACT FROM AUTHOR]

A multilevel dodecagonal voltage space vector generation scheme for variable-speed drive applications with single-dc-link operation requires a large value of capacitance for cascaded H-bridge (CHB) filters, when operated at lower speeds. In existing schemes, the multilevel dodecagonal structure is obtained by cascading a flying capacitor inverter with a CHB. In this paper, a new scheme has been proposed to minimize the capacitance requirement for full speed operation by creating vector redundancies using modular and equal voltage CHBs. Also, an algorithm has been developed to optimize the selection of vector redundancies among the CHBs in order to minimize the voltage ripple of the floating capacitors. The proposed algorithm considers instantaneous capacitor voltages and phase currents for optimal selection of vector redundancies. A mathematical model for capacitor voltage deviation is presented, and the effectiveness of the proposed algorithm is verified in both the simulation and the experiment. [ABSTRACT FROM AUTHOR]

Generating dense multilevel voltage space structure using polygons of higher sides is one of the novel and elegant method to suppress low-order harmonics and to obtain refined sinusoidal voltages using voltage source inverters for variable frequency drive application without passive filters. Apart from the advantages of conventional multilevel inverter topologies, schemes generating polygonal voltage space vector structure can equip full dc-bus utilization, low switching frequency strategies to eliminate low-order harmonics, and increased linear modulation range. In this paper, an induction motor drive scheme generating a highly dense multilevel 24-sided polygonal voltage space vector structure using a single dc source, which can eliminate harmonics till 23rd order from phase voltages, is presented. Cascaded power circuit topology with a flying capacitor inverter fed with a dc source and two low voltage floating capacitor fed H-bridge inverters is used. Detailed experimentally validated results, under scalar as well as indirect rotor field oriented control of induction motor are provided. Studies on voltage ripple and reactive energy in various floating capacitors, harmonic performance of output voltage for wide range of speed operation, are also included. [ABSTRACT FROM AUTHOR]

Conventional voltage-source inverters used for induction motor drives generate a hexagonal space vector structure. In the overmodulation range, the hexagonal space vector structure generates low-order harmonics in the phase voltage resulting in low-order torque ripple in the motor. Inverter topologies with an octadecagonal (18 sided) space vector structure eliminate fifth-, seventh-, eleventh-, and thirteenth-order harmonics from the phase voltage, and hence, the dominant sixth- and twelfth-order torque ripple generation is eliminated. Octadecagonal space vector structures proposed in the past require multiple dc sources, which makes four-quadrant operation of the drive system difficult and costly. In this paper, the formation of a multilevel nine-concentric octadecagonal space vector structure using a single dc source is proposed. Detailed experimental results, using open-loop $V/f$ control and rotor field-oriented control, are presented to validate the effectiveness of the proposed drive scheme. [ABSTRACT FROM PUBLISHER]

In this paper, a new inverter topology is proposed for generating a multilevel dodecagonal voltage space vector structure for open-end winding induction motor (IM) using a single dc source. Dodecagonal voltage space vector structure eliminates fifth- and seventh-order harmonic voltages from phase voltage output and hence eliminates the fifth- and seventh-order harmonic currents through the motor leading to removal of the dominant sixth-order torque ripple generation in the motor over the entire modulation range. Multilevel space vector structure generates output voltage with better THD and low dv/dt. In the proposed topology, two three-level inverters drive an open-end winding IM, one inverter from each side. DC-link of primary inverter is from a dc source which delivers the entire active power, whereas the secondary inverter dc-link is maintained by a capacitor, which is self balanced during the inverter operation. The PWM scheme implemented ensures low switching frequency for primary inverter. Secondary inverter operates at a small dc-link voltage. Hence, switching losses are small for both primary and secondary inverters. Experimental results show the elimination of fifth- and seventh-order harmonic voltages over the entire modulation range, validating effectiveness of the proposed multilevel inverter scheme. [ABSTRACT FROM PUBLISHER]

Multilevel inverters with hexagonal and dodecagonal voltage space vector structures have improved harmonic profile compared to two-level inverters. Further improvement in the quality of the waveform is possible using multilevel octadecagonal (18-sided polygon) voltage space vectors. This paper proposes an inverter circuit topology capable of generating multilevel octadecagonal voltage space vectors, by cascading two asymmetric three-level inverters. By the proper selection of dc-link voltages and the resultant switching states for the inverters, voltage space vectors, whose tips lie on three concentric octadecagons, are obtained. The advantages of octadecagonal voltage space vector-based pulsewidth modulation (PWM) techniques are the complete elimination of fifth, seventh, eleventh, and thirteenth harmonics in phase voltages and the extension of linear modulation range. In this paper, a simple PWM timing calculation method is also proposed. Experimental results have been presented in this paper to validate the proposed concept. [ABSTRACT FROM PUBLISHER]