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Tailoring MoS2 into nanoribbon (NR) provides an efficient regulation of the electrical property. Herein, high-performance MoS2 transistors are fabricated by optimizing the channel height, width, and length. The electrical performance of the device is improved due to enhanced gate modulation capability from the quasi-3D channel geometry. The devices obtain a high ON-state current of $496 ~\mu \text{A}\,\cdot \, \mu \text{m}$ −1 while offering appropriate field-effect mobility of 52.6 cm2V−1s−1 as the height and width of MoS2 NR are fixed to 20 ± 3 nm and 130 ± 10 nm, respectively. The high performance and desirable current saturation are promising to construct robust logic gates. The NOT and NAND gates are assembled based on an individual MoS2 NR. The inverters demonstrate a voltage gain of −17.8 and a total noise margin of nearly 75%. This work provides an alternative strategy to fully take the advantage of 2-D materials in logic electronics circuits. [ABSTRACT FROM AUTHOR]

2-D materials are promising for future advanced electronics beyond silicon due to their intrinsic ultrathin body for enhanced electrostatic gate control. Herein, an omega-shaped dual-gated MoS2 transistors based on Ag nanowire (NW) as buried gate are fabricated, and the omega-shaped gate architecture enables enhanced local gate controllability, leading to excellent electrical performance with an ON-/ OFF-current ratio of 108 and a subthreshold swing (SS) of 76 mV/dec at room temperature. By controlling the threshold voltage of the transistor with dual gate, an inverter and a NAND gate circuit are fabricated, and the voltage gain of inverters is 36 with high noise margin of 87% ${V}_{{\text{DD}}}$. This work demonstrates an avenue for high-current MoS2 transistors. [ABSTRACT FROM AUTHOR]

Hysteresis-free and steep subthreshold swing (SS) are essential for low-power reliable electronics. Herein, MoS2 metal semiconductor field-effect transistors are fabricated with GeSe/MoS2 van der Waals Schottky junction as a local gate, in which the rectification behavior of the heterojunction offers the modulation of channel carriers. The trap-free gate interface enables the hysteresis-free characteristics of the transistors, and promises an ideal SS of 64 mV/dec at room temperature. All the devices operate with a low threshold voltage less than −1 V with desirable saturation behavior. An OR logic gate is constructed with the dual-gated MoS2 transistors by varying the back and top gate voltage. The strategy present here is promising for the design of low-power digital electronics based on 2D materials. [ABSTRACT FROM AUTHOR]

Abstract: Based on the semiconductor-device structure and equations, we analyze the operation principles of thin-film gated silicon-on insulator (SOI) Lateral PIN (LPIN) photodetectors, and obtain current–voltage models. With 800nm film thickness and 8μm channel length, we validate these models by two-dimensional (2D) Atlas numerical measurements and electrical simulations, including carriers distributions and current–voltage characteristics. In fully-depleted condition, our results predict the internal quantum efficiency as high as 97% at 400nm wavelength, a very low dark current around 1pA and a high ratio of more than 107 between illuminated to dark current with low-voltage operation. Optimizing the performances of photodetectors, our models have highly potential applications in optical storage systems. [Copyright &y& Elsevier]

Omega-shaped non-planar gate architecture is adopted to enhance the gate coupling of the MoS 2 transistor. The devices present a high current of 0.89 A/μm and transconductance of 32.7 μS/μm. This work provides an alternative strategy to realize high-performance field-effect transistors based on two-dimensional materials. [Display omitted] The ever-decreasing size of transistors requires effectively electrostatic control over ultra-thin semiconductor body. Rational design of the gate configuration can fully persevere the intrinsic property of two-dimensional (2D) semiconductors. Here we design and demonstrate a 2D MoS 2 transistor with omega-shaped gate, in which the local gate coupling is enhanced by the non-planar geometry. The omega-shaped non-planar transistors exhibit a high current of 0.89 A/μm and transconductance of 32.7 μS/μm. The high performance and desirable current saturation promise the construction of robust logic gate. The inverters show a voltage gain of 26.6 and an ideal total margin nearly 89%. We also assemble NOT-AND (NAND) gate on an individual MoS 2 flake, and the constructed NAND gate demonstrates the universal functionality of the transistors as well. This work provides an alternative strategy to fully take the advantages of 2D materials for high-performance field-effect transistors. [ABSTRACT FROM AUTHOR]