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In this paper, we demonstrate the linear conductance-change characteristics of a conductive-bridging RAM (CBRAM) to be employed as an artificial synapse device in neuromorphic systems. The CBRAM with a bilayer electrolyte structure ( ${\mathrm {Cu/Cu}}_{{2}-{x}}\text{S}$ / $\mathrm {WO}_{{3}-{x}}$ /W) exhibits analog switching behavior during the depression process due to the well-controlled dissolution of the conductive filament. To analyze the origin of this motion, we investigate the effective voltage applied to $\mathrm {Cu}_{{2}-{x}}\text{S}$ and $\mathrm {WO}_{{3}-{x}}$ . Our findings reveal that $\mathrm {Cu}_{{2}-{x}}\text{S}$ , acting as a voltage divider, helps in suppressing the large voltage drop in $\mathrm {WO}_{{3}-{x}}$ , where the formation/dissolution of filament occurs. Furthermore, due to the diode-like characteristics of $\mathrm {Cu}_{{2}-{x}}\text{S}$ and the division of voltage drop between $\mathrm {WO}_{{3}-{x}}$ and $\mathrm {Cu}_{{2}-{x}}\text{S}$ , an optimum programming energy is applied to $\mathrm {WO}_{{3}-{x}}$ during the depression process. This leads to linear conductance-change characteristics under identical pulses. However, abrupt conductance-change characteristics are observed during the potentiation process. Thus, we use only the device characteristics of the depression part for the neuromorphic system. An excellent classification accuracy is achieved due to the linear conductance-change characteristics and optimized pulse conditions.

We report on a 1-transisor/2-resistor (1T2R) synapse device with improved conductance linearity and conductance ratio under an identical pulse condition for hardware neural networks with high pattern-recognition accuracy. Utilizing an additional series-connected resistor, the conductance linearity of a synapse device was significantly improved owing to the reduced initial voltage drop on an resistive RAM (RRAM) device during depression conditions. Moreover, to maximize the conductance ratio of a synapse device, we utilized a steep subthreshold region of an MOSFET by a parallel connection of an RRAM and a transistor. A small change in voltage on the RRAM directly controlled the gate bias of the MOSFET, which causes a large change in the drain current. Compared with a conventional RRAM synapse device, the 1T2R synapse device shows an improved conductance linearity and conductance ratio ( $> \times 100$ ). Finally, we confirmed an excellent classification accuracy by using a neural network simulation based on a multilayer perceptron.

In this brief, we demonstrate the multilevel cell (MLC) characteristics of an HfO2-based resistive memory (RRAM) array as a synaptic element for neuromorphic systems. We utilize various programming schemes to linearly change the resistance state with either set voltage/pulse ramping or gate voltage ramping. Our results reveal that the MLC relates to the size of the conductive filament involved in the movement of oxygen vacancies with respect to applying pulses. Thus, by optimizing the pulse for a set condition, such as an identical pulse, we achieve linearly increased MLC behavior, thereby enabling a high accuracy for pattern recognition in neuromorphic systems.

In this paper, we propose a one transistor-two resistive RAM (RRAM) (1T2R) device to overcome the non-ideal switching behavior of artificial synapse devices, such as the unidirectional and abrupt change in the conductance. Our findings reveal that the 1T2R device can exhibit bidirectional conductance changes using unidirectional switching RRAMs. Thus, we introduce a unidirectional but analog switching Cu-based RRAM device (Cu/Cu2-X S/WO3-X /W) having an internal voltage suppressor (Cu2-X S) to realize a bidirectional and analog 1T2R synapse device. The synaptic behaviors of the 1T2R device are calculated using the subthreshold region of an NMOSFET. In addition, we improve the on/off conductance ratio and conductance change linearity owing to the nonlinear current transition characteristics of the subthreshold region. Finally, we demonstrate that an ideal synaptic behavior can be achieved through the 1T2R device even when non-ideal switching RRAM elements are used.

In this study, we investigated the effect of an Al2O3 barrier layer in an all-solid-state inorganic Li-based nano-ionic synaptic transistor (LST) with Li3PO4 electrolyte/WO x channel structure. Near-ideal synaptic behavior in the ultralow conductance range (∼50 nS) was obtained by controlling the abrupt ion migration through the introduction of a sputter-deposited thin (∼3 nm) Al2O3 interfacial layer. A trade-off relationship between the weight update linearity and on/off ratio with varying Al2O3 layer thickness was also observed. To determine the origin of the Al2O3 barrier layer effects, cyclic voltammetry analysis was conducted, and the optimal ionic diffusivity and mobility were found to be key parameters in achieving ideal synaptic behavior. Owing to the controlled ion migration, the retention characteristics were considerably improved by the Al2O3 barrier. Finally, a highly improved pattern recognition accuracy (83.13%) was achieved using the LST with an Al2O3 barrier of optimal thickness.