Search

Abstract: Neuromorphic optoelectronic devices with new functionality have attracted much attention since they can be applied in energy‐efficient computing and recognition. Here, a silicon optoelectronic device with a designed configuration resembling the retinal circuitry is reported. This kind of device composed of a silicon photoreceptor and a hafnium metal oxide synapse supports optoelectronic spike‐timing‐dependent plasticity that is manipulated completely by both optical and electrical stimuli. The optoelectronic plasticity allows the lasting modulation of photoresponses by using a transient optoelectronic stimulus. Stateful photoresponses can thus be regulated according to either the illumination intensity or the electrical compliance current. [ABSTRACT FROM AUTHOR]

The charge-trapping memory devices namely Pt/Al2O3/(Al2O(Cu2O)/SiO2/-Si with 2, 3 and 4 nm SiO2 tunneling layers were fabricated by using RF magnetron sputtering and atomic layer deposition techniques. At an applied voltage of ±11 V, the memory windows in the C- V curves of the memory devices with 2, 3 and 4 nm SiO2 tunneling layers were about 4.18, 9.91 and 11.33 V, respectively. The anomaly in memory properties among the three memory devices was ascribed to the different back tunneling probabilities of trapped electrons in the charge-trapping dielectric (Al2O(Cu2O) due to the different thicknesses of SiO2 tunneling layer. [ABSTRACT FROM AUTHOR]

Abstract: Unipolar resistive switching behavior has been investigated in Pt/Co3O4/Pt stacks. The resistance ratio of the high- and low- resistance states is over 5×103. The “ON/OFF” operation of the memory cells can be repeated more than 200 times at room temperature. The resistance of the two states can be kept for more than 16h without showing degradation. The temperature dependence of the resistance shows a metallic behavior at the low-resistance state, but a semiconductor-behavior at the high-resistance state. The mechanism responsible for the observed unipolar resistive switching behavior has been discussed. [ABSTRACT FROM AUTHOR]

Abstract: The charge trap flash memory cells incorporating high-k ZrO2/Al2O3 nanolaminate as charge trapping layers and amorphous Al2O3 as tunneling and blocking layers were prepared, investigated and optimized. The interfaces between ZrO2/Al2O3 nanolaminate play an important role in the charge storage characteristics. With increasing number of the interfaces in the charge trapping layer, the memory window increases first and then decreases due to electrostatic repulsion between the trapped electrons. A satisfactory retention performance was observed in the optimized cell structure, which was attributed to the deep quantum wells between the ZrO2/Al2O3 nanolaminate. [Copyright &y& Elsevier]