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AlGaN/GaN high electron mobility transistors on QST engineered substrates are grown with different GaN/AlGaN buffer layer thickness. The as‐grown heterostructures are evaluated for their structural quality via atomic force microscopy, high‐resolution X‐ray diffraction, Raman spectroscopy, and steady‐state thermoreflectance. Transistor devices are fabricated and evaluated via DC and pulsed electrical techniques, as well as thermoreflectance imaging. It is reported that buffer layer thickness of at least 10 μm can result in lateral high electron mobility transistors (HEMTs) with simultaneously high GaN quality, low stress, good DC electrical performance, low current collapse, and low thermal resistance. [ABSTRACT FROM AUTHOR]

Herein, the electrical and thermal performance of lateral AlGaN/GaN high electron mobility transistors (HEMTs) and metal‐insulator‐semiconductor field effect transistors (MISFETs) fabricated with 11 μm thick GaN buffer layers on 200 mm diameter Qromis Substrate Technology (QST) substrates are investigated. The QST substrate has a polycrystalline core engineered to be coefficient of thermal expansion (CTE)‐matched to GaN to minimize wafer bow and residual stress in the GaN film as a result of epitaxial growth. Raman spectroscopy is used to determine the biaxial residual stress in the GaN buffer of the as‐fabricated devices. Electrical characterization is demonstrated on the HEMTs including DC and pulsed output characteristics, DC transfer characteristics, Hall mobility, carrier concentration, sheet resistance, median transition frequency, and maximum stable gain. Finally, the thermal performance of the AlGaN/GaN MISFET is assessed via thermoreflectance thermal imaging at DC power densities up to 19 W mm−1. The thermal resistance of the MISFET, calculated using the peak temperature rises on the gate electrode for DC power densities <10 W mm−1, is measured to be 15.4 mm K W−1, which is comparable with state‐of‐the‐art GaN‐on‐Si lateral transistors. [ABSTRACT FROM AUTHOR]

Gallium oxide (Ga2O3) has attracted great attention for electronic device applications due to its ultra-wide bandgap, high breakdown electric field, and large-area affordable substrates grown from the melt. However, its thermal conductivity is significantly lower than that of other wide bandgap semiconductors such as SiC, AlN, and GaN, which will impact its ability to be used in high power density applications. Thermal management in Ga2O3 electronics will be the key for device reliability, especially for high power and high frequency devices. Similar to the method of cooling GaN-based high electron mobility transistors by integrating it with high thermal conductivity diamond substrates, this work studies the possibility of heterogeneous integration of Ga2O3 with diamond for the thermal management of Ga2O3 devices. In this work, Ga2O3 was deposited onto single crystal diamond substrates by atomic layer deposition (ALD), and the thermal properties of ALD-Ga2O3 thin films and Ga2O3–diamond interfaces with different interface pretreatments were measured by Time-domain Thermoreflectance. We observed a very low thermal conductivity of these Ga2O3 thin films (about 1.5 W/m K) due to the extensive phonon grain boundary scattering resulting from the nanocrystalline nature of the Ga2O3 film. However, the measured thermal boundary conductance (TBC) of the Ga2O3–diamond interfaces is about ten times larger than that of the van der Waals bonded Ga2O3–diamond interfaces, which indicates the significant impact of interface bonding on TBC. Furthermore, the TBC of the Ga-rich and O-rich Ga2O3–diamond interfaces is about 20% smaller than that of the clean interface, indicating that interface chemistry affects the interfacial thermal transport. Overall, this study shows that a high TBC can be obtained from strong interfacial bonds across Ga2O3–diamond interfaces, providing a promising route to improving the heat dissipation from Ga2O3 devices with lateral architectures. [ABSTRACT FROM AUTHOR]

Record DC power has been demonstrated in AlGaN/GaN high electron mobility transistors fabricated using a substrate replacement process in which a thick diamond substrate is grown by chemical vapor deposition following removal of the original Si substrate. Crucial to the process is a ~30 nm thick SiN interlayer that has been optimized for thermal resistance. The reductions obtained in self-heating have been quantified by transient thermoreflectance imaging and interpreted using 3D numerical simulation. With a DC power dissipation level of 56 W/mm, the measured average and maximum temperatures in the gate-drain access region were 176 °C and 205 °C, respectively. [ABSTRACT FROM AUTHOR]

Because of its ultra-wide bandgap, high breakdown electric field, and large-area affordable substrates grown from the melt, β-Ga2O3 has attracted great attention recently for potential applications of power electronics. However, its thermal conductivity is significantly lower than those of other wide bandgap semiconductors, such as AlN, SiC, GaN, and diamond. To ensure reliable operation with minimal self-heating at high power, proper thermal management is even more essential for Ga2O3 devices. Similar to the past approaches aiming to alleviate self-heating in GaN high electron mobility transistors, a possible solution has been to integrate thin Ga2O3 membranes with diamond to fabricate Ga2O3-on-diamond lateral metal-semiconductor field-effect transistor or metal-oxide-semiconductor field-effect transistor devices by taking advantage of the ultra-high thermal conductivity of diamond. Even though the thermal boundary conductance (TBC) between wide bandgap semiconductor devices and a diamond substrate is of primary importance for heat dissipation in these devices, fundamental understanding of the Ga2O3-diamond thermal interface is still missing. In this work, we study the thermal transport across the interfaces of Ga2O3 exfoliated onto a single crystal diamond. The van der Waals bonded Ga2O3-diamond TBC is measured to be 17 −1.7/+2.0 MW/m2 K, which is comparable to the TBC of several physical-vapor-deposited metals on diamond. A Landauer approach is used to help understand phonon transport across a perfect Ga2O3-diamond interface, which in turn sheds light on the possible TBC one could achieve with an optimized interface. A reduced thermal conductivity of the Ga2O3 nano-membrane is also observed due to additional phonon-membrane boundary scattering. The impact of the Ga2O3–substrate TBC and substrate thermal conductivity on the thermal performance of a power device is modeled and discussed. Without loss of generality, this study is not only important for Ga2O3 power electronics applications which would not be realistic without a thermal management solution but also for the fundamental thermal science of heat transport across van der Waals bonded interfaces. [ABSTRACT FROM AUTHOR]

Radiation tolerance of AlGaN/GaN high-electron mobility transistors (HEMTs) is studied with 2-MeV protons, up to a fluence of 6 \times 10^14 H+/cm2 (about 200 times of typical Si MOSFET rating). The increase in dynamic ON-resistance ( $R_{{\textit{ONDYN}}})$ after radiation is observed to be much more severe than that of static ON-resistance. Radiation-induced donorlike traps located near the two-dimensional electron gas trap electrons, which is responsible for the phenomenon. Compared with the devices passivated by conventional plasma-enhanced chemical vapor deposition (PECVD) SiN, GaN HEMTs with 10 nm of in situ SiN before the PECVD SiN step demonstrate much less increase in $R_{{\textit{ONDYN}}}$ from 2300% to only 300%. The in situ SiN is believed to reduce the process damage by PECVD, improving radiation tolerance. [ABSTRACT FROM PUBLISHER]

A finite-element model coupling 2-D electron gas (2-DEG) density, piezoelectric polarization charge Q{\bf P}, and intrinsic stress induced by a nanocrystalline diamond capping layer, was developed for AlGaN/GaN high electron mobility transistors. Assuming the surface potential is unchanged by an additional stress from diamond capping, tensile stress from the diamond cap leads to an additional tensile stress in the heterostructure and, thus an increase in the 2-DEG under the gate. As a result, additional compressive stress near the gate edges would develop and lead to decreased 2-DEG in the regions between the source and drain contacts (SDCs). Increased saturation drain current will be due to the reduced total resistance between SDC. Integration of the 2-DEG density from SDC revealed a redistribution of sheet density with total sheet charge concentration remaining unchanged. The modeling results were compared with the experimental data from Raman spectroscopy and I-V characterization, and good agreements were obtained. [ABSTRACT FROM AUTHOR]

AlGaN/GaN high-electron mobility transistors (HEMTs) were exposed to 2-MeV protons irradiation, at room temperature, up to a fluence of 6 \times 10^\mathrm \mathbf 14 H+/ \mathrmcm^\mathrm \mathbf 2 . Aside from degradation resulting from radiation-induced charge trapping, transmission electron microscopy and electrical measurements reveal a radiation-induced defect located at the edges of the Ni/Au Schottky gate in the proton-irradiated devices. At the edges of the Ni/Au gate, the Ni of the Ni/Au gate diffused up into the Au layer and migrated into the AlGaN barrier, leaving voids in the Ni layer at the gate edges after irradiation. These radiation-induced voids are caused by diffusion of Ni through vacancy exchange, known as the Kirkendall effect, resulting in reduced gate area and degrading the HEMT performance. [ABSTRACT FROM AUTHOR]

Enhancements in AlGaN/GaN high-electron-mobility transistor (HEMT) performance have been realized through ultrathin (4 nm) AlN passivation layers, formed by atomic layer epitaxy (ALE). A combination of ex situ and in situ surface cleans prepare the surface for deposition of ALE AlN. HEMTs passivated by high crystallinity AlN, grown at 500^\circC, show improvements in 2-D electron gas sheet carrier density, gate leakage current, off-state drain leakage current, subthreshold slope, and breakdown voltage. In addition, degradation of dynamic on resistance during pulsed off-state voltage switching stress is suppressed by \sim50\% compared with HEMTs passivated by conventional plasma enhanced chemical vapor deposition SiNx. [ABSTRACT FROM PUBLISHER]

Nanocrystalline diamond (NCD) thin films are deposited as a heat-spreading capping layer on AlGaN/GaN HEMT devices. Compared to a control sample, the NCD-capped HEMTs exhibited approximately 20% lower device temperature from 0.5 to 9 W/mm dc power device operation. Temperature measurements were performed by Raman thermography and verified by solving the 2-D heat equation within the device structure. NCD-capped HEMTs exhibited 1) improved carrier density NS, sheet resistance RSH; 2) stable Hall mobility \muH and threshold voltage VT; and 3) degraded on-state resistance RON, contact resistance RC, transconductance Gm, and breakdown voltage VBR. [ABSTRACT FROM PUBLISHER]

A novel device structure incorporating an ultrathin AIGaN barrier layer capped by an AIN layer in the source-drain access regions has been implemented to reliably control threshold voltage in AIGaN/GaN high-electron-mobility transistors. A recessed-gate structure has been used to decrease 2-D electron gas (2DEG) density under the gate, thus controlling threshold voltage while maintaining low on-resistance and high current density. The structure presented in this letter implements an ultrathin AIGaN structure grown by metal-organic chemical vapor deposition capped with AIN to maintain a high 2DEG density in the access regions. A selective wet etch using heated photoresist developer is used to selectively etch the AIN layer in the gate region to the AIGaN barrier. We have demonstrated a repeatable threshold voltage of +0.21 V with 4-nim AIGaN barrier layer thickness. [ABSTRACT FROM AUTHOR]