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In order to improve the performance of today's nanoscaled semiconductor devices, characterization techniques that can provide information about the position and activity of dopant atoms and the strain fields are essential. Here we demonstrate that by using a modern transmission electron microscope it is possible to apply multiple techniques to advanced materials systems in order to provide information about the structure, fields, and composition with nanometer-scale resolution. Off-axis electron holography has been used to map the active dopant potentials in state-of-the-art semiconductor devices with 1 nm resolution. These dopant maps have been compared to electron energy loss spectroscopy maps that show the positions of the dopant atoms. The strain fields in the devices have been measured by both dark field electron holography and nanobeam electron diffraction.

This paper reviews the different stressor techniques used in microelectronics, in the scope of the Ultra-Thin Body & Buried Oxide Fully-Depleted Silicon On Insulator technology (UTBB FD-SOI). We compare the mechanical efficiency of the various stressors and present the impact of device dimensions (active area, gate length and pitch) on their efficiency. Our study emphasizes the high efficiency, for the FD-SOI technology, of the intrinsically strained channels, compared to the traditional embedded raised source/drain and contact-etch stop liner. With these techniques FD-SOI technology has already demonstrated channel stress higher than 1.5 GPa for n type transistor and −2.3 GPa for the p type devices and we envision channel stress values up to ±3 GPa for n and p transistor channel, respectively. This performance is partly due to the mechanical configuration of intrinsically strained channels, in parallel mode rather than in serial mode as for the previous generation of stressors, which makes them less sensitive to the scaling of the contacted gate pitch. We also highlight another key element the high mechanical stability of the UTBB technology, related to the limited channel thickness (around 6 nm) which enables achieving highly stressed channel without substantial adaptation of the integration flows. [ABSTRACT FROM AUTHOR]

The article offers information on the dark current spectroscopy (DCS) technique which can be used for the detection and identification of metallic contaminants present at low concentration in electronic equipments. It informs that the technique works to estimate the concentration and helps in determining its dissemination mode during the contamination process. It provides information on the working of complementary metal-oxide semiconductor (CMOS) image sensor.

Abstract: Local stressors techniques are extensively used in CMOS technologies starting with the 90nm node to compensate the mobility loss induced by extensive scale down. The purpose is to generate some strain within the silicon channel to enhance carrier mobility. To achieve nMOS performance at the 45nm node, gate stressors are required in addition to standard nitride liners. With this option, the stress generated within the gate is directly transmitted into the channel and more than 10% gain in saturation current is achievable on nMOS. Stress is generated within the polysilicon gate through annealing under a capping liner. After liner removal, a part of this stress is memorized within the gate material. Final gate stress depends on both polysilicon pre-treatments and liner properties. This paper deals with material studies performed on capping liners in parallel to tests on electrical devices. Important parameters to generate stress under capping are presented. This allows providing a simple model and guidelines for further optimization. [Copyright &y& Elsevier]

Rational creation of polymeric semiconductors from novel building blocks is critical to polymer solar cell (PSC) development. We report a new series of bithiopheneimide-based donor-acceptor copolymers for bulk-heterojunction (BHJ) PSCs. The bithiopheneimide electron-deficiency compresses polymer bandgaps and lowers the HOMOs—essential to maximize power conversion efficiency (PCE). While the dithiophene bridge progression R2Si→R2Ge minimally impacts bandgaps, it substantially alters the HOMO energies. Furthermore, imide N-substituent variation has negligible impact on polymer opto-electrical properties, but greatly affects solubility and microstructure. Grazing incidence wide-angle X-ray scattering (GIWAXS) indicates that branched N-alkyl substituents increased polymer π-π spacings vs linear N-alkyl substituents, and the dithienosilole-based PBTISi series exhibits more ordered packing than the dithienogermole-based PBTIGe analogues. Further insights into structure-property-device performance correlations are provided by a thieno[3,4-c]pyrrole-4,6-dione (TPD)-dithienosilole copolymer PTPDSi. DFT computation and optical spectroscopy show that the TPD-based polymers achieve greater subunit-subunit coplanarity via intramolecular (thienyl)S···O(carbonyl) interactions, and GIWAXS indicates that PBTISi-C8 has lower lamellar ordering, but closer π-π spacing than does the TPD-based analogue. Inverted BHJ solar cells using bithiopheneimide-based polymer as donor and PC71BM as acceptor exhibit promising device performance with PCEs up to 6.41% and Voc > 0.80 V. In analogous cells, the TPD analogue exhibits 0.08 V higher Voc with an enhanced PCE of 6.83%, mainly attributable to the lower-lying HOMO induced by the higher imide group density. These results demonstrate the potential of BTI-based polymers for high-performance solar cells, and provide generalizable insights into structure-property relationships in TPD, BTI, and related polymer semiconductors. [ABSTRACT FROM AUTHOR]