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Dynamic X‐ray detecting for large area medical imaging requires high‐gain and stable Active Pixel Sensor (APS) circuit integrated with Thin Film Transistors (TFTs). In this paper, the APS circuit using oxide TFTs is studied based on the small‐signal model, and the charge gain and effects of threshold voltage shift (ΔVth) are investigated. Detailed SPICE simulations show the charge gain of the APS circuit of the oxide TFTs is 234 × of that of the conventional a‐Si:H TFT PPS circuit. [ABSTRACT FROM AUTHOR]

A compact gate driver on array (GOA) was proposed for Micro‐Light Emitting diodes (Micro‐LED) display based on progressive‐mode pulse‐width modulation (PWM) using low‐temperature‐polysilicon (LTPS) thin‐film transistors (TFTs). Thanks to outputting line‐by‐line scanning (Scan) and emission control signals (EM) to address switching‐and emission‐transistors in Micro‐LED pixel circuit, the proposed GOA circuit enables an increased emission time by 60% with the frame rate of 120 Hz, compared with the conventional GOA circuit of simultaneous operating mode. Furthermore, the pulse‐width of EM signals are programmable simply by adjusting the number of input pulses. [ABSTRACT FROM AUTHOR]

In this paper, pixel circuit design method using low‐temperature poly‐silicon and oxides (LTPO) thin film transistors (TFTs) for active‐matrix organic light‐emitting diode (AMOLED) are derived in detail. Through calculation and SPICE simulation of a typical 7TFT‐1C LTPO pixel circuit, the optimum value for the capacitor is selected as 0.1 pF for accurate VTH compensation and high resolution above 490 pixels per inch (PPI). Moreover, to reduce the relative current error rate to 3 %, the maximum allowable threshold voltage shift is limited within −0.98 V and 0.44 V for IGZO TFT, and within −0.3 V to 0.31 V for the driving TFT (LTPS). This research provides guidelines for AMOLED display development using LTPO TFTs. [ABSTRACT FROM AUTHOR]

A 31-inch 4K flexible active-matrix organic light-emitting diode (AMOLED) display integrating with gate driver on the array (GOA) technology has been proposed and fabricated on a polyimide substrate. The GOA circuits, composed of two series-connected thin-film transistors (TFTs) and dual low-voltage power structure, are introduced to decrease the leakage current in TFTs. They are arranged symmetrically along the sides of the display. Inkjet printing (IJP) OLED process is used to reduce the number of sub-pixels from four (R/G/B/W) in commercial white OLED process to three (R/G/B) and a high pixel density in the display (144 pixels per inch) is achieved. Moreover, top-gated (TG) amorphous indium-gallium-zinc oxide (IGZO) TFTs with good electrical and mechanical reliability, have been successfully utilized to decrease the capacitance load in the display and improve signal transfer speed in GOA. Finally, this 31-inch flexible AMOLED display was operated for 500h under accelerating test conditions of 60°C and 90% humidity. [ABSTRACT FROM AUTHOR]

A new source driving circuit to compensate characteristics variations of thin-film transistors for AMOLED displays with high resolution is presented in this brief. The second-generation current conveyor is implemented for rapid current sensing of the feedback line, which is biased with a constant reference-voltage ($V_{{\mathrm{ REF}}}$). Further, the current difference between the current of the driving transistor (${I}_{ {D}}$) and the programming current, i.e., ${I}_{{\mathrm{ DATA}}}$ , is converted into switching voltage through an amplifier with a shorted resistor, to control the input of a ramp voltage (${V}_{{\mathrm{ RAMP}}}$). Thus, the degradations in electrical characteristics of the driving transistor can be compensated in real time, and both the influence of threshold voltage (${V}_{{\mathrm{ TH}}}$) shift and mobility (${ {\mu }}$) variation are effectively suppressed. The current-error rate of the proposed circuit is less than 3% with ${V}_{{\mathrm{ TH}}}$ shift of ±0.5 V or ${ {\mu } }$ variation of ±15%. In addition, the settling time is less than $4~{ {\mu } }{\text s}$ with the panel loading of 1.5 $\text{K}{ {\Omega }}$ and 100 pF at the OLED current (${I}_{{\mathrm{ OLED}}}$) levels ranging from 3 ${ {\mu }}\text{A}$ to 200 nA. [ABSTRACT FROM AUTHOR]

In this work we present a DC‐DC converter based on metal oxide thin film transistors (TFTs) for passive radio frequency identification (RFID) tags. To increase the voltage conversion ratio, the cross‐coupled structure with positive feedback from adjacent stages is proposed. Compared with conventional DC‐DC converter with separation block, the proposed circuit features the decreased threshold voltage drop, the reduced on‐resistance of switch transistor, the improved driving capability and the increased power efficiency. The simulated results reveal that the output voltage and maximum power efficiency for proposed two‐stage DC‐DC converter are 16.6 V and 52% at a output current of 550 µA, which are 12.6 V and 42% at a output current of 250 µA for conventional designs. [ABSTRACT FROM AUTHOR]

An operational amplifier with indium-gallium-zinc oxide thin-film-transistors (InGaZnO TFTs) is proposed and investigated. The proposed amplifier features introduction of positive feedback with negative equivalent output resistance for high voltage gain. Biasing conditions for every TFTs and voltage gain are systematically discussed. In addition, influences of threshold voltage shift on both static and dynamic performances are discussed. Comparison results show that the voltage gain can be increased from 40 to 67 dB, and stability of the constant tail-current biasing is better than that of constant voltage biasing method. Further, an oscillating capacitance touch sensing circuit based on the proposed amplifier is shown, and sub-pF touching capacitance can be distinguished. The proposed InGaZnO TFTs integrated amplifier is promising for high performance system on panel designs. [ABSTRACT FROM PUBLISHER]

An a‐IGZO TFTs integrated gate driver with programmable output waveform for AMOLED display is proposed by shared input shift registers and output stages of multiple clock‐follower structure. The driver provides not only multiple scan and control signals for internal compensation, but also extended scan pulses for external compensation. [ABSTRACT FROM AUTHOR]

A reliable digital thin‐film transistors (TFTs) integrated ambient light sensor is proposed. The circuit structure is simple, as only 6 TFTs and 2 capacitors are required. The intensity of ambient light is presented by the number of voltage pulses at the output terminal of the light sensor. The operating principal of the sensor are detailed, and SPICE simulations are performed to explore the relationship between the number of output pulses and the light‐induced leakage current. The feasibility of the circuit is further proved by measurements of fabricated circuit samples with the standard a‐Si:H TFTs process. [ABSTRACT FROM AUTHOR]

A depletion‐mode amorphous indium‐gallium‐zinc‐oxide thin‐film‐transistor (a‐IGZO TFT) gate driver on array (GOA) integrated circuit has been proposed and fabricated for a 15‐inch active‐matrix organic light emitting diode (AMOLED) display in this work. The depletion‐mode a‐IGZO TFTs were turned off completely due to series‐connected two‐transistor structure and dual low‐voltage‐level power signal. For this reason, the window of Vth shift margin was wide with margin value from −5V to +10V by Spice simulation. Additionally, the proposed GOA circuit exhibited stable high‐voltage output pulse. Subsequently, GOA circuit was placed in a 15‐inch AMOLED display and the performance of the proposed circuit was confirmed. [ABSTRACT FROM AUTHOR]

A novel bootstrap method is proposed, which can significantly reduce the clock feedthrough effect and the dynamic power consumption. An ESL a-IGZO TFTs based gate driver using this technique is designed. It is shown that the ripple voltage and the power consumption of the proposed driver are only 22.9% and 23.86% of those of the earlier driver. [ABSTRACT FROM AUTHOR]

Analysis results demonstrates in this paper for gradation horizontal line (H-line) occurred in reliability (aging) test on amorphous silicon TFT-LCDs with integrated gate driver technology (short as GOA circuit). There are two factors that induce H-line: GOA gate output and data inversion type. Changing these two factors could eliminate or relieve H-line defect. [ABSTRACT FROM AUTHOR]

A stack buffer structure is proposed to suppress feed-through effects, which is caused by serious gate-to-drain capacitance of Etching-Stop-Layer (ESL) type InGaZnO (IGZO) TFTs. For low-level-maintaining periods, the stack buffer TFT can be modeled by reversely cascaded diodes for decreasing of noise voltage of internal nodes. Compared with conventional designs, the proposed buffer structure owns better stability and good driving ability. A robust gate driver using the proposed buffer structure is demonstrated, and only 7 TFTs and 1 capacitance are used. Thorough analysis and simulations are carried out, and the circuit performance is discussed concerning threshold voltage variation, different bootstrapping capacitance, and decreased driving pulse width. It is proven that the proposed gate driver is promising for high performance IGZO TFT display with high resolution for large dimension display. [ABSTRACT FROM AUTHOR]

A dual-gate (DG) amorphous indium–gallium–zinc-oxide thin-film transistor (TFT)-driven pixel circuit for active-matrix organic light-emitting diode displays is presented. One gate of the DGs serves as a primary gate (PG) and the other as an auxiliary gate (AG). The threshold voltage ( V\mathrm {{TH}} ) of the DG TFT under the PG operation is modulated by the AG bias voltage. The V\mathrm {{TH}} variation ( \Delta V\mathrm {{TH}} ) is compensated with the AG and the drain diode-connected structure. The validity of the presented pixel circuit is experimentally verified. The measured current error rates are less than 3.2% at a \Delta V\mathrm {{TH}} of \text TFT = \pm 0.5 V and a \Delta V\mathrm {{TH}} of OLED = 0.5 V with the emission current ranging from 7 nA to 1.13~\mu \textA . [ABSTRACT FROM AUTHOR]

A TFT integrated gate driver with threshold voltage (Vth) shift compensable low-level holding (LLII) unit is proposed. The gate overdrive voltage (VGOV) of LLII TFTs is kept small and constant due to the compensation effect during the LLII period, leading to much suppressed AVTH and enlarged AVTH tolerance. Simulation results show that the proposed gate driver is able to work properly even the AVTH is up to around (VH-VI). This indicates that the proposed gate driver is of long life. [ABSTRACT FROM AUTHOR]

A low-power ESL a-IGZO TFT integrated gate driver, where the gate level of driving-transistor is kept lower than the source/drain level to suppress the serious dock-feed-through effect induced by the large parasitic capacitance of the ESL structured driving TFT Moreover, a new inverter is designed to minimize internal leakage current. Thus, the dependence of power consumption in the gate driver on the overlap-length between gate and source/drain of driving TFT anil the bootstrapping capacitor is much lessened. Simulation results verify the feasibility of the proposed gate driver with 16 stages and manifest that the power consumption is smaller than half of the conventional one whit the same simulation parameters. [ABSTRACT FROM AUTHOR]

A hydrogenated amorphous silicon (a-Si:H) thin-film transistor (TFT) gate driver on array with low-level holding TFTs (LLH TFTs) biased under bipolar pulse is investigated. It is shown that the bipolar bias at low frequency significantly alleviates the threshold voltage shift of the LLH TFTs. As a result, the lifetime of the proposed gate driver is demonstrated to be several times of that under the conventional unipolar pulse bias. In addition, the improvement in the lifetime becomes more significant at the higher work temperature. The liquid crystal display television panels (32-in, 1366\times \textrm RGB\times 768 ) with the proposed a-Si:H gate drivers integrated on array are manufactured, and the feasibility of the proposed driving scheme is well verified. [ABSTRACT FROM PUBLISHER]

Threshold voltage shift ( \Delta V\mathrm{ TH} ) effect of hydrogenated amorphous silicon thin-film transistors under bipolar pulse bias stress (BPBS) is investigated. The dependence of the \Delta V\mathrm{ TH} effect on the signal pulsewidth, stress temperature, and negative pulse voltage magnitude of the BPBS is systematically measured, and explained by the charge trapping and detrapping theory. Results show that the BPBS leads to a noticeably suppressed \Delta V\mathrm{ TH} , compared with the conventional unipolar pulse bias stress. It is suggested that the BPBS with proper negative pulse voltage magnitude and low pulse frequency is an effective way of suppressing \Delta V\mathrm{ TH} , especially when the thin-film transistors work relatively at high temperature. [ABSTRACT FROM PUBLISHER]

Reliability issues of TFT integrated gate driver are still of great concern for large size (i.e. TV) display applications, especially for a‐Si:H TFT integrated panels with stressing test of high temperature and high humidity (HTHHO). In this paper, current detection method is proposed for gate driver failure identification. Measurements of 55‐inch UHD TV (4K) panel with integrated gate driver are carried out. It is found that gate driver failure after HTHHO are strongly associates with via‐hole open of clock bus‐lines. It is demonstrated that current through clock lines will be increased with prolonged falling edge due to multi‐pulses of gate driver outputs. And clock bus‐line open is caused by oxygen of Cu after long operating time during the stressing test. [ABSTRACT FROM AUTHOR]

This paper presents an IGZO-TFT latch circuit featuring high stability and simple structure with only 5 TFTs per stage. Pass-transistor logic style with gate voltage bootstrapped is used to suppress voltage amplitude loss and achieve a full swing output. Comparison studies are carried out with conventional latch, and results show that the proposed one has compact layout, free DC stress and enhanced immunity to △VTH. [ABSTRACT FROM AUTHOR]

A high reliable amorphous silicon gate driver with shared dual pull-down units is proposed and fabricated for large-sized TFT-LCD applications. A special unit in the driver is designed to generate bipolar pulse bias for low-level holding TFTs to suppress the threshold voltage shift, which achieves 40.5% and 34.8% improvement compared with conventional DC and unipolar pulse bias respectively according to measurement results. [ABSTRACT FROM AUTHOR]

A digital-to-analog converter (DAC) working in a charge-cyclic mode and inplementable with IGZO TFTs for integrated data driver is proposed The DAC has the conversion accuracy determined by the ratio of loading capacitances of every two adjacent data lines and therefore independent of threshold voltages (VT) of integrated devices. Thus, high conversion accuracy can be achieved even if a significant VT shift or variation happens. [ABSTRACT FROM AUTHOR]

A thorough study on the gate driver integrated with hydrogenated amorphous-silicon thin-film transistors (a-Si:H TFTs) for active-matrix flat-panel display (AM-FPD) is carried out in this work. The single stage circuit of the a-Si:H gate driver consists of input, pull-up, pull-down, and low-level holding units. The operation principle of the driver is described in detail. The subtle static and dynamic characteristics of the a-Si:H TFT based circuit are analyzed systematically for the first time. The long term reliability issue is also addressed. Design equations for determining the device sizes of the circuit are derived. The TFT-LCD panels integrated with the designed gate driver are fabricated to verify the design efficiency. [ABSTRACT FROM PUBLISHER]

An integrated five-transistor/one-capacitor approach for realizing a a-Si:H thin-film transistor (TFT) gate driver operating in multiphase-clock mode is proposed and investigated. The driver needs only one large-size TFT and one small-size storage capacitor. The performance and function of the proposed driver are verified experimentally. The dependence of the performance on the device size is studied in detail. Stability of the fabricated drivers is tested using a flexible measurement scheme. Measured results show that the fabricated gate driver can work stably even though the low-level-holding TFTs have a threshold-voltage shift of 19 V. [ABSTRACT FROM AUTHOR]

• Dynamic current hysteresis that can well capture the effect of the trap energy level, trap density and scan rate is proposed. • This Dynamic current hysteresis model based on trap kinetics is well compatible with SPICE simulations. • The methodology of this hysteresis model can be well extended to other trap kinetics theory and emerging devices. This paper proposes a dynamic current hysteresis model for the Indium Gallium Zinc Oxide Thin Film Transistor (IGZO-TFT). Based on the Shockley-Read-Hall (SRH) theory, a kinetic equation that accurately describes the interface trap's capture/emission behaviour is presented, which can incorporate the effect of interface trap density, trap energy level and scan rate dependency. Further, the kinetic equation is solved using a sub-circuit approach, combined with a calibrated TFT static current model, to achieve an accurate simulation of the current hysteresis of IGZO-TFT. This model has been validated with numerical TCAD simulations and has been shown to precisely reflect the effect of trap energy level, trap density and scan rate on the current hysteresis characteristics. [ABSTRACT FROM AUTHOR]