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Metal-insulator-metal capacitors with SrxTiyOz (STO) dielectric films on TiN, Ru, and RuOx bottom electrodes with TiN top electrodes were studied. Metastable perovskite STO films with compositions in the Sr/(Sr+Ti)∼54-64 at. % range were obtained by crystallization at 600 °C in N2 of dielectric stacks grown by atomic layer deposition consisting of Sr-rich STO films [Sr/(Sr+Ti)∼64 at. %] on thin interfacial TiOx layers. The significant decrease in equivalent oxide thickness (EOT) and STO lattice parameter observed with increasing TiOx thickness indicates full intermixing of the TiOx and STO layers during the crystallization anneal, which results in the formation of an STO layer with higher Ti content and higher dielectric constant. The Sr-rich STO on TiOx stacks crystallize with small grain size, favorable for low leakage (JG). A significant improvement in JG for e-injection from the bottom electrode is obtained when using RuOx, as compared to TiN or Ru. A milder JG improvement with RuOx bottom electrode is also seen for e-injection from the top TiN electrode, indicating that higher quality perovskite STO films are formed on RuOx, or equivalently, that their trap density is lower. We propose oxygen scavenging from the STO by TiN or Ru electrodes, eliminated or reversed when using RuOx, as an explanation for the improvement. Using an optimized RuOx/TiOx/STO/TiN stack we obtained leakage of 10-7 A/cm2 (at 0.8 V) and 0.4 nm EOT. [ABSTRACT FROM AUTHOR]

Metastable perovskite SrxTiyOz (STO) films were formed over a wide composition range by crystallization of layers grown by atomic layer deposition. An expansion of the lattice, decrease in permittivity and mild increase in band gap are observed with increasing Sr content. Sr-rich films [Sr/(Sr+Ti)∼62 at. %] show significant improvement in leakage current at low equivalent oxide thicknesses (EOT) as compared to stoichiometric films (Sr/(Sr+Ti) ∼50 at. %). TiN/STO/TiN capacitors with leakage ∼10-6 A/cm2 at 1 V were obtained at 0.6 nm EOT for crystalline Sr-rich STO. The difference in leakage behavior was found to correlate with different microstructures developed during crystallization. [ABSTRACT FROM AUTHOR]

Abstract: We report for the first time that the optimization of a HfSiON process on Ni-FUSI devices is best tackled using a design of experiments (DOE [Myers RH, Montgomery. Response surface methodology. New York, DC: Wiley; 1995]) approach. We show that a DOE allows for directly linking process parameters to relevant short channel performance metrics. By tuning the SiO2 thickness, HfSiO thickness, Hf concentration, nitridation parameters and by using response surface modeling (RSM), we report an improvement of 12%/17% in nMOS/pMOS drive current (I dsat 600/255uA/μm at I off =20pA/μm and V dd =1.1V) over our reference process. In parallel, we demonstrate that by selecting the right parameters, plasma nitridation can outperform thermal nitridation with NH3. We believe that this new approach will be useful for device engineers and can be easily applied. [Copyright &y& Elsevier]