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This paper addresses the generation of behavioral models of digital integrated circuits (ICs) for signal and power integrity simulations. The proposed models are obtained by external measurements carried out at the device ports only and by the combined application of specialized state-of-the-art modeling techniques. The present approach exploits a behavioral formulation, leading to models reproducing all the behavior of the IC ports as the input/output buffers and the core power delivery network. The modeling procedure is demonstrated for a commercial nor Flash memory in 90-nm technology housed by a specifically designed test fixture. [ABSTRACT FROM PUBLISHER]

This paper provides a novel iterative solution in an analytical (as opposed to numerical) fashion in the frequency domain for crosstalk on multiconductor transmission lines. The proposed method employs the distributed analytical representation of equivalent coupling sources and an iterative technique originated in transverse waveform relaxation. The effects of adjacent lines at each iteration are considered as equivalent distributed sources along the lines rather than lumped sources at the end of the lines or segments. By means of combined voltage waves, these equivalent distributed sources are further implemented analytically in the form of exponential function combinations, leading to a more efficient updating process since the time-consuming numerical integration over the line is avoided. The voltages and currents at the terminals are solved by the Baum–Liu–Tesche equation considering the symmetry of the coupled transmission lines. One major advantage is that the solution at each iteration is obtained analytically and exactly in terms of the per-unit-length parameters, loads, and some predetermined coefficients, which is highly suitable for illustrating the factors that influence the crosstalk. The validation results in a wide range cases show that the proposed method can efficiently handle transmission lines with a large number of conductors and lossy as well as frequency-dependent parameters. [ABSTRACT FROM PUBLISHER]

This paper addresses the development of accurate and efficient behavioral models of digital integrated circuits for the assessment of high-speed systems. Device models are based on suitable parametric expressions estimated from port transient responses and are effective at system level, where the quality of functional signals and the impact of supply noise need to be simulated. A potential limitation of some state-of-the-art modeling techniques resides in hidden instabilities manifesting themselves in the use of models, without being evident in the building phase of the same models. This contribution compares three recently-proposed model structures, and selects the local-linear state-space modeling technique as an optimal candidate for the signal integrity assessment of data links. In fact, this technique combines a simple verification of the local stability of models with a limited model size and an easy implementation in commercial simulation tools. An application of the proposed methodology to a real problem involving commercial devices and a data-link of a wireless device demonstrates the validity of this approach. [ABSTRACT FROM AUTHOR]

Modern packaging design requires extensive signal integrity simulations in order to assess the electrical performance of the system. The feasibility of such simulations is granted only when accurate and efficient models are available for all system parts and components having a significant influence on the signals. Unfortunately, model derivation is still a challenging task, despite the extensive research that has been devoted to this topic. In fact, it is a common experience that modeling or simulation tasks sometimes fail, often without a clear understanding of the main reason. This paper presents the, fundamental properties of causality, stability, and passivity that electrical interconnect models must satisfy in order to be physically consistent. All basic definitions are reviewed in time domain, Laplace domain, and frequency domain, and all significant interrelations between these properties are outlined. This background material is used to interpret several common situations where either model derivation or model use in a computer-aided design environment fails dramatically. We show that the root cause for these difficulties can always be traced back to the lack of stability, causality, or passivity in the data providing the structure characterization and/or in the model itself. [ABSTRACT FROM AUTHOR]

This paper addresses the impact of device macro-models on the accuracy of signal integrity and performance predictions for critical digital interconnecting systems. It exploits nonlinear parametric models for both single-ended and differential devices, including the effects of power supply fluctuations and receiver bit detection. The analysis demonstrates that the use of well-designed macromodels dramatically speeds up the simulation as well it preserves timing accuracy even for long bit sequences. [ABSTRACT FROM AUTHOR]

This paper addresses the modeling of differential drivers and receivers for the analog simulation of high-speed interconnection systems. The proposed models are based on mathematical expressions, whose parameters can be estimated from the transient responses of the modeled devices. The advantages of this macromodeling approach are: improved accuracy with respect to models based on simplified equivalent circuits of devices; improved numerical efficiency with respect to detailed transistor-level models of devices; hiding of the internal structure of devices; straightforward circuit interpretation; or implementations in analog mixed-signal simulators. The proposed methodology is demonstrated on example devices and is applied to the prediction of transient waveforms and eye diagrams of a typical low-voltage differential signaling (LVDS) data link. [ABSTRACT FROM AUTHOR]

This paper addresses the development of computational models of digital integrated circuit input and output buffers via the identification of nonlinear parametric models. The obtained models run in standard circuit simulation environments, offer improved accuracy and good numerical efficiency, and do not disclose information on the structure of the modeled devices. The paper reviews the basics of the parametric identification approach and illustrates its most recent extensions to handle temperature and supply voltage variations as well as power supply ports and tristate devices. [ABSTRACT FROM AUTHOR]

Focuses on the development of macromodels for input and output ports of a digital device. Characterization of transistor-level models of commercial devices; Advantages of the parametric approach to behavioral modeling; Utilization of the discrete-time parametric models in automatic controls.

Recently, an efficient stochastic modeling method for interconnects with inherent variability in their physical parameters was proposed, based on applying the so-called polynomial chaos (PC) approach in conjunction with a Stochastic Galerkin Method (SGM) onto telegrapher's equations. Although this approach was already very successful from a numerical point of view, the novel technique could not be conveniently integrated into SPICE-like solvers, limiting the applicability of the method. In this letter, the PC-SGM scheme for telegrapher's equations is revisited, pinpointing the origin of this inconvenience and immediately allowing to mitigate the issue. By adapting the traditional discretization of the stochastic telegrapher's equations approach, an augmented, yet deterministic, set of ordinary differential equations is obtained that turns out to be of the same type as the telegrapher's equations, and hence, the physical property of reciprocity is preserved. Consequently, it can be directly and more efficiently handled using SPICE-like solvers, which usually assume matrix symmetries. As an application example, the variability analysis of a state-of-the-art on-chip line for millimeter-wave applications is performed in a SPICE solver. [ABSTRACT FROM PUBLISHER]

A foreword to "IEEE Transactions on Advanced Packaging" vol. 31 is presented.

This paper addresses the generation of accurate and efficient behavioral models of digital ICs. The proposed approach is based on the approximation of the device port characteristics by means of composite local linear state-space relations whose parameters can effectively be estimated from device port transient responses via well-established system identification techniques. The proposed models have been proven to overcome some inherent limitations of the state-of-the-art models used so far, and they can effectively be implemented in any commercial tool as Simulation Program with Integrated Circuit Emphasis (SPICE) subcircuits or VHDL-AMS hardware descriptions. A systematic study of the performances of the proposed state-space models is carried out on a synthetic test device. The effectiveness of the proposed approach has been demonstrated on a real application problem involving commercial devices and a data link of a mobile phone. [ABSTRACT FROM AUTHOR]

This paper addresses the development of accurate and efficient models of the output ports of digital integrated circuits (ICs). The proposed approach is based on the estimation of suitable mathematical relations reproducing the external behavior of devices. Device models are obtained through a well-established procedure from port transient voltage and current responses recorded during the normal activity of the IC mounted on a real board, thus avoiding specific modeling setup and test fixtures. The efficiency of the approach is demonstrated on real devices from both numerical simulations and actual measurements. [ABSTRACT FROM AUTHOR]

This article presents a time-domain macromodeling algorithm for buried transmission lines subject to coupling of an incident field and terminated with linear and nonlinear loads. Different from overhead lines, the determination of the transient ground admittance is of great importance due to the complexity of the analytical expressions and the necessity of assuring a good approximation over a wide frequency range. The proposed macromodel adopts the analog behavioral modeling (ABM) library of Spice solvers to model frequency-dependent transmission line parameters directly, and calculate convolution in time domain, making it simple and convenient to treat time-domain field-to-line coupling equations without the need of time and spatial discretization and curve fitting used in other time-domain numerical algorithms. Besides, the model complexity is not limited by the line length. Hence, the proposed algorithm can significantly simplify the modeling process and improve simulation efficiency, especially for long multiconductor transmission lines. Furthermore, an effective and simplified expression for self and mutual ground impedance and admittance of underground lines is proposed in this article. With the proposed expression, the time-consuming numerical integration can be avoided, leading to a saving of 98% of the computational time. Finally, several validation examples of field coupling to buried power cables terminated with linear and nonlinear devices are investigated. The comparison of calculated waveshapes and CPU times shows the accuracy and efficiency of the proposed method. [ABSTRACT FROM AUTHOR]

Anaccurate measurementmethod to extract the common mode (CM) and the differential mode (DM) noise source impedances of a switched-mode power supply (SMPS) under its operating condition is developed and validated. With a proper premeasurement calibration process, the proposed method allows extraction of both the CM and the DM noise source impedances with very good accuracy. These noise source impedances come in handy to design an electromagnetic interference filter for an SMPS systematically with minimum hassle. [ABSTRACT FROM AUTHOR]

We introduce a novel parameterization scheme based on the generalized method of characteristics (MoC) for macromodels of transmission-line structures having a cross section depending on several free geometrical and material parameters. This situation is common in early design stages, when the physical structures still have to be finalized and optimized under signal integrity and electromagnetic compatibility constraints. The topology of the adopted line macromodels has been demonstrated to guarantee excellent accuracy and efficiency. The key factors are propagation delay extraction and rational approximations, which intrinsically lead to a SPICE-compatible macromodel stamp. We introduce a scheme that parameterizes this stamp as a function of geometrical and material parameters such as conductor-width and separation, dielectric thickness, and permettivity. The parameterization is per- formed via multidimensional interpolation of the residue matrices in the rational approximation of characteristic admittance and propagation operators. A significant advantage of this approach consists of the possibility of efficiently utilizing the MoC methodology in an optimization scheme and eventually helping the design of interconnects. We apply the proposed scheme to flexible printed interconnects that are typically found in portable devices having moving parts. Several validations demonstrate the effectiveness of the approach. [ABSTRACT FROM AUTHOR]