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Water crises due to climate change, high population growth and increasing demands from industry and agriculture claim for increasing efficiency and universalizing water resources management strategies and techniques. Water monitoring helps providing necessary evidences for making sound decisions about managing water resources both now and in the future. In this work, a low cost and “do it yourself” communication device is proposed to record water production and energy consumption of electric pumpings from deep boreholes/wells, and to predict the impact of the ongoing and previous pumpings in the evolution of the water level in the aquifer. The proposal incorporates an edge-computing approach for the simulation of the aquifer response in real-time. Computation of results of interest is performed at the sensor, minimizing communication requirements and ensuring almost immediate results. An approximated solution to physically based modeling of aquifer response is computed thanks to the a priori expression of the water level time evolution in a reduced basis. The accuracy is enough to detect deviations from expected behaviour. The energy consumption of the device is very much reduced with respect to that of a full modelling, which can be computed off-line for calibrating reduced model parameters and perform detailed analyses. The device is tested in a real scenario, in a mountain subbasin of the Ebro river in Spain, obtaining a good trade-off between performance, price, and energy consumption., This research has been partly supported by EU under grant agreement N. 825184 and funded by the Government of Spain under contracts PID2019-106774RB-C21, PID2019-106774RB-C22, and PID2020-113172RB-I00 and by the Government of Catalonia as Consolidated Research Groups 2017-SGR-688 and 2017-SGR-990, and Pre-consolidated Research Group 2017-SGR-1496. The APC was funded by the Open program from Universitat Rovira i Virgili., Peer Reviewed, Postprint (published version)

© 2020 IEEE. Personal use of this material is permitted. Permission from IEEE must be obtained for all other uses, in any current or future media, including reprinting/republishing this material for advertising or promotional purposes, creating new collective works, for resale or redistribution to servers or lists, or reuse of any copyrighted component of this work in other works, We propose a teaching resource that uses Hard Kernel boards to build an MPI server with 256 cores. Although this system has a relatively low performance, the aim is to provide access to hundreds of cores for carrying out scalability analyses, while obtaining a good trade-off between performance, price, and energy consumption. Here, we give details about the implementation of this system at both the hardware and software levels. We also explain how it was used to teach parallel programming in a university degree course, and discuss the teachers’ and students’ comments about using this new system., This work has been funded by the Government of Spain undercontractsTIN2016-77836-C2-1-R, TIN2016-77836-C2-2-R,TIN2016-75344-R and DPI2016-77415-R, and by the Governmentof Catalonia as Consolidated Research Groups 2017-SGR-688 and 2017-SGR-990, Peer Reviewed, Postprint (published version)

We propose a teaching resource that uses HardKernel boards to build an MPI server with 256 cores. Although this system has a relatively low performance, the aim is to provide access to hundreds of cores for carrying out scalability analyses, while obtaining a good trade-off between performance, price, and energy consumption. Here, we give details about the implementation of this system at both the hardware and software levels. We also explain how it was used to teach parallel programming in a university degree course, and discuss the teachers' and students' comments about using this new system.

En la mayoría de los estudios de Grado en Ingeniería Informática hay asignaturas que abordan el tema de la supercomputación. Uno de sus objetivos es adquirir competencias en programación paralela. Para realizar ejercicios y prácticas se suelen usar estándares como OpenMP, MPI y CUDA. Para programar con dichos estándares se usan sistemas de elevado precio, lo que hace que el presupuesto disponible limite el número de procesadores. Por lo tanto, el acceso a un supercomputador con cientos de procesadores (que supone centenares de miles de euros) no parece estar justificado para realizar prácticas con los estudiantes. Sin embargo, y siguiendo la tendencia de usar muchos procesadores pero poco potentes basados en ARM, se puede construir un minimulticomputador de bajo coste por un precio equivalente a un servidor de memoria compartida. Este trabajo presenta un recurso docente basado en placas de HardKernel, que integran 64 placas Odroid y que mediante Gigabit-Ethernet permiten montar un servidor de programación MPI con 256 procesadores. Si bien se trata de un recurso de bajas prestaciones, es interesante el hecho de tener acceso a centenares de procesadores para poder hacer estudios de escalabilidad, manteniendo un buen compromiso entre prestaciones, precio y consumo., Este trabajo ha contado con la financiación del Gobierno de España bajo los contratos TIN2016-77836-C2-1-R, TIN2016-77836-C2-2-R, TIN2016-75344-R y DPI2016-77415-R, y también de la Generalitat de Catalunya como Grupos de Investigación Consolidados 2017-SGR-688 y 2017-SGR-990, Peer Reviewed, Postprint (published version)