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A new gate-drive solution, cascade active voltage control (Cascade AVC), employs classic feedback-control methods with an inner loop controlling the insulated-gate bipolar-transistor (IGBT) gate voltage and an outer loop controlling the collector voltage, simultaneously. They make the switching performance less dependent on the IGBT itself. Feedback control of IGBTs in the active region does not necessarily slow the switching but introduces stability issues. A detailed stability analysis provides a sensible perspective to judge the system stability and justify the controller design, through considering major operating points and determining corresponding IGBT parameters. Experiments on high-power IGBTs including a 4500-V device show that Cascade AVC offers improved performance and is easier to design than the original AVC. Index Terms--Cascade active voltage control (Cascade AVC), controlled switching, high-power insulated-gate bipolar transistor (IGBT), series connection, stability.

Novel diode test structures have been manufactured to characterize long-range dopant diffusion in tungsten silicide layers. A tungsten silicide to p-type silicon contact has been characterized as a Schottky barrier rectifying contact with a silicide work function of 4.8 eV. Long-range diffusion of boron for an anneal at 900[degrees]C for 30 min has been shown to alter this contact to become ohmic. Long-range diffusion of phosphorus with a similar anneal alters the contact to become a bipolar n-p diode. Bipolar diode action is demonstrated experimentally for anneal schedules of 30 min at 900[degrees]C, indicating long-range diffusion of phosphorus (~38/[micro]m). SIMS analysis shows dopant redistribution is adversely affected by segregation to the silicide/oxide interface. The concept of conduit diffusion has been demonstrated experimentally for application in advanced bipolar transistor technology. Index Terms--Diffusion processes, diodes, doping, tungsten compounds.

An on-chip charge-collection measurement circuit has been designed and fabricated in a 130 nm bulk CMOS process. Laser testing is used to verify the effectiveness of the on-chip charge-collection circuit technique for characterizing single event charge collection in advanced technologies. The on-chip charge-collection measurement circuit is used as an investigative tool for examining the effects of parasitic bipolar amplification for deep.submicron PMOS devices. Index Terms--Charge collection, [n.sup.+] diode, NMOS, n-well potential collapse, [p.sup.+] diode, parasitic bipolar transistor, PMOS, single event characterization.

The OP400 bipolar operational amplifier is widely used in space applications due to its performance and its low power consumption. However experimental results exhibit high total dose sensitivity. Circuit analysis is used to understand mechanisms at play and to find appropriate worst case test methods and solutions for design application. Index Terms--Bipolar transistor, integrated circuits (ICs), slew-rate, total dose.

We investigate radiation-induced effects on the DC, AC and thermal characteristics of high-performance SiGe HBTs fabricated on thin-film SOI. TCAD simulations indicate novel heavy-ion charge collection phenomena resulting from the unique [C.sub.B][E.sup.B]C device layout of this technology platform. Index Terms--C-SiGe, Heterojunction bipolar transistors, radiation effects, SiGe HBT, silicon-on-insulator (SOI), TCAD.

It is experimentally demonstrated with test transistors and circuits that hydrogen is correlated with enhanced low dose rate sensitivity (ELDRS) in bipolar linear circuits. These experiments show that the amount of hydrogen determines the total dose response versus dose rate, both the saturation at low dose rate and the transition dose rate between the high and low dose rate responses. The experimental results are supported with modeling calculations using REOS (Radiation Effects in Oxides and Semiconductors). Index Terms--Dose rate, enhanced low-dose rate sensitivity, hydrogen, interface traps, radiation effects, total ionizing dose, voltage comparator.

We report on an early-time inverse gain comparison between ion and neutron irradiated silicon bipolar junction transistors. We find ion irradiations to be an excellent simulator for fast-burst neutrons for early-time behavior and damage creation rates. In addition we report on an experimental to simulation comparison of transient gain annealing response. The simulations are from a physics based modeling approach that is being developed at Sandia National Laboratories as part of the Qualification Alternatives to the Sandia Pulsed Reactor (QASPR) Program. We find excellent agreement between simulation and experiment across a wide range of irradiation conditions. Index Terms--Damage equivalence, heavy ion irradiation, neutron damage, silicon bipolar transistor.

We present evidence that enhanced low-dose-rate sensitivity (ELDRS) in lateral and substrate pnp bipolar devices can occur because of the much lower probability for electron capture by protons in Si[O.sub.2], as compared to mobile or trapped holes. New experimental results and a critical evaluation of previous work demonstrate that, at high dose rates and/or in oxides with low concentrations of hydrogen, electrons can more easily neutralize slowly diffusing or metastably trapped holes via annihilation (recombination) or compensation (offsetting trapping) before the holes can release [H.sup.+]. In contrast, at low dose rates and/or in oxides with higher concentrations of hydrogen, which can react with and modify the structure of O-vacancy-related defects, it is more likely that holes can release [H.sup.+] during transport. This is because the cross section for electron capture by [H.sup.+] is several orders of magnitude smaller than the electron capture cross section for a slowly moving or metastably trapped hole. This enhanced proton release at low dose rates or in oxides with high hydrogen concentrations can lead to increased interface trap formation, which is the most common source of enhanced gain degradation in lateral and substrate pnp bipolar transistors. Index Terms--Enhanced low-dose-rate sensitivity (ELDRS), hydrogen, interface trap charge, linear bipolar devices, oxide trap charge, vacancies.

In modern pulsed power systems, often, fast solid-state switches like MOSFETs and insulated gate bipolar transistor (IGBT) modules are used to generate short high power pulses. In order to increase the pulsed power, solid-state switches have to be connected in series or in parallel. Depending on the interconnection of the switches, parameter variations in the switches and in the system can lead to an unbalanced voltage or current. Therefore, the switches are generally derated, which results in an increased number of required devices, cost, and volume. With an active gate control, derating and preselection of the switching devices can be avoided. In this paper, an active gate control of paralleled IGBT modules, which has been developed for converters with inductive load, is explained in detail and adapted to a solid-state modulator. This paper focuses on achieving a low-inductance IGBT current measurement, the control unit implementation with a field-programmable gate array and a digital signal processor, as well as the balancing of the pulse currents. Index Terms--Active gate control, current balancing, insulated gate bipolar transistor (IGBT) modules, printed circuit board (PCB)-Rogowski coil, solid-state modulator.

Photosensitive polybenzoxazole (PBO) film has been used in GaAs heterojunction bipolar transistor (HBT) technology for stress buffer and mechanical protection layer applications. However, this film needs to be cured at high temperatures for a long period of time in order to obtain its desired excellent material characteristics. High-temperature curing can result in degradation to the electrical characteristics and performance of the underlying GaAs devices due to limited thermal budget. In this paper, we have characterized the effects of curing the PBO film on GaAs HBT wafers using a conventional convection furnace and using a variable frequency microwave (VFM) furnace. The results show that a VFM cure can achieve similar excellent physical, mechanical, thermal, and chemical material characteristics at a lower curing temperature and in a much shorter time, as compared to convection furnace curing, therefore resulting in minimal GaAs device degradation. Based on these results, an optimum curing condition using the VFM method can be obtained that satisfies both stress buffer layer material and device requirements for GaAs HBT technology. Index Terms--Buffer layer, convection curing, GaAs, heterojunction bipolar transistor (HBT), polybenzoxazole (PBO), polymer, variable frequency microwave (VFM) curing.

In this paper, we present a Marx-stackable insulated-gate-bipolar-transistors-based modulator for plasma ion implantation and other pulsed high voltage--high peak power applications. Active control of charging and discharging cycles permits rigid pulse forms, arbitrary duty cycles and internal efficiencies exceeding 90%. We demonstrate a 20-kV 15-A generator using a 2-kV Marx generator to drive a pulse transformer. Index Terms--Capacitor bank, Marx generator, plasma ion implantation (PII), power modulation, pulsed power.

This paper presents the enhanced characteristics of a newly developed low-loss and low-noise 1200-V insulated gate bipolar transistor (IGBT) module. In order to realize low-noise emission, it is necessary not only to improve the reverse recovery characteristics of the free wheeling diode (FWD) but also to reduce the low-current turn-on d[I.sub.c]/dt of the IGBT. The new IGBTs with high turn-on d[I.sub.c]/dt controllability and low turn-on power dissipation have been successfully developed by the reduction of Miller capacitance resulting from an optimization of the surface. The 1200-V 450-A IGBT module utilizing the new IGBT and optimized FWD chips has been able to realize 30 % reduction of the switching power dissipation when compared to the conventional IGBT module under the operating condition to set the same noise emission level. Index Terms--Electromagnetic interference (EMI) noise, Miller capacitance, reverse-recovery dV/dt, turn-on di/dt controllability.

A new analytical model for enhanced yield of radiation-induced charge in low-field thick oxides due to lesser recombination under low-dose-rate and high temperature conditions has been developed. Numerical simulations are quantitatively well agreed with experimental data. Index Terms--Bipolar transistor, enhanced low dose rate sensitivity (ELDRS), low-dose-rate irradiation, model, recombination.

A new experimental technique is used to analyze the transient response of partially depleted SOI devices to pulsed laser irradiation. This new technique allows calibration of the deposited charge in the sensitive volume (i.e., the body region of the measured SOI transistors) and then the quantitative analysis of the device transient response. In particular 50-nm gate length SOI transistors have been tested with the pulsed laser, and their response is compared to 0.25-[micro]m partially depleted SOI transistors. The transient current and the collected charge are investigated as a function of the supply voltage for both types of SOI devices. The technology optimization for low leakage or high performance applications is shown to have large effects on the SOI device sensitivity. Index Terms--Bipolar amplification gain, charge calibration, critical charge, partially depleted SOI, pulsed laser irradiation, threshold LET.

This paper presents a new type of transmission-line resonator and its application to RF (microwave and millimeter-wave) heterojunction bipolar transistor (HBT) oscillators. The resonator is a parallel combination of two open stubs having length of [lambda]/4 [+ or -] [delta] ([delta] << [lambda]), where [lambda] is a wavelength at a resonant frequency. The most important feature of this resonator is that the coupling coefficient ([beta]c) can be controlled by changing [delta] while maintaining unloaded Q-factor ([Q.sub.u]) constant. Choosing a small value of [delta] allows us to reduce [beta]c or equivalently to increase loaded Q-factor ([Q.sub.L]). Since coupling elements such as capacitors or electromagnetic gaps are not needed, [beta]c and [Q.sub.L] can be precisely controlled based on mature lithography technology. This feature of the resonator proves useful in reducing phase noise and also in enhancing output power of microwave oscillators. The proposed resonator is applied to 18-GHz and 38-GHz HBT oscillators, leading to the phase noise of--96-dBc/Hz at 100-kHz offset with 10.3-dBm output power (18-GHz oscillator) and--104-dBc/Hz at 1-MHz offset with 11.9 dBm (38-GHz oscillator). These performances are comparable to or better than state-of-the-art values for GaAs- or InP-based planar-circuit fundamental-frequency oscillators at the same frequency bands. Index Terms--Microwave oscillators, millimeter wave oscillators, phase noise, Q-factor, transmission line resonators.

A practical and accurate parameter extraction method is presented for the Fourier-based-solution physics-based insulated gate bipolar transistor (IGBT) and power diode models. The goal is to obtain a model accurate enough to allow switching loss prediction under a variety of operating conditions. In the first step of the extraction procedure, only one simple clamped inductive load test is needed for the extraction of the six parameters required for the diode model and of the 12 and 15 parameters required for the nonpunch-through (NPT) and punch-through (PT) IGBT models, respectively. The second part of the extraction procedure is an automated formal optimization step that refines the parameter estimation. Validation with experimental results from various structures of IGBT demonstrates the accuracy of the proposed IGBT and diode models and the robustness of the parameter extraction method. Index Terms--Insulated gate bipolar transistor (IGBT) model, optimized parameter extraction, parameter extraction, power diode model, semiconductor modeling.

This paper presents the effects of [H.sub.2] annealing and polysilicon emitter structures on [H.sub.FE] characteristics of n-p-n bipolar junction transistors. The increase of the number of [H.sub.2] annealing steps results in the device performance ([H.sub.FE] x [V.sub.A]) improvement by 27.8%, due to the formation of H-Si dangling bonds, which allow the decrease of the base current. In addition, the bilayer of undoped polysilicon deposition/ion implantation and in situ doped polysilicon in the ploy emitters greatly improve the level of [H.sub.FE] reliability and 1/f noise characteristic. The experimental results of H-Si dangling bond property at the polysilicon grain boundaries and polysilicon interface with the [H.sub.2] annealing steps in n-p-n bipolar junction transistor formulation will be also presented. Index Terms--Bipolar junction transistor (BJT), [H.sub.2] annealing, HFE, polysilicon emitter, 1/f noise.

In this work, we investigate how externally applied mechanical stress impacts the total dose hardness and enhanced low-dose-rate sensitivity of linear bipolar ICs fabricated with different passivation layers. To determine the effects of externally applied stress and/or radiation exposure on the current gain, various compressive or tensile stresses were applied to lateral PNP bipolar transistors at the wafer level, using a cantilever method. The devices were then exposed to 10-keV X-rays or Cs-137 [gamma]-rays. The effect of externally applied stress on pre and post irradiation gain degradation is found to be relatively minor compared to the effects of changes in passivation layers on the radiation response of devices.

The study stated the role of the interfacial oxide (IF) between the polysilicon and monosilicon emitter regions on the noise behavior of n-p-n poly-emitter bipolar transistors through 1/f noise measurements. The report also stated that while the base current fluctuations dominate at relatively high external base resistance values, other noise sources are dominant when the external series base resistance become comparable to or less than the input resistance of the BJT.

The studies have stated the effect of spacer thickness on the noise performance of a SiGe HBT device. The device noise performance can be improved by reducing the emitter width. The report stated that to achieve the minimum value of NFmin, the spacer thickness should be targeted to an optimal value, and its value is frequency and geometry dependent.

The study investigated the impact of collector-base (CB) junction traps on low-frequency noise in high breakdown voltage (HBV) SiGe HBTs. The result suggested the necessity of modeling the recombination current due to the CB junction traps since they contribute significant amount of I(sub B) when high injection occurs. The conclusions are also verified using SBV and HBVs HBTs from a 90-GHz peak f (sub T) technology.

The study stated that snapbacks in sustain characteristics of lateral double diffused MOSFETs (LDMOSFETs) are caused by positive feedbacks between the turn-on of the bipolar junction transistors (BJTs) and the avalanche breakdown of the drain n-n (super +) diodes [22]. The report stated the experimental value of the conventional no-snapback LDMOSFET [22], and clears the ESD criterion for the automobile application, 15 kV of the 150pF and 150 Omega discharge model.

A new measurement method, which is applied to a state of the art HBT (heterojunction bipolar transistor) technology, is used to determine the isothermal electrical characteristics. The effectiveness of the method is highlighted by comparing the results with a pulsed measurement system.

A new vertical trench SiGe heterojunction bipolar transistor (HBT) is proposed that improves the tradeoff between the cutoff frequency and the off-state collector-base breakdown voltage. This improvement is the result of the increased drift doping concentration, which suppresses the onset of the base-widening effect.

A low-cost concept for a self-aligned SiGe heterojunction bipolar transistor (HBT) is presented. In comparison to a conventional double-poly integration concept, this approach significantly reduces process complexity. The bipolar multitransistor yield shows similar values compared to the conventional double-poly integration concept.

Use of WN(sub x) as the diffusion barrier for interconnect copper metallization of InGaP-GaAs d(HBTs) was studied. The results demonstrated that WN(subX) is a good diffusion barrier for the interconnection copper metallization of GaAs HBTs.

Audio and near-audio frequency oscillations of InGaP heterojunction bipolar transistors (HBT) devices at room temperature are observed. The oscillations are demonstrated through transient circuit simulations using vertical bipolar intercompany models and predicted using a simple small-signal model.

A comprehensive investigation of the SPICE and unified compact noise models is performed by comparison with the more fundamental hierarchical hydrodynamic device model. It is shown that these models yield good results for frequencies up to about 10 GHz for state-of-the-art SiGe HBTs (heterojunction bipolar transistor).

An InGaP-GaAs double heterojunction bipolar transistors (DHBTs) was used to study the temperature dependence of electron impact ionization for InGaP material at elevated temperatures. It was revealed that as the temperature increases, the electron multiplication in the InGaP collector is found to be weakly reduced, which results in relatively small negative temperature dependence of junction breakdown.

A set of analytical expressions is derived for the parameters thermal resistance, critical temperature and critical current, which describe electrothermal bipolar transistor behavior. For determining the safe operating area of a device for extracting the thermal resistance, the use of derived expressions are also demonstrated.

In InP-based heterojunction bipolar transistors (HBTs), the influence of emitter material on silicon-nitride (SiN) passivation-induced degradation is studied. It is found that InAIAs has much higher resistance to NH3-related plasma-induced damage as compared to InP.

The performance analysis and optimum design of the shared-layer integrated PIN-HBT photoreceiver is studied. To choose the optimum designs corresponding to different gains, the performance of different fixed square-emitter structures are investigated.

Telecommunication equipment manufacturers face their biggest challenge in improving phase-noise performance of microwave sources and the design of sapphire resonator oscillators for metrology. The electrical and noise performances of a 0.8 Mu silicone germanium transistor (SiGe) optimized for design of low phase-noise circuits and the design of a low phase-noise C band sapphire resonator oscillator are reported.

Two high voltage pulser designs that offer advantages in some ultrasonic measurement applications that are used for broadband measurements of attenuation or hydrophone frequency response and directivity are presented. The pulsers use integrated gate bipolar transistors (IGBTs) as switching devices and in one design an output voltage pulse that has peak amplitude nearly twice that of supply voltage is produced.

Characteristics of a novel device based on the integration of quantum well IR photodetector (QWIP), a heterostructure bipolar transistor (HBT), and a light-emitting diode (LED) for up-conversion of middle infrared (IR) into near IR radiation is studied. The QWIP-HBT-LED up converter is the most advantageous for megapixel focal plane arrays and high read-out rate cameras.

A scaled-down self-aligned selective-epitaxial-growth (SEG) SiGe HBT is presented that is structurally optimized for an emitter scaled down toward 100 nm. It features a high-speed operation, an emitter-coupled logic (ECL) gate delay of 4.8 ps and a maximum operating frequency of 81 GHz for a static frequency divider.

A characterization of temperature-dependent collector breakdown behavior in InP double heterojunction bipolar transistors (DHBTs) with an InGaAs/InP composite collector is conducted. It is ascertained that the variation of impact ionization coefficient due to the change of temperature may affect the device breakdown.

Low-frequency noise characteristics of NPN and PNP InP-based heterojunction bipolar transistors (HBTs) are investigated. NPN HBTs showed a lower base noise current level, but higher collector noise current level than PNP HBTs.

Results for a heterojunction bipolar transistor (HBT) are compared with those found using a vector network analyzer and a sophisticated extraction algorithm. The method is extended to simultaneously determine thermal resistance, R(sub TH), and to obtain a most precise estimate of emitter resistance.

The electron impact ionization coefficients have been extracted depending on the measurements of electron multiplication factors in npn InGap-GaAs-InGaP double heterojunction bipolar transistors (HBT). This coefficient is consistent and extends to the previously reported data in low electric fields.

The fabrication and characterization of very compact horizontal current bipolar transistor (HCBT) has been discussed in detail. Simulations show that the improvement of and the maximum oscillation frequency up to 24 and 50 GHz respectively, can be achieved by employing finer lithography.

Deep submicron transferred-substrate heterojunction bipolar transistors show peaking and singularities in unilateral power gain at high frequencies. A theoretical model for the dynamics of a capitance cancellation by electron velocity modulation is developed and its correlation with experimental data is examined.

Hawkins' isothermal model developed to study noise in bipolar junction transistors (BJTs) is modified to investigate bias-dependent noise in heterojunction bipolar transistors (HBTs) by incorporating thermal effects. It is shown that the inclusion of thermal effects into the high-frequency noise model of HBTs is necessary as the temeperature of the device may become very different from the ambient temperature, especially at high bias current. Calculation of the noise figure by including the thermal effect shows that the isothermal calculation may underestimate the noise figure at high bias current. It is observed that noise at low bias is ideality factor n dependent whereas high bias noise is insensitive to the variation of n. Moreover, the common base current gain plays a major role in the calculation of the minimum noise figure. The excellent fit obtained between the theoretical calculation and the measured data are attributed to the inclusion of the bias-dependent junction heating as well as [C.sub.De] and [C.sub.bc] into the present calculation. Index Terms--Heterojunction bipolar transistor (HBT), high-frequency noise, thermal effects.

High-frequency distortion in bipolar transistors is examined by using the charge-control approach of Poon and Narayanan to connect the device's distortion behavior to its 'loaded' unity-current-gain frequency ([[omega].sub.T]). The resulting expressions for the distortion reveal considerable information on its frequency and bias dependence. Points on the [[omega].sub.T] versus collector current curve yielding optimum distortion performance are identified and interpreted in terms of current cancellation. Both second-and third-order distortion are considered, and the results are validated by both simulation and experiment. Index Terms--Current cancellation, harmonic distortion, heterojunction and homojunction bipolar transistors, high-frequency distortion, intermodulation distortion, linearity, nonlinear distortion, unity-current-gain frequency, Volterra series.

The measurement of 1/f noise on polysilicon-emitter bipolar n-p-n and p-n-p transistors over a temperature range of 173 K < T < 400 K is described. The 1/f noise begins from the slow interface states directly situated at the Si/SiO2 interface in the space charge region.

A new mixed-mode base current degradation mechanism in bipolar transistors is described. It induces a large I(sub B) leakage current after simultaneous application of both high J(sub C) and high V(sub CB).