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This article presents detailed Markov models for the reliability assessment of multilevel neutral-point-clamped (NPC) converter leg topologies, incorporating their inherent fault-tolerance under open-circuit switch faults. The Markov models are generated and discussed in detail for the three-level and four-level active NPC (ANPC) cases, while the presented methodology can be applied to easily generate the models for a higher number of levels and other topology variants. In addition, this article also proposes an extremely fast calculation method to obtain the precise value of the system's mean time to failure from any given formulated system Markov model. This method is then applied to quantitatively compare the reliability of two-level, three-level, and four-level ANPC legs under switch open-circuit-guaranteed faults and varying degrees of device paralleling. The comparison reveals that multilevel ANPC leg topologies inherently present a potential for higher reliability than the conventional two-level leg, questioning the suitability of the traditional search for topologies with the minimum number of devices in order to improve reliability. Experimental results are presented to validate the fault-tolerance assumptions upon which the presented reliability models for the three-level and four-level ANPC legs are based. This article is accompanied by supplementary MATLAB scripts. [ABSTRACT FROM AUTHOR]

The present paper provides a solution to operate multilevel dual active bridge (ML-DAB) converters built upon neutral point clamped switching legs in a full-bridge disposition and with any number of levels on either side of the converter. The main issue of such converters is addressing the inherent unbalance of the dc-link capacitor voltages, which hinders the proper operation and optimum utilization of the converter. The proposed solution comprises a generalized to N levels modulation and control scheme that allows operating these converters, while guaranteeing the proper balance of the dc-link capacitor voltages. The suitability of the proposed solution is verified through simulation and experimental tests performed in five different converter configurations, three of them with an asymmetric number of voltage levels, proving that capacitor voltage balance is achievable in a wide range of operation conditions. Moreover, the efficiency of the ML-DAB converters is demonstrated to be superior to the conventional two-level DAB case. [ABSTRACT FROM AUTHOR]

This paper studies a multilevel multiphase dc–ac conversion system configured by a neutral-point-clamped converter fed by multiple battery packs connected in series. A virtual-vector modulation is selected and a state-of-charge (SoC) balancing control is designed to be able to employ the full battery bank capacity, even under different battery initial SoC values or different battery nominal capacities. The SoC balancing among battery packs is accomplished through the multilevel converter operation in a lossless manner, by simply distributing the dc-to-ac power flow among the batteries according to their SoC. A simple average system model is also presented, which allows performing very fast system simulations over long periods of time and serves as a convenient tool to tune the compensator parameters. The satisfactory performance of the proposed system configuration and control, which can be applied with any number of levels and phases, has been verified through simulations and experiments in a four-level three-phase dc–ac converter fed by three lithium-ion battery packs. The results prove the feasibility and advantages of the proposed system configuration, which can be used to implement conversion systems with different specifications combining several instances of a standard battery pack and a standard power semiconductor device. [ABSTRACT FROM AUTHOR]

The conventional design of voltage-source power converters is based on a two-level half-bridge configuration and the selection of power devices designed to meet the full application specifications (voltage, current, etc.). This leads to the need to design and optimize a large number of different devices and their ancillary circuitry and prevents taking advantage from scale economies. This paper proposes a paradigm shift in the design of power converters through the use of a novel configurable device consisting on a matrix arrangement of highly optimized switching cells at a single voltage class. Each switching cell consists of a controlled switch with antiparallel diode together with a self-powered gate driver. By properly interconnecting the switching cells, the switching-cell array (SCA) can be configured as a multilevel active-clamped leg with a different number of levels. Thus, the SCA presents adjustable voltage and current ratings, according to the selected configuration. For maximum compactness, the SCA can be conceived to be only configurable by the device manufacturer upon the customer needs. For minimum cost, it can also be conceived to be configurable by the customer, leading to field-configurable SCAs. Experimental results of a 6 × 3 field-configurable SCA are provided to illustrate and validate this design approach. [ABSTRACT FROM AUTHOR]

Several pulsewidth modulation (PWM) strategies have been proposed for three-phase multilevel converters. Typically, these PWM methods can be either space-vector or carrier-based implemented, where the carrier-based implementation usually presents a lower computation complexity. In this paper, a novel approach for the carrier-based implementation of different existing PWM methods is proposed for three- (3L) and four-level (4L) dc–ac converters, which can be easily extended to any number of levels. The main features of the proposed approach are its reduced computation complexity and computation time. On the other hand, the proposed approach suggests the derivation of novel PWM strategies which can potentially present improved performance features. As an example, two new discontinuous PWM (DPWM) strategies are proposed for the 4L converter. One of these DPWM strategies presents lower weighted total harmonic distortion than other previously proposed strategies. Simulation and experimental results verify the effectiveness of the proposed approach and novel DPWM strategies. [ABSTRACT FROM AUTHOR]

This paper studies the coupling between the capacitor voltage control loops of diode-clamped (or functionally equivalent) multilevel multileg (multiphase) dc–ac converters. From a complete model of the plant revealing the coupling, a simple approach consisting in multiplying the vector of control commands by a constant matrix is proposed to decouple the control problem and achieve a better controller performance. Simulation and experimental results are presented to prove the superior performance of the proposed decoupled control. [ABSTRACT FROM PUBLISHER]

Aiming to improve the performance features of conventional two-level dual-active-bridge (DAB) converters, this paper presents a three-level neutral-point-clamped (NPC) DAB dc–dc converter. A general modulation pattern is initially defined, the dc-link capacitor voltage balancing is analyzed in detail, and a proper balancing control is designed. Then, a set of decoupled optimization problems is formulated as a function of the available modulation degrees of freedom to minimize the predominant converter losses. Finally, a simple and practical specific modulation strategy is provided, resembling the optimum solutions. The good performance of the proposed three-level NPC DAB converter operated with the proposed modulation strategy and voltage balancing control is verified through simulation and experiments. The capacitor voltage balancing can be guaranteed for all operating conditions. In addition, it is concluded that the multilevel topology provides benefits compared with the conventional two-level DAB converter. [ABSTRACT FROM PUBLISHER]

This paper presents a capacitor voltage balancing control applicable to any multilevel dc–ac converter formed by a single set of series-connected capacitors implementing the dc link and semiconductor devices, such as the diode-clamped topology. The control is defined for any number of dc-link voltage levels and converter legs (for single-phase and multiphase systems), guaranteeing the capacitor voltage control for any modulation index value and load (from idle mode to full power). The associated control loop small-signal transfer function is presented, from which optimum compensator design guidelines are derived. The improvement in control performance is verified through simulation and experiments comparing with a previous balancing control strategy in a four-level three-phase dc–ac conversion system. The satisfactory control performance is also verified through simulation in a four-level five-phase dc–ac conversion system. [ABSTRACT FROM PUBLISHER]

Thanks to the inherent redundancy to generate the different output voltage levels, the multilevel active-clamped (MAC) topology presents an important fault-tolerance ability which makes it interesting for several applications. This paper presents an analysis of the fault-tolerance capacity of the MAC converter. Both open-circuit and short-circuit faults are considered, and the analysis is carried out under single-device and two simultaneous device faults. Switching strategies and different hardware modifications to overcome the limitations caused by faults are proposed. Experimental tests with a four-level MAC prototype are presented to validate the analysis. [ABSTRACT FROM PUBLISHER]

This paper presents a novel pulsewidth modulation (PWM) strategy for n-level three-leg semiconductor-clamped dc–ac converters in the overmodulation region, with dc-link capacitor voltage balance in every switching cycle. The strategy is based on the virtual-vector concept. Suitable reference vector trajectories are selected to obtain low weighted total harmonic distortion and a simple algorithm. A hexagonal-boundary compression factor is introduced to guarantee, at any operating point, dc-link capacitor voltage regulation capabilities in every switching cycle and avoid narrow gate pulses. The detailed PWM algorithm for an easy implementation in a digital control platform is also presented. The good performance of the strategy is verified through both simulation and experiments in a three-level three-phase neutral-point clamped converter. [ABSTRACT FROM PUBLISHER]

This paper presents a novel multilevel active-clamped converter topology, which is an extension to m levels of the three-level active neutral-point-clamped topology. The operating principle is established through the definition of a proper set of switching states and a transition strategy between adjacent switching states. The benefits of the proposed converter topology and control in comparison to alternative multilevel converter topologies are discussed. The simulation and experimental results of a simple four-level dc–dc converter configuration are presented to illustrate the converter performance features. The experimental results of a four-level three-phase dc–ac converter are also presented to further validate the proposed topology and operating principle. [ABSTRACT FROM AUTHOR]

A novel noninverting boost–buck dc–dc converter topology is presented, applicable when both sides of the converter need to have the same grounding. It is based on the back-to-back connection of two n-level active-clamped or diode-clamped converter legs, and allows bidirectional power flow. A simplified topology is proposed for unidirectional power flow applications. Two new pulse width modulation strategies with different advantages are proposed to operate the converter guaranteeing dc-link capacitor voltage balance in every switching cycle for all possible operating conditions and using small capacitance values. The semiconductor device losses are compared through analysis, simulation, and experiments to the losses in a conventional two-level boost–buck converter. The analysis yields a higher efficiency for the multilevel converter, especially as the number of levels increases. Experimental results are presented to validate the good converter performance in four- and five-level converter prototypes. [ABSTRACT FROM AUTHOR]

This paper presents the definition of the virtual vectors for the general case of an n-level two-leg diode-clamped converter, suggests guidelines for designing virtual-vector pulsewidth modulation (PWM) strategies, and provides the mathematical expressions of the leg duty-ratio waveforms corresponding to this family of PWMs. Modulations defined upon these vectors guarantee the dc-link capacitor voltage balance in every switching cycle under any type of load and enable the use of these topologies with passive front ends. The performance of these multilevel converters operated with the proposed PWMs is compared to the performance of alternative designs through analysis, simulation, and experiments. [ABSTRACT FROM AUTHOR]

Low-voltage ride-through (LVRT) requirements demand wind-power plants to remain connected to the network in presence of grid-voltage dips. Most dips present positive-, negative-, and zero-sequence components. Hence, regulators based on symmetrical components are well suited to control gridconnected converters. A neutral-point-clamped topology has been considered as an active front end of a distributed power-generation system, following the trend of increasing power and voltage levels in wind-power systems. Three different current controllers based on symmetrical components and linear quadratic regulator have been considered. The performance of each controller is evaluated on LVRT requirement fulfillment, grid-current balancing, maximum grid-current value control, and oscillating power flow. Simulation and experimental results show that all three controllers meet LVRT requirements, although different system performance is found for each control approach. Therefore, controller selection depends on the system constraints and the type of preferred performance features. [ABSTRACT FROM AUTHOR]

Abstract-In the previous literature, the introduction of the virtual-space-vector (VV) concept for the three-level, three-leg neutral-point-clamped converter has led to the definition of pulsewidth modulation (PWM) strategies, guaranteeing a dc-link capacitor voltage balance in every switching cycle under any type of load, with the only requirement being that the addition of the three phase currents equals zero. This paper presents the definition of the VVs for the general case of an n-level converter, suggests guidelines for designing VV PWM strategies, and provides the expressions of the leg duty-ratio waveforms corresponding to this family of PWMs for an easy implementation. Modulations defined upon these vectors enable the use of diode-clamped topologies with passive front-ends. The performance of these converters operated with the proposed PWMs is compared to the performance of alternative designs through analysis, simulation, and experiments. [ABSTRACT FROM AUTHOR]

In photovoltaic (PV) power systems where a set of series-connected PV arrays (PVAs) is connected to a conventional two-level inverter, the occurrence of partial shades and/or the mismatching of PVAs leads to a reduction of the power generated from its potential maximum. To overcome these problems, the connection of the PVAs to a multilevel diode-clamped converter is considered in this paper. A control and pulsewidth-modulation scheme is proposed, capable of independently controlling the op- erating voltage of each PVA. Compared to a conventional two-level inverter system, the proposed system configuration allows one to extract maximum power, to reduce the devices voltage rating (with the subsequent benefits in device-performance characteristics), to reduce the output-voltage distortion, and to increase the system efficiency. Simulation and experimental tests have been conducted with three PVAs connected to a four-level three-phase diode-clamped converter to verify the good performance of the proposed system configuration and control strategy. [ABSTRACT FROM AUTHOR]

Several pulsewidth modulation (PWM) strategies have been proposed for the three-level three-phase diode-clamped dc-ac converter. Among them, the nearest-three virtual-space-vector PWM guarantees the dc-link capacitor voltage balance under any operating condition, provided that the addition of the three phase currents equals zero. This paper extends this modulation concept to the four level converter. The new virtual vectors are presented and a simple modulation solution is defined. Conventional nearest-three space vector PWM cannot comprehensively achieve balanced and stable dc-link voltages. The proposed modulation solution enables the practical use of the four-level converter since it guarantees the dc-link capacitor voltage balance for any operating condition and load, provided that the addition of the three phase currents equals zero. Simulation and experimental results prove the goodness of the presented approach. [ABSTRACT FROM AUTHOR]

In the previous literature, it has been reported that it is not possible to guarantee the balance of the dc-link capacitor voltages of multilevel three-phase diode-clamped dc-ac converters with passive front-ends for high modulation indices, especially for more than three levels. This paper proposes a novel closed-loop control approach capable of guaranteeing such balance for all ope]rating conditions of the converters without the need for additional hardware. Three different phase duty-ratio perturbation schemes are proposed. They are compared through simulation for the case of a four-level three-phase diode-clamped dc-ac converter operated with a virtual-vector-based modulation. The most simple and effective perturbation scheme, only requiring the sensing of all dc-link capacitor voltages, is tested experimentally in the same four-level converter. The results demonstrate the feasibility of guaranteeing the dc-link capacitor voltage balance for all converter operating conditions. [ABSTRACT FROM AUTHOR]

This paper presents a closed-loop control scheme for the three-level three-phase neutral-point-clamped dc-ac converter using the optimized nearest three virtual-space-vector pulsewidth modulation, which is a modulation that produces low output-voltage distortion with a significant reduction of the dc-link capacitance. A new specific loop modifying the modulating waveforms is proposed to rapidly control possible perturbations in the neutral-point voltage balance. An online estimation of the load displacement angle and load linear/nonlinear nature is introduced at no extra cost. The remaining part of the control is analogous to the control for a two-level converter with an appropriate interfacing to the selected modulation. The closed-loop control is designed for the case of a renewable-energy source connected to the ac mains, and its performance is analyzed through simulation and experiments. [ABSTRACT FROM AUTHOR]

This paper presents a novel approach for the connection of renewable energy sources to the utility grid. Due to the increasing power capability of the available generation systems, a three-level three-phase neutral-point-clamped voltage-source inverter is selected as the heart of the interfacing system. A multivariable control law is used for the regulator because of the intrinsic multivariable structure of the system. A current source (playing the role of a generic renewable energy source) is connected to the grid using a three-level inverter in order to verify the good performance of the proposed approach. Large- and small-signal d-q state-space averaged models of the system are obtained and used to calculate the multivariable controller based on the linear quadratic regulator technique. This controller simultaneously regulates the dc-link voltage (to operate at the maximum power point of the renewable energy source), the mains power factor (the power is delivered to the grid at unity power factor), and the dc-link neutral-point voltage balance. With the model and regulator presented, a specific switching strategy to control the dc-link neutral-point voltage is not required. The proposed controller can be used for any application, since its nature makes possible the control of any system variable. The good performance of the presented interfacing solution in both steady-state and transient operation is verified through simulation and experimentation using a 1-kW neutral-point-clamped voltage-source-inverter prototype, where a PC-embedded digital signal processor board is used for the controller implementation. [ABSTRACT FROM AUTHOR]

This paper presents an approach to continuous variable design optimization of a power electronics converter. The objective of the optimization approach is to minimize the total component cost. The methodology is illustrated with the design of a boost power factor correction front-end converter with an input electro- magnetic interference filter. The system design variables are first identified. The relevant system responses and component costs are then expressed as a function of these design variables. Finally, by using mathematical optimization techniques, the design variable values that minimize the total system component cost are obtained, given practical constraints on these design variables and system responses. [ABSTRACT FROM AUTHOR]

Voltage total harmonic distortion and quadratic voltage ripple criteria are accepted figures of merit of a multilevel pulse width modulation (PWM) converter voltage quality. The dominating frequency domain approach does not deliver simple closed-form expressions and practically requires accounting up to 40–50 switching harmonics. Assuming infinitely high switching frequency, suggested time domain approach to a multilevel multiphase PWM voltage quality evaluation provides closed-form piece-wise analytical solutions. These simple formulas clearly reveal the dependence on modulation index for arbitrary voltage level and odd phase numbers. The results are applicable to any type of multilevel converters (including interleaved, open winding and other) operated with nearest level/nearest space vector modulation and relatively high switching frequency. [ABSTRACT FROM PUBLISHER]

A neutral-point-clamped three-level inverter with small dc-link capacitors is presented in this paper. The inverter requires zero average neutral-point current for stable neutral-point voltage. The small dc-link capacitors may not maintain capacitor voltage balance, even with zero neutral-point current. This may happen due to nonlinearities present in the circuit. This requires a fast control of the neutral-point voltage. A simple carrier-based modulation strategy which allows modeling of the neutral-point voltage dynamics as a continuous function of power drawn from the inverter is proposed. This continuous model shows that the neutral-point current is proportional to the power drawn from the inverter, and it enables the use of a well-established classical control theory for the neutral-point voltage controller design. A simple proportional integral controller is designed for the neutral-point voltage control on the basis of the continuous model. The design method for optimum performance is discussed. The implementation of the proposed modulation strategy and the controller is very simple. The controller is implemented in a 7.5-kW induction machine-based drive with only 14 \mu \F dc-link capacitors. Also, the experimental results show that fast and stable performance of the neutral-point voltage controller are achieved and thus verify the validity of the proposed control approach. [ABSTRACT FROM PUBLISHER]

The increasing installed wind power capacity has caused wind power generation to become a significant percentage of the entire electric power generation. As a consequence, the power system operators have included wind power plants regulation to improve the control of the overall power system, both in steady-state and transient operation. Therefore, wind power systems are required to verify the grid connection requirements stated by the power system operators. In presence of grid voltage dips, the low voltage ride-through (LVRT) requirement compliance produces a mismatch between the generated active power and the active power delivered to the grid. The conventional solution assumes that the active power surplus is dissipated in a dc-link resistor. In this paper, a control scheme for the back-to-back neutral-point-clamped converter is proposed. Under grid voltage dip, the controllers for generator-side and grid-side converters work concurrently to meet the LVRT requirement by storing the active power surplus in the turbine-generator mechanical system inertia while keeping constant the dc-link voltage. Simulation and experimental results verify the proposed control scheme. [ABSTRACT FROM PUBLISHER]

This paper proposes a closed-loop control implementation fully-embedded into an FPGA for a permanent-magnet synchronous motor (PMSM) drive based on a four-level active-clamped converter. The proposed FPGA controller comprises a field-oriented control to drive the PMSM, a DC-link voltage balancing closed-loop control (VBC), and a virtual-vector-based modulator for a four-level active-clamped converter. The VBC and the modulator operate in consonance to preserve the DC-link capacitor voltages balanced. The FPGA design methodology is carefully described and the main aspects to achieve an optimal FPGA implementation using low resources are discussed. Experimental results under different operating conditions are presented to demonstrate the good performance and the feasibility of the proposed controller for motor-drive applications. [ABSTRACT FROM AUTHOR]