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High-field-effect-mobility InSnZnO thin-film transistors (TFTs) are prepared through Al-induced microstructure regularization (AIMR) at an annealing temperature lower to 400 °C. Spherical crystalline particles are distributed throughout the back channel near the Al layer, while an amorphous phase still represents the front channel but with enhanced microstructure ordering. Especially, the packing density is distinctly increased, and oxygen vacancies are largely reduced. The optimized TFT exhibits excellent performance with a steep sub-threshold swing of 0.18 V/dec, a high on/off current ratio of 2.5 × 108, a threshold voltage of −0.21 V, and a small threshold voltage shift of −0.24 V under negative bias stress (−20 V, 3600 s), especially a remarkable field-effect mobility boosted to 53.2 cm2/V s compared to 19.1 cm2/V s for the TFT without the Al layer. After Al removal, the TFT performance shows no obvious degradation, implying good compatibility of the AIMR technique to the current device process.

The reliability of liquid crystal display (LCD) panels based on amorphous indium-gallium-zinc oxide thin-film transistors (a-IGZO TFTs) is investigated. It is revealed that the a-IGZO TFT LCDs also have sand mura issue at high operation temperature. Analysis shows that the sand mura is caused by the positive Vth shift of the a-IGZO TFTs. To suppress the Vth shift, fabrication process of the a-IGZO TFTs is optimized with a-IGZO channel layer annealed at 300 °C and etch-stop layer deposited at 250 °C. The process optimization lessens the absorbed and non-bonded oxygen atoms in the a-IGZO channel layer and desorbed water molecules on the back channel surface. The results show that the Vth shift is significantly alleviated and the sand mura is thus effectively minimized with the optimized process.

Back-channel-etch-structured thin-film transistors (TFTs) employing amorphous Indium-Gallium-Zinc-Tin-Oxide (IGZTO) and Mo/Al as active layer and source/drain, respectively, were demonstrated with good electronic property and bias-temperature-stress stability. LCD panels addressed by such TFTs with gate-driver-on-array circuit passed the 1000- hour high-temperature-operating and high-temperature/humidity-operating reliability tests, revealing excellent prospect for mass-production.

The gate bias stress-induced threshold voltage shift effect of amorphous indium gallium zinc oxide thin-film transistors (a-IGZO TFTs) with Cu gate is investigated in this brief. It is revealed that the Cu-gated TFTs with SiOx gate insulator suffer from serious electrical performance degradation under gate bias stress owing to Cu diffusion into the gate insulator and channel region. A stacked gate insulator of SiOx/SiNx is then proposed to suppress the Cu diffusion. Experimental results show that the Cu-gated TFTs with the stacked gate insulators have a comparable threshold voltage shift effect with that of the conventional TFTs with Mo electrode and SiOx insulator, under both positive and negative gate bias stresses.

We have developed 10-inch 300PPI and 65-inch ultra high-definition FFS LCD using amorphous In-Ga-Zn-O(IGZO) TFT. After improvement of TFT's process and structure, the TFT performance is good enough for TFT-LCD. In this report, we discuss our IGZO TFT process, uniformity and reliability.