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8 results on '"Cicalini M"'

1. A Preliminary Characterization of a Water Contaminant Detection System Based on a Multi-sensor Microsystem

Author

Bourelly, C., Gerevini, L., Cicalini, M., Manfredini, G., Angrisani, Leopoldo, Series Editor, Arteaga, Marco, Series Editor, Panigrahi, Bijaya Ketan, Series Editor, Chakraborty, Samarjit, Series Editor, Chen, Jiming, Series Editor, Chen, Shanben, Series Editor, Chen, Tan Kay, Series Editor, Dillmann, Rüdiger, Series Editor, Duan, Haibin, Series Editor, Ferrari, Gianluigi, Series Editor, Ferre, Manuel, Series Editor, Hirche, Sandra, Series Editor, Jabbari, Faryar, Series Editor, Jia, Limin, Series Editor, Kacprzyk, Janusz, Series Editor, Khamis, Alaa, Series Editor, Kroeger, Torsten, Series Editor, Liang, Qilian, Series Editor, Martín, Ferran, Series Editor, Ming, Tan Cher, Series Editor, Minker, Wolfgang, Series Editor, Misra, Pradeep, Series Editor, Möller, Sebastian, Series Editor, Mukhopadhyay, Subhas, Series Editor, Ning, Cun-Zheng, Series Editor, Nishida, Toyoaki, Series Editor, Pascucci, Federica, Series Editor, Qin, Yong, Series Editor, Seng, Gan Woon, Series Editor, Speidel, Joachim, Series Editor, Veiga, Germano, Series Editor, Wu, Haitao, Series Editor, Zhang, Junjie James, Series Editor, Di Francia, Girolamo, editor, and Di Natale, Corrado, editor

Published
2021
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5. A False Positive Reduction System For Continuous Water Quality Monitoring

Author

Bria, A., primary, Ferrigno, L., additional, Gerevini, L., additional, Marrocco, C., additional, Molinara, M., additional, Bruschi, P., additional, Cicalini, M., additional, Manfredini, G., additional, Ria, A., additional, Cerro, G., additional, Simmarano, R., additional, Teolis, G., additional, and Vitelli, M., additional

Published
2021
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7. Dual-Band Ge-on-Si Photodetector Array With Custom, Integrated Readout Electronics

Author

Andrea De Iacovo, Federica Mitri, Andrea Ballabio, Jacopo Frigerio, Giovanni Isella, Andrea Ria, Mattia Cicalini, Paolo Bruschi, Lorenzo Colace, De Iacovo, A., Mitri, F., Ballabio, A., Frigerio, J., Isella, G., Ria, A., Cicalini, M., Bruschi, P., and Colace, L.

Subjects
Silicon, Germanium, SiGe, Voltage measurement, dual-band photodetector, Ge-on-Si, Dual-band imaging, ROIC, Photodiode, Dark current, Dual band, Dual-band photodetector, Readout electronic, Electrical and Electronic Engineering, Instrumentation
Abstract

Photodetectors based on a Ge-on-Si platform were widely studied over the last two decades, rapidly becoming the technology of choice for CMOS-integrated optoelectronic systems operating in the near infrared. Recently, we demonstrated a proof-of-concept device realized with a back-to-back, Ge-on-Si double photodiode with dual-band optical sensitivity and voltage-tunablity characteristics. Such a device represents the cornerstone for the development of integrated imaging systems operating both in the visible and in the near infrared spectral ranges. To achieve this ambitious goal, however, several technology improvements are needed starting from the fabrication of a multipixel array of dual-band photodetectors. Moreover, given the peculiar electronic behavior of the proposed device, specific readout electronics must be developed and integrated onto a CMOS platform. In this paper we demonstrate the operation of a Ge-on-Si multipixel array with a custom-developed readout integrated chip. We show a complete system characterization, also demonstrating its imaging capabilities with a simple experiment for the determination of the intensity profile of two different laser beams.

Published
2022

8. Design of a Capacitance-to-Digital Converter Based on Iterative Delay-Chain Discharge in 180 nm CMOS Technology.

Author

Cicalini M, Piotto M, Bruschi P, and Dei M

Subjects
Electric Capacitance, Silicon, Technology, Equipment Design
Abstract

The design of advanced miniaturized ultra-low power interfaces for sensors is extremely important for energy-constrained monitoring applications, such as wearable, ingestible and implantable devices used in the health and medical field. Capacitive sensors, together with their correspondent digital-output readout interfaces, make no exception. Here, we analyse and design a capacitance-to-digital converter, based on the recently introduced iterative delay-chain discharge architecture, showing the circuit inner operating principles and the correspondent design trade-offs. A complete design case, implemented in a commercial 180 nm CMOS process, operating at 0.9 V supply for a 0-250 pF input capacitance range, is presented. The circuit, tested by means of detailed electrical simulations, shows ultra-low energy consumption (≤1.884 nJ/conversion), excellent linearity (linearity error 15.26 ppm), good robustness against process and temperature corners (conversion gain sensitivity to process corners variation of 114.0 ppm and maximum temperature sensitivity of 81.9 ppm/°C in the -40 °C, +125 °C interval) and medium-low resolution of 10.3 effective number of bits, while using only 0.0192 mm2 of silicon area and employing 2.93 ms for a single conversion.

Published
2021
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