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Recent quantum algorithms pertaining to electronic structure theory primarily focus on the threshold-based dynamic construction of ansatz by selectively including important many-body operators. These methods can be made systematically more accurate by tuning the threshold to include a greater number of operators into the ansatz. However, such improvements come at the cost of rapid proliferation of the circuit depth, especially for highly correlated molecular systems. In this work, we address this issue by the development of a novel theoretical framework that relies on the segregation of an ansatz into a dynamically selected core "principal" component, which is, by construction, adiabatically decoupled from the remaining operators. This enables us to perform computations involving the principal component using extremely shallow-depth circuits, whereas the effect of the remaining "auxiliary" component is folded into the energy function via a cost-efficient non-iterative correction, ensuring the requisite accuracy. We propose a formalism that analytically predicts the auxiliary parameters from the principal ones, followed by a suite of non-iterative auxiliary subspace correction techniques with different levels of sophistication. The auxiliary subspace corrections incur no additional quantum resources yet complement an inadequately expressive core of the ansatz to recover a significant amount of electronic correlations. We have numerically validated the resource efficiency and accuracy of our formalism with a number of strongly correlated molecular systems. [ABSTRACT FROM AUTHOR]

Interactive oracle proofs (IOPs) are a hybrid between interactive proofs and PCPs. In an IOP, the prover is allowed to interact with a verifier (like in an interactive proof) by sending relatively long messages to the verifier, who in turn is only allowed to query a few of the bits that were sent (like in a PCP). Efficient IOPs are currently at the core of leading practical implementations of highly efficient proof-systems. In this work we construct, for a large class of NP relations, IOPs in which the communication complexity approaches the witness length. More precisely, for any NP relation for which membership can be decided in polynomial-time with bounded polynomial space (i.e., space nξ for some sufficiently small constant ξ > 0; e.g., SAT, Hamiltonicity, Clique, Vertex-Cover) and for any constant γ > 0, we construct an IOP with communication complexity (1 + γ) ⋅ n, where n is the original witness length. The number of rounds, as well as the number of queries made by the IOP verifier, are constant. This result improves over prior works on short IOPs/PCPs in two ways. First, the communication complexity in these short IOPs is proportional to the complexity of verifying the NP witness, which can be polynomially larger than the witness size. Second, even ignoring the difference between witness length and non-deterministic verification time, prior works incur (at the very least) a large constant multiplicative overhead to the communication complexity. In particular, as a special case, we also obtain an IOP for CircuitSAT with communication complexity (1 + γ) ⋅ t, for circuits of size t and any constant γ > 0. This improves upon the prior state-of-the-art work of Ben Sasson et al. (ICALP, 2017) who construct an IOP for CircuitSAT with communication length c ⋅ t for a large (unspecified) constant c ≥ 1. Our proof leverages the local testability and (relaxed) local correctability of high-rate tensor codes, as well as their support of a sumcheck-like procedure. In particular, we bypass the barrier imposed by the low rate of multiplication codes (e.g., Reed–Solomon, Reed–Muller, or AG codes)—a key building block of all known short PCP/IOP constructions. [ABSTRACT FROM AUTHOR]

Recent advances in quantum information and quantum science have inspired the development of various compact, dynamically structured ansätze that are expected to be realizable in Noisy Intermediate-Scale Quantum (NISQ) devices. However, such ansätze construction strategies hitherto developed involve considerable measurements, and thus, they deviate significantly in the NISQ platform from their ideal structures. Therefore, it is imperative that the usage of quantum resources be minimized while retaining the expressivity and dynamical structure of the ansatz that can adapt itself depending on the degree of correlation. We propose a novel ansatz construction strategy based on the ab initio many-body perturbation theory that requires no pre-circuit measurement and, thus, remains structurally unaffected by any hardware noise. The accuracy and quantum complexity associated with the ansatz are solely dictated by a pre-defined perturbative order, as desired, and, hence, are tunable. Furthermore, the underlying perturbative structure of the ansatz construction pipeline enables us to decompose any high-rank excitation that appears in higher perturbative orders into the product of various low-rank operators, and it thus keeps the execution gate-depth to its minimum. With a number of challenging applications on strongly correlated systems, we demonstrate that our ansatz performs significantly better, both in terms of accuracy, parameter count, and circuit depth, in comparison to the allied unitary coupled cluster based ansätze. [ABSTRACT FROM AUTHOR]

Low-noise fluxgate magnetometers are normally comprised of three separate devices: a power supply, the sensor head/electronics and an analog-to-digital converter (ADC). This paper presents a parallel rod fluxgate magnetometer in a single printed circuit board of size = 5 × 12 cm, weight = 45 g, and sensor head average power dissipation = 40 mW. The open-loop noise spectral density = 5 p T r m s / Hz @ 1 Hz , competitive with state-of-the-art devices. This is realized using a new amorphous wire core material and programmable mixed-signal electronics with low amplifier and ADC noise. We have compared the sensor performance to a low-noise observatory magnetometer and found sub-nT correlation when tracking the Y (East-West) component of the Earth's geomagnetic field. [ABSTRACT FROM AUTHOR]

The celebrated minimax principle of Yao says that for any Boolean-valued function f with finite domain, there is a distribution µ over the domain of f such that computing f to error against inputs from µ is just as hard as computing f to error on worst-case inputs. Notably, however, the distribution µ depends on the target error level1: the hard distribution which is tight for bounded error might be trivial to solve to small bias, and the hard distribution which is tight for a small bias level might be far from tight for bounded error levels. In this work, we introduce a new type of minimax theorem which can provide a hard distribution µ that works for all bias levels at once. We show that this works for randomized query complexity, randomized communication complexity, some randomized circuit models, quantum query and communication complexities, approximate polynomial degree, and approximate logrank. We also prove an improved version of Impagliazzo's hardcore lemma. Our proofs rely on two innovations over the classical approach of using Von Neumann's minimax theorem or linear programming duality. First, we use Sion's minimax theorem to prove a minimax theorem for ratios of bilinear functions representing the cost and score of algorithms. Second, we introduce a new way to analyze low-bias randomized algorithms by viewing them as "forecasting algorithms" evaluated by a certain proper scoring rule. The expected score of the forecasting version of a randomized algorithm appears to be a more fine-grained way of analyzing the bias of the algorithm. We show that such expected scores have many elegant mathematical properties--for example, they can be amplified linearly instead of quadratically. We anticipate forecasting algorithms will find use in future work in which a fine-grained analysis of small-bias algorithms is required. [ABSTRACT FROM AUTHOR]

This paper presents a cost-effective dual-band active antenna solution with low-power requirements, specifically designed for navigation applications utilizing the Indian Constellations (NavIC) and GPS signals. The antenna features a compact single-layer patch with capacitors, designed to operate at the L1 and L5 bands. In this design, the TM10 and TM30 modes are effectively utilized to achieve a dual-band broadside radiation pattern. The locations of the slots, their dimensions, and capacitors are optimized to lower the TM30 mode frequency band along with achieving right-hand circularly polarized (RHCP). The microstrip-printed hybrid resonator diplexer, the RF choke-based bias tee, and the two-stage LNA along with a matching circuit are designed separately and then integrated into a compact 45 mm × 45 mm (0.17λ × 0.17λ) active circuit board size. The routing of DC biasing and RF lines is optimized to minimize cross-talk and ensure that the active circuit remains free from spurious signal generation while enhancing the overall performance in terms of gain and noise figure. The proposed two-stage active circuit exhibits a gain of 44 dB and 42 dB, with corresponding noise figures of 1.67 dB and 1.1 dB at the L1 and L5 band frequencies, respectively. It operates with a power consumption of 85 mW at a supply voltage of 5 V. The integrated active antenna is developed on an FR4 substrate and evaluated with an in-house developed GNSS receiver, demonstrating a measured carrier-to-noise ratio (C/No) exceeding 40 dB-Hz across both frequency bands. [ABSTRACT FROM AUTHOR]

We connect learning algorithms and algorithms automating proof search in propositional proof systems: for every sufficiently strong, well-behaved propositional proof system P, we prove that the following statements are equivalent, (1) Provable learning. P proves efficiently that p-size circuits are learnable by subexponential-size circuits over the uniform distribution with membership queries. (2) Provable automatability. P proves efficiently that P is automatable by non-uniform circuits on propositional formulas expressing p-size circuit lower bounds.Here, P is sufficiently strong and well-behaved if I.–III. hold: I. P p-simulates Jeřábek’s system WF (which strengthens the Extended Frege system EF by a surjective weak pigeonhole principle); II. P satisfies some basic properties of standard proof systems which p-simulate WF; III. P proves efficiently for some Boolean function h that h is hard on average for circuits of subexponential size. For example, if III. holds for P = WF, then Items 1 and 2 are equivalent for P = WF. We use the following modified notion of automatability in Item 2, the automating circuits output a P-proof of a given formula (expressing a p-size circuit lower bound for a function f) in non-uniform p-time in the length of a shortest P-proof of a closely related but different formula (expressing an average-case subexponential-size circuit lower bound for the same function f).If there is a function h ∈NE ∩coNE which is hard on average for circuits of size 2n/4, for each sufficiently big n, then there is an explicit propositional proof system P satisfying properties I.-III., i.e. the equivalence of Items 1 and 2 holds for P. [ABSTRACT FROM AUTHOR]

Recent years have witnessed a tremendous popularity growth of optimization methods in high-frequency electronics, including microwave design. With the increasing complexity of passive microwave components, meticulous tuning of their geometry parameters has become imperative to fulfill demands imposed by the diverse application areas. More and more often, achieving the best possible performance requires global optimization. Unfortunately, global search is an intricate undertaking. To begin with, reliable assessment of microwave components involves electromagnetic (EM) analysis entailing significant CPU expenses. On the other hand, the most widely used nature-inspired algorithms require large numbers of system simulations to yield a satisfactory design. The associated costs are impractically high if not prohibitive. The use of available mitigation methods, primarily surrogate-based approaches, is impeded by dimensionality-related problems and the complexity in microwave circuit characteristics. This research introduces a procedure for expedited globalized parameter adjustment of microwave passives. The search process is embedded in a surrogate-assisted machine learning framework that operates in a dimensionality-restricted domain, spanned by the parameter space directions being of importance in terms of their effects on the circuit characteristic variability. These directions are established using a fast global sensitivity analysis procedure developed for this purpose. Domain confinement reduces the cost of surrogate model establishment and improves its predictive power. The global optimization phase is complemented by local tuning. Verification experiments demonstrate the remarkable efficacy of the presented approach and its advantages over the benchmark methods that include machine learning in full-dimensionality space and population-based metaheuristics. [ABSTRACT FROM AUTHOR]

Field effect transistors based on 2D layered material have gained significant potential in emerging technologies, such as neuromorphic computing and ultrafast memory response for artificial intelligence applications. This study proposes a facile approach to fabricate an optoelectronic artificial synapse for neuromorphic computing and light‐decoding information system by utilizing the 2D heterostructure of CrSBr/PtS2 to overcome circuit complexity. The CrSBr layer serves as a trapping layer, while PtS2, mounted on top of CrSBr, acts as a channel layer. PtS2 exhibits n‐type semiconductor behavior with a hysteresis that varies with the thickness of the underlying CrSBr layer. The heterostructure device, featuring a 96.3 nm thick CrSBr layer, exhibited a large memory window of 11.9 V when the gate voltage is swept from −10 V to +10 V. Various synaptic behaviors are effectively demonstrated, including paired‐pulse facilitation, excitatory postsynaptic current, optical spike number and intensity‐dependent plasticity using laser light at a wavelength of 365 nm. The device achieves 26 distinct output signals depending on the intensity of the incident laser light, ranging from 10 to 385 mW cm−2, enabling its applications for light‐decoded information security systems. Thus, the investigation presents a unique approach to artificial intelligence and cybersecurity systems. [ABSTRACT FROM AUTHOR]

Since the advanced Integrated Circuit (IC) manufacturing process has reached the 14 nm technology node and beyond, the pattern size of integrated circuits has become much smaller than the theoretical minimum resolution of lithography. In order to further extend the performance of immersion lithography, the industry introduces Multiple Patterning Technology (MPT) and Negative Tone Development (NTD) lithography technology. MPT and NTD lithography have greatly improved the process window of immersion lithography, enabling ArF immersion lithography to extend to 7 nm or even 5 nm technology nodes and below. However, MPT still has limited ability to improve the process window for some special patterns. For example，for the poly gate process in Front End of Line (FEOL) or the metal routing process in Back End of Line (BEOL), IC design often uses a special kind of patterns, such as the bi-line or tri-line structures. Due to the fact that some type of the bi-line/tri-line structures have a semi-dense pattern on each side, the process window of these patterns are relatively narrow, making them difficult to manufacture. This paper focuses on the patterning technology scheme of bi-line/tri-line structures in IC design under the diffraction limit of 193 nm immersion lithography. This paper explores the solution for bi-line/tri-line patterns through mask split strategy and NTD lithography process simulation with a physical model, including illumination conditions, Optical Proximity Correction (OPC) methods, and photoresist process parameter design. This study provides a reference scheme for subsequent NTD process development and patterning technology, as well as a reference idea for IC design methods. [ABSTRACT FROM AUTHOR]

An improved dual‐source SC‐MLI topology is developed in this article for medium‐voltage and high‐power applications. This topology can perform symmetrically and asymmetrically to generate 9 levels and 13 levels, respectively. It consists of 10 unidirectional switches, a dual DC source, and two capacitors to provide high‐gain output voltage with lower TSV. Since the capacitor's voltages are self‐balanced, therefore no need for an auxiliary circuit or sensors, which brings down the complexity of the circuit. To check the viability of the proposed topology, a simple and fundamental control strategy based on nearest‐level pulse width modulation is opted for. From the comparative analysis, it was observed that the proposed topology outperformed similar topologies in terms of switch counts, cost factor, power quality, and total standing voltage. The proposed topology's feasibility is evaluated using MATLAB/Simulink under both static and dynamic loads. Furthermore, a thermal analysis is conducted in PLECS software to calculate the losses across the components and consecutively the efficiency of the proposed circuit. It has been found that the proposed topology can generate 9 levels and 13 levels while having an efficiency of over 96% in symmetric and asymmetric configurations, respectively. Finally, the simulation results are verified by using the experimental prototype to validate the performance of the improved circuit under different loading conditions. [ABSTRACT FROM AUTHOR]

Practical quantum networks will require multi-qubit quantum nodes. This in turn will increase the complexity of the photonic circuits needed to control each qubit and require strategies to multiplex memories. Integrated photonics operating at visible to near-infrared (VNIR) wavelength range can provide solutions to these needs. In this work, we realize a VNIR thin-film lithium niobate (TFLN) integrated photonics platform with the key components to meet these requirements, including low-loss couplers (<1 dB/facet), switches (>20 dB extinction), and high-bandwidth electro-optic modulators (>50 GHz). With these devices, we demonstrate high-efficiency and CW-compatible frequency shifting (>50% efficiency at 15 GHz), as well as simultaneous laser amplitude and frequency control. Finally, we highlight an architecture for multiplexing quantum memories and outline how this platform can enable a 2-order of magnitude improvement in entanglement rates over single memory nodes. Our results demonstrate that TFLN can meet the necessary performance and scalability benchmarks to enable large-scale quantum nodes. This work demonstrates the necessary building blocks to realize large-scale multiplexed quantum networking nodes in a visible thin-film lithium niobate integrated photonics platform. [ABSTRACT FROM AUTHOR]

IntroductionImproving field ofaations through precise spot planting rates depends on the accurate functioning of seed flow sensors within the working rows. Despite the availability of these sensors in the market, achieving measurement precision remains a challene in their optimal design. Seed flow sensors can be categorized into two primary types: optical and non-optical. Among these, optical sensors—particularly infrared sensors—are gaining popularity among researchers due to their distinct advantages, including simple circuit design, cost-effectiveness, and a strong correlation with seed flow. However, the accuracy of these sensors tends to diminish over time due to dust accumulation from planting ofaations and the effects of sunlight. In response to these challenes, researchers are actively exploring various solutions, employing diverse approaches such as the development of different algorithms and the utilization of alternative hardware configurations. Each research initiative aims to address specific challenes associated with these sensors, with the overarching goal of facilitating effective commercialization, optimizing resource use, and minimizing waste.Materials and MethodsTwo distinct algorithms, utilizing analog-to-digital converter and interrupt-based methodologies, were meticulously developed and thoroughly evaluated to determine the more effective method for monitoring. Correspondingly, unique circuits were enineered for each algorithm.To enhance the sensitivity of the sensor while simplifying the circuit's complexity and dimensions, the lm324 Op-Amp was used in the interrupt-based sensor circuit. Adjusting sensitivity was made feasible through a multi-turn potentiometer, enabling precise adjustment of the external interrupt within the microcontroller. On the other hand, the analog-to-digital converter-based circuit, without relying on the LM324 chip, provided a more straightforward and quieter configuration.The intricate nature of construction mandated the design of circuits using Altium Designer 17 software, which was then printed onto circuit boards. Both developed circuits featured the deployment of the STM32F103C8T6 microcontroller, renowned for its robust capabilities and cost efficiency.In the interrupt-based algorithm's development, the microcontroller's external interrupt was used, selecting its sensitivity to detect both rising and falling edges. This strategic configuration ensured comprehensive scanning of all receivers by the analog-to-digital converter upon any interruption in the infrared sensors. Given the singular passage of seeds in precision seeding, each pass was counted as a single seed.At the start of the planting ofaation and upon reaching the end of each planting row, the microcontroller employed a micro-switch to sample the output of the infrared sensor, which were then used to execute further calculations based on those samples. Throughout the planting process, the microcontroller continuously faformed sensor scanning and promptly converted the sensor outputs into binary values based on defined thresholds. Then, it counted the seeds based on the predetermined counting thresholds for the number of passes.The efficacy of these developed algorithms and sensors underwent rigorous testing encompassing hybrid corn seeds, popcorn, soybean, and mung bean. The evaluation was conducted on an 11-meter-long conveyor belt platform, tested at three different speeds: 4, 7, and 10 km h-1, through five distinct iterations. This comprehensive evaluation ensured the robustness and reliability of the algorithms across diverse seed types and varying ofaational conditions.Results and DiscussionTest results indicate that interrupt-based sensors demonstrate impressive seed counting capabilities; however, they may encounter issues such as susceptibility to dust and the need for manual recalibrations. Moreover, these sensors exhibited acceptable faformance across various crops, including corn and soybeans. Nonetheless, variations in seed characteristics could affect counting accuracy. Additionally, simultaneous seed passage through the sensor under certain conditions posed challenes, diminishing the sensor's precision. On the other hand, sensors employing analog-to-digital algorithms showed promising faformance. They offer enhanced adjustability compared to their interrupt-based counterparts, showcasing adaptability to diverse conditions. In summary, each sensor type has its strenths and weaknesses. Sensors that utilize analog-to-digital converter algorithms may offer sufaior faformance in varied scenarios due to their advanced features and adaptable configurations.ConclusionThis study developed and tested two seed counting algorithms: one based on interruption and the other utilizing an analog-to-digital converter. Both algorithms effectively counted seeds larger in diameter than the distance between adjacent LEDs with remarkable accuracy. However, due to their reliance on infrared optical components, both were susceptible to dust generated during planting ofaations. The algorithm utilizing the analog-to-digital converter demonstrated a notable advantage. Its ability to adjust the threshold either at the start of planting or at the end of each crop row provided a distinct edge over the interruption-based algorithm. Consequently, the analog-to-digital converter-based algorithm was selected as the sufaior choice for this research.AcknowledgmentThe authors express appreciation for the financial support provided by the University of Tabriz. [ABSTRACT FROM AUTHOR]

To reduce the circuit size of a single-ended-tobalanced power divider, a section of coupled line with a short-circuited terminal is applied. In this structure, two transmission zeros are generated, which realizes a wide input-matching bandwidth without extra absorbing branches. The enhanced input matching bandwidth can decrease the effect of the reflection wave power on the operation of the preceding active stage in the RF front end. Equations are derived to support the power transmission in a specific power division ratio. To verify the proposed structure, a single-ended-to-balanced power divider operating at 2.0 GHz is designed, fabricated, and measured. A wide matching bandwidth under -10 dB covers from 0.292 to 3.966 GHz with a fractional bandwidth (FBW) of 183.7%. Simulation and measurement results are in good agreement. [ABSTRACT FROM AUTHOR]

In this paper, a novel dual‐band wideband bandpass filter (BPF) based on transversal signal‐interaction concepts with a wide upper stopband is proposed and investigated. The designed specification of two passbands can be managed and satisfied based on the independent controllable fractional bandwidth of the two passbands and the centered frequencies. The centered frequencies of dual‐band BPF are, respectively, 0.79 GHz (ƒ1) and 1.24 GHz (ƒ2) with 3 dB fraction bandwidths of 26.54% and 11.3%. Two transmission paths consisting of coupled stub‐loaded square ring resonators and anti‐coupled shorted lines are used to realize signal cancellation of multiple transmission path signal transmission from Port 1 to Port 2. Eleven transmission zeros (TZs) modify harmonic suppression up to 10 ƒ1 with stopband rejection higher than 15 dB. Butterworth lumped notch network and step impedance resonator (SIR) are also utilized to improve the selectivity and harmonic suppression. A compact filter with a circuit size of 0.08λg × 0.08λg is implemented and tested. Good agreement between simulation and measured results verifies the reliability of the designing scheme. [ABSTRACT FROM AUTHOR]

In this paper, we introduce Bandersnatch, a new elliptic curve built over the BLS12-381 scalar field. The curve is equipped with an efficient endomorphism, allowing a fast scalar multiplication algorithm. Our benchmark shows that the multiplication is 42% faster, 21% reduction in terms of circuit size in the form of rank 1 constraint systems (R1CS), and 10% reduction in terms of Plonk circuit, compared to another curve, called Jubjub, having similar properties. Many zero-knowledge proof systems that rely on the Jubjub curve can benefit from our result. [ABSTRACT FROM AUTHOR]

A functional commitment (FC) scheme enables committing to a vector x and later producing an opening proof π for a function value y = f (x) with function f in some function set F . Everyone can verify the validity of the opening proof π w.r.t. the function f and the function value y. Up to now, the largest function set is the bounded-depth circuits and achieved by FC schemes in [Peikeit et al. TCC 2021, De Castro et al. TCC 2023, Wee et al. Eurocrypt 2023, Wee et al. Asiacrypt 2023] with the help of the homomorphic encoding and evaluation techniques from lattices. In fact, these FC schemes can hardly support circuits of large depth, due to the fast accumulation of noises in the homomorphic evaluations. For example, if the depth of the circuit is linear to the security parameter λ , then the underlying GapSVP γ problem will be accompanied with a super-exponentially large parameter γ > (λ log λ) Θ (λ) and can be easily solved by the LLL algorithm. In this work, we propose a new FC scheme supporting arbitrary circuits of bounded sizes. We make use of homomorphic encoding and evaluation as well, but we disassemble the circuit gate by gate, process the gates, and reassemble the processed gates to a flattened circuit of logarithm depth O (log λ) . This makes possible for our FC scheme to support arbitrary polynomial-size circuits. Our FC scheme has the common reference string (CRS) growing linear to the size of the circuit. So CRSs of different sizes allow our FC scheme to support circuits of different (bounded) sizes. Just like the recent work on FC schemes [Wee et al. Eurocrypt 2023, Asiacrypt 2023], our FC scheme achieves private opening and target binding based on a falsifiable family of "basis-augmented" SIS assumptions. Our FC scheme has succinct commitment but not succinct opening proof which of course does not support fast verification. To improve the running time of verification, we resort to the non-interactive GKR protocol to outsource the main computation in verification to the proof generation algorithm. As a result, we obtain an improved FC scheme which decreases the computational complexity of verification with a factor O (λ) . [ABSTRACT FROM AUTHOR]

Grover's search algorithm (GSA) offers quadratic speedup in searching unstructured databases but suffers from exponential circuit depth complexity. Here, we present two quantum circuits called HX and Ry layers for the searching problem. Remarkably, both circuits maintain a fixed circuit depth of two and one, respectively, irrespective of the number of qubits used. When the target element's position index is known, we prove that either circuit, combined with a single multi-controlled X gate, effectively amplifies the target element's probability to over 0.99 for any qubit number greater than seven. To search unknown databases, we use the depth-1 Ry layer as the ansatz in the Variational Quantum Search (VQS), whose efficacy is validated through numerical experiments on databases with up to 26 qubits. The VQS with the Ry layer exhibits an exponential advantage, in circuit depth, over the GSA for databases of up to 26 qubits. [ABSTRACT FROM AUTHOR]

This paper presents a novel, compact, and energy-efficient hysteretic boost converter that employs an anti-phase AC-coupling emulate current control. The proposed scheme utilizes a two-transistor current emulator and a comparator, which allow for fast transient responses and tight closed-loop regulations. This converter was fabricated using a 180 nm CMOS process and was capable of regulating a 5 V output with a 400 mA load capacity from an input voltage range of 2.7 V to 4.5 V. The experimental results demonstrate that the proposed anti-phase AC-coupling emulate current controlling and single hysteretic comparator controlling scheme show lower power/circuit complexity and better static and transient performance. Specifically, under load transitions ranging from 0 mA to 300 mA, the converter exhibits over/undershoot voltages of 38 mV and −42 mV, respectively. Furthermore, the measured load and line regulation performances are 5 mV/A and 2.3 mV/V, respectively. Overall, this study offers a practical and efficient solution for boosting voltage levels while maintaining stable and precise regulation. [ABSTRACT FROM AUTHOR]

A wideband bandpass filter (BPF) using capacitor-loaded coupled lines is proposed with super-compact circuit size and very simple structure. By loading three lumped capacitors in parallel to three same pairs of coupled lines, three transmission poles and four transmission zeros can be achieved and they can be calculated by input admittance derivation. To verify the design, a wideband BPF prototype with center frequency at 1.34 GHz is fabricated, whose measured 3-dB fractional bandwidth is 98.5 % (0.68–2 GHz), in-band insertion loss is less than 0.5 dB, return loss is greater than 17.5 dB, and circuit size is only 0.24 λg × 0.02 λg (λg: guided wavelength at the center frequency). [ABSTRACT FROM AUTHOR]

In this paper, a miniaturized 5 G microstrip lumped hybrid dual-band bandpass filter (BPF) with ideal transmission response, simple structure, and compact size is proposed and characterized. The conversions from lumped elements to microstrip lines are analyzed and demonstrated by utilizing the ideal theoretical circuit model and EM field model. The center frequency of 0.57 GHz and the second passband located at 1.29 GHz are implemented by the proposed dual-band BPF with 3 dB fractional bandwidths of 59.6% and 15.5%, respectively. Additionally, five transmission zeros are strategically positioned on both sides of the passband. The prototype filter with minimized circuit size on occupies 0.05λg × 0.06λg is fabricated and verified that minimum insertion losses in the passbands are separately 0.83 dB and 0.52 dB. Ideal agreement between the simulated and measured results confirms the reliability of the design approach. [ABSTRACT FROM AUTHOR]

For upcoming AI computing era, the multi‐valued logic (MVL) is promising for processing multiple information with high‐density device. Particularly, the negative differential transconductance (NDT) devices as element of MVL have been needed to overcome complicated heterostructures with multiple stacking process. Herein, the single‐channel device is developed with NDT phenomenon through plasma treatment in van der Waals (vdW) transistor. The O2 plasma treatment formed amorphous oxidation layer capable of charge transfer on vdW materials. Through O2 plasma treatment on single‐channel, the NDT phenomenon is implemented by forming the multiple VTH in single‐channel electrical curve due to charge transfer p‐doping effect. The peak‐to‐valley current ratio (PVCR) of NDT phenomenon is achieved to 102. Furthermore, ternary inverter is demonstrated in single‐channel combined with NDT and load device. Finally, by implementing NDT peak in single‐channel transistor, the complexity and size of MVL circuit is reduced, moving away multiple heterostructure. [ABSTRACT FROM AUTHOR]

ABSTRACT This study presents an innovative control framework designed for voltage source inverters (VSIs) equipped with LC output filters. The objective of this control framework is to reduce delay and suppress aliasing effects by employing multisampling techniques and implementing repetitive filtering methods. The multisampling approach can significantly reduce control delays, thereby enhancing both the bandwidth and stability margins of the system. The implementation of multisampling techniques for inverter voltage can enhance dynamic performance. However, it may introduce high‐frequency ripples in the control loop, resulting in low‐order aliasing harmonics and ultimately leading to output voltage distortion. To address this issue, a multiple notch filter with minimal phase delay is employed suppress aliasing. The optimal parameters of the system are determined by evaluating the filter specifications, filtering effectiveness, output voltage ripple, and overall system performance, while also considering the actual filtering requirements and circuit size. Its effectiveness and performance are carefully verified by experimental results. [ABSTRACT FROM AUTHOR]

In this paper, a novel realization of an ink-on-glass microwave sensor for biomedical applications is proposed. The Aerosol Jet Printing (AJP) technology is leveraged to implement a compact single-layer coplanar waveguide sensor featuring arc-shaped interdigital fingers that can accommodate a droplet of the Material-Under-Test (MUT). Such geometry provides a high sensitivity to even a very small deviation of MUT's electrical properties when placed as a superstrate. An application towards the detection of trace amounts of glucose in saliva, which is a biomarker for diabetes, is showcased. The design and fabrication process of an exemplary sensor is discussed in detail. A circular geometry feature is introduced that helps a droplet to lie over the sensitive region due to wettability difference of glass substrate and silver ink. Sensor operating in K-band is developed providing a tradeoff between circuit size and droplet volume. The study is conducted for an artificial saliva requiring roughly a 0.5 µL droplet where changes in mixture content are proportional to relative changes of sensor's transmission coefficient in a broad frequency range for occupied vs. empty states. The obtained results show that 10 mg of glucose per 100 ml of saliva can be easily distinguished in a frequency range of 20–30 GHz, whereas a monotonical change is visible for frequencies 20–26 GHz, which indicates the applicability of this sensor towards the detection of saliva-glucose levels and potential application in the detection of small amounts of other substances in liquids. [ABSTRACT FROM AUTHOR]

Quantum architecture Search (QAS) is a promising direction for optimization and automated design of quantum circuits towards quantum advantage. Recent techniques in QAS emphasize Multi-Layer Perceptron (MLP)-based deep Q-networks. However, their interpretability remains challenging due to the large number of learnable parameters and the complexities involved in selecting appropriate activation functions. In this work, to overcome these challenges, we utilize the Kolmogorov-Arnold Network (KAN) in the QAS algorithm, analyzing their efficiency in the task of quantum state preparation and quantum chemistry. In quantum state preparation, our results show that in a noiseless scenario, the probability of success is 2× to 5× higher than MLPs. In noisy environments, KAN outperforms MLPs in fidelity when approximating these states, showcasing its robustness against noise. In tackling quantum chemistry problems, we enhance the recently proposed QAS algorithm by integrating curriculum reinforcement learning with a KAN structure. This facilitates a more efficient design of parameterized quantum circuits by reducing the number of required 2-qubit gates and circuit depth. Further investigation reveals that KAN requires a significantly smaller number of learnable parameters compared to MLPs; however, the average time of executing each episode for KAN is higher. [ABSTRACT FROM AUTHOR]

In this manuscript, a miniature high-temperature superconductor (HTS) bandpass filter (BPF) with multi-transmission zeros (TZs), high selectivity, and great attenuation of stopband is presented. A couple of dual-mode resonator (DMR) is employed to achieve the proposed BPF, which can be characterized by using the classical even-odd mode analysis technique. The presented cascaded DMR can excite four resonant modes, which can be individually managed. Plus, a pair of intrinsic transmission zeros can be yielded at both the lower and upper edges of the passband, which results in sharp shirt performance. As an example, the HTS BPF is designed, fabricated, and tested, in which the center frequency is centred at 3.95 GHz and the 3-dB fractional bandwidth (FBW) is 2.5%. The proposed HTS BPF is implemented by using Tl2Ba2CaCu2O8 (Tl-2212) thin films which are fabricated by two-step processing and the superconducting critical temperatures (Tc) of the HTS films can reach 103 K. The design methodology is confirmed since the experimental results are in good agreement with theoretical results, showing desired bandpass characteristics, high selectivity, and the attenuation of lower and upper stopbands above −50 dB. Further, the circuit size is only 0.4 cm2. [ABSTRACT FROM AUTHOR]

Background: De-novo-designed synthetic transcriptional regulators have great potential as the genetic parts for constructing complex multilayered gene circuits. The design flexibility afforded by advanced nucleic acid sequence design tools vastly expands the repertoire of regulatory elements for circuit design. In principle, the design space of synthetic regulators should allow for the construction of regulatory circuits of arbitrary complexity; still, the orthogonality and robustness of such components have not been fully elucidated, thereby limiting the depth and width of synthetic circuits. Results: In this work, we systematically explored the design strategy of synthetic transcriptional regulators, termed switchable transcription terminators. Specifically, by redesigning key sequence domains, we created a high-performance switchable transcription terminator with a maximum fold change of 283.11 upon activation by its cognate input RNA. Further, an automated design algorithm was developed for these elements to improve orthogonality for a complex multi-layered circuit construction. The resulting orthogonal switchable transcription terminators could be used to construct a three-layer cascade circuit and a two-input three-layer OR gate. Conclusions: We demonstrated a practical strategy for designing standardized regulatory elements and assembling modular gene circuits, ultimately laying the foundation for the streamlined construction of complex synthetic gene circuits. [ABSTRACT FROM AUTHOR]

Quantum computing holds great promise for accelerating computational tasks, but they are still not accessible. To fill this gap, quantum computing simulators have been widely used for the developing of quantum circuits and algorithms. Simulating quantum algorithms on classical computers also poses challenges due to the need for exponential memory and computational requirements. Many researchers attempted to address such challenges on different single-core, multi-core, and many-core systems, especially graphics processing units (GPUs). The diversity of CPU and GPU simulation of quantum circuits, including various CPU–GPU combinations and multiple parameters, including qubit size, memory capacity, circuit depth, GPU performance, resource heterogeneity, and load imbalance, makes it even more challenging. Finding the best configuration requires an exhaustive search in the design space, which is not possible in an acceptable time frame. Therefore, given the multitude of parameters and the analysis of influential factors, having an analytical model for selecting the proper configuration is desirable and even essential for large systems. This paper proposes a novel analytical performance model for quantum circuit simulation on a hybrid CPU–GPU platform of various sizes and parameters such as number of CPUs/GPUs, qubit size, memory capacity, quantum circuit depth, CPU/GPU performance, resource heterogeneity, and processing load. To do so, we focus on evaluating a scalable and adaptive hybrid quantum simulator in a hybrid platform with some CPUs and GPUs across multiple hosts. The model analyzes the execution time of individual GPU kernels and the impact of major micro-architecture features on performance. By employing dynamic load partitioning (DLP) and the heterogeneous multi-GPU kernel, performance bottlenecks are accurately identified, and execution time is estimated. The proposed model shows high accuracy, with a 94% accuracy compared to the experimental results on a hybrid multi-node cluster. Therefore, the proposed model provides insights into scalability, efficiency, and load balancing in hybrid parallel systems, hence supporting code optimization and development of efficient quantum algorithms and advanced quantum circuit simulation on hybrid parallel architectures. [ABSTRACT FROM AUTHOR]

In this letter, a method of designing quasi‐elliptic bandpass filter with ultrabroad reflectionless bandwidth and high selectivity is proposed. It is implemented on the basis of a quasi‐elliptic absorptive lowpass filter (ALPF) prototype that features both a low‐reflection response over all normalized frequencies and two controllable transmission zeros near the passband. A distributed‐element absorptive bandpass filter (ABPF) scheme using coupled‐line units is derived from this quasi‐elliptic ALPF prototype. With this distributed‐element ABPF scheme, both ultrabroad reflectionless bandwidth and compact size can be realized. Equations for closed‐form design are derived. A microstrip ABPF operating at 2.0 GHz (i.e., f0) is designed for validation. The measured roll‐off rates of the upper and lower transition bands are 116.44 and 157.41 dBc/GHz, respectively. The return loss is better than 10 dB from direct current to 6.25f0. The size of the overall circuit is 0.12λg2. [ABSTRACT FROM AUTHOR]

X‐ray ghost imaging with a crystal beam splitter has advantages in highly efficient imaging due to the simultaneous acquisition of signals from both the object beam and reference beam. However, beam splitting with a large field of view, uniform distribution and high correlation has been a great challenge up to now. Therefore, a dedicated beam splitter has been developed by optimizing the optical layout of a synchrotron radiation beamline and the fabrication process of a Laue crystal. A large field of view, consistent size, uniform intensity distribution and high correlation were obtained simultaneously for the two split beams. Modulated by a piece of copper foam upstream of the splitter, a correlation of 92% between the speckle fields of the object and reference beam and a Glauber function of 1.25 were achieved. Taking advantage of synthetic aperture X‐ray ghost imaging (SAXGI), a circuit board of size 880 × 330 pixels was successfully imaged with high fidelity. In addition, even though 16 measurements corresponding to a sampling rate of 1% in SAXGI were used for image reconstruction, the skeleton structure of the circuit board can still be determined. In conclusion, the specially developed beam splitter is applicable for the efficient implementation of X‐ray ghost imaging. [ABSTRACT FROM AUTHOR]

Summary: An analysis of a single‐ended high‐efficiency broadband parallel‐circuit (PC) Class‐E power amplifier (PA) with a single reactance compensation technique (RCT) and low‐pass (LP) Chebyshev impedance transformer is first presented under low supply voltage. Analysis of the gate and drain voltage allows to determine the required optimum voltage values for the expected PA design objectives. Derivation and design procedure of the broadband matching network (MN) is provided, which can effectively filter out higher order harmonics and reduce circuit complexity. In addition, the load adaptability for this PA is studied, achieving higher than 67.87% drain efficiency (DE) in the case of load mismatch. A PC Class‐E PA based on NMOS transistor is designed and implemented to validate the analysis over a frequency band of 7–9.4 MHz. Experimental results show that the PA delivers 36.48–38.83 dBm output power with a DE of 84.91% to 86.91%, as well as achieves 83.98% to 86.28% power‐added efficiency (PAE), 19.48–21.83 dB gain with a low supply voltage of 12 V. It is also demonstrated that the experimental results exhibit good agreement with the simulation results, which prototype the radio frequency identification transmitter with broadband high‐efficiency and system compactness. To the author's knowledge, this study represents the first approach to design broadband PC Class‐E PA under low supply voltage for Internet of Things (IoT) applications at HF frequency band, such as electronic article surveillance (EAS) system. [ABSTRACT FROM AUTHOR]

Reference placement is promising to handle the increasing complexity in printed circuit board (PCB) designs, which aims to find the isomorphism of the placed template in component combination to reuse the placement. In this paper, we convert the netlist information into a graph and then model the reference placement as a subgraph matching problem. Since the state-of-the-art subgraph matching methods usually recursively search the solutions and suffer from high time and memory consumption in large-scale designs, we develop a novel subgraph matching algorithm D2BS with diversity tolerance and improved backtracking to guarantee matching quality and efficiency. The D2BS algorithm is founded on a data structure called the candidate space (CS) structure. We build and filter the candidate set for each query node according to our designed features to construct the CS structure. During the CS optimization process, a graph diversity tolerance strategy is adopted to achieve efficient inexact matching. Then, hierarchical matching is developed to search the template embeddings in the CS structure guided by branch backtracking and matched-node snatching strategies. Based on the industrial PCB designs, experimental results show that D2BS outperforms the state-of-the-art subgraph matching method in matching accuracy and running time. [ABSTRACT FROM AUTHOR]

In this paper, a high-efficiency compact power amplifier is designed and fabricated with a 0.25 μm GaN high electron mobility transistor (HEMT) to meet the demands of a high integration level and high efficiency for microwave wireless power transfer (WPT) systems. The proposed power amplifier (PA) is implemented using an internally matched method to achieve a compact circuit size. The output second and third harmonic impedances can be optimized through output matching circuits, eliminating the need for additional harmonic matching networks. This approach simplifies the design of matching circuits and reduces the circuit size. Furthermore, the input third harmonic has been controled for improving the efficiency of DC-to-RF conversion. The total size of the proposed PA is 13.4   ×   13.5 mm2. The test results obtained from the continuous wave (CW) testing indicate that the output power of the power amplifier at 2.45 GHz reaches 43.75 dBm. Additionally, the large-signal gain is measured at 15.75 dB, and the power-added efficiency (PAE) achieves a value of 78.5%. [ABSTRACT FROM AUTHOR]

This paper introduces a multimode hybrid continuous class power amplifier utilizing a band-pass filter. It integrates resistive response amplifiers operating in three modes: class F, class J, and class F-1. Instead of the traditional quarter-wavelength line for harmonic control, an interdigital band-pass filter is utilized to manage harmonic impedance, enabling broadband operation, high efficiency, reduced circuit size, and improved out-of-band rejection. To demonstrate the approach, a multimode hybrid broadband high-efficiency power amplifier designed for 2 to 3.8 GHz range, achieving drain efficiency from 56.3% to 75.5%, saturated output power ranging from 39.1 to 41.2 dBm, and gain between 11.1 and 13.2 dB, is detailed and fabricated in this paper. [ABSTRACT FROM AUTHOR]

Integrated circuit technology enables the scaling of circuit complexity and functionality while maintaining manufacturability and reliability. Integration is expected to play an important role in quantum information technologies, including in the highly demanding task of producing the classical signals to control and measure quantum circuits at scales needed for fault-tolerant quantum computation. Here, we experimentally characterize the cryogenic performance of a miniaturized photonic integrated circuit fabricated by a commercial foundry that downconverts classical optical signals into microwave signals. The circuit consists of waveguide-integrated germanium PIN photodiodes packaged using a scalable photonic wire bonding approach to a multi-channel optical fiber array that provides the optical excitation. We find the peak optical-to-microwave conversion response to be ∼150 ± 13 mA/W in the O-band at 4.2 K, well below the temperature the circuit was designed for and tested at in the past, for two different diode designs. The second diode design operates to over 6 GHz of 3 dB bandwidth, making it suitable for controlling quantum circuits, with improvements in bandwidth and response expected from improved packaging. The demonstrated miniaturization and integration offers new perspectives for wavelength-division multiplexed control of microwave quantum circuits and scalable processors using light delivered by optical fiber arrays. [ABSTRACT FROM AUTHOR]

Recent advancements in quantum information and quantum technology have stimulated a good deal of interest in the development of quantum algorithms toward the determination of the energetics and properties of many-fermionic systems. While the variational quantum eigensolver is the most optimal algorithm in the noisy intermediate scale quantum era, it is imperative to develop compact Ansätze with low-depth quantum circuits that are physically realizable in quantum devices. Within the unitary coupled cluster framework, we develop a disentangled Ansatz construction protocol that can dynamically tailor an optimal Ansatz using the one- and two-body cluster operators and a selection of rank-two scatterers. The construction of the Ansatz may potentially be performed in parallel over multiple quantum processors through energy sorting and operator commutativity prescreening. With a significant reduction in the circuit depth toward the simulation of molecular strong correlation, our dynamic Ansatz construction protocol is shown to be highly accurate and resilient to the noisy circumstances of the near-term quantum hardware. [ABSTRACT FROM AUTHOR]

In recent times, a variety of hybrid quantum–classical algorithms have been developed that aim to calculate the ground state energies of molecular systems on Noisy Intermediate-Scale Quantum (NISQ) devices. Albeit the utilization of shallow depth circuits in these algorithms, the optimization of ansatz parameters necessitates a substantial number of quantum measurements, leading to prolonged runtimes on the scantly available quantum hardware. Through our work, we lay the general foundation for an interdisciplinary approach that can be used to drastically reduce the dependency of these algorithms on quantum infrastructure. We showcase these pertinent concepts within the framework of the recently developed Projective Quantum Eigensolver (PQE) that involves iterative optimization of the nonlinearly coupled parameters through repeated residue measurements on quantum hardware. We demonstrate that one may perceive such a nonlinear optimization problem as a collective dynamic interplay of fast and slow relaxing modes. As such, the synergy among the parameters is exploited using an on-the-fly supervised machine learning protocol that dynamically casts the PQE optimization into a smaller subspace by reducing the effective degrees of freedom. We demonstrate analytically and numerically that our proposed methodology ensures a drastic reduction in the number of quantum measurements necessary for the parameter updates without compromising the characteristic accuracy. Furthermore, the machine learning model may be tuned to capture the noisy data of NISQ devices, and thus the predicted energy is shown to be resilient under a given noise model. [ABSTRACT FROM AUTHOR]

Circuit depth reduction is of critical importance for quantum chemistry simulations on current and near term quantum computers. This issue is tackled by introducing a chemically aware strategy for the unitary coupled cluster ansatz. The objective is to use the chemical description of a system to aid in the synthesis of a quantum circuit. We combine this approach with two flavors of symmetry verification for the reduction of experimental noise. These methods enable the use of Quantinuum's System Model H1 ion trap quantum computer for a 6-qubit quantum subspace expansion calculation. We present (i) calculations to obtain methane's optical spectra; (ii) an atmospheric gas reaction simulation involving [ C H 3 ⋅ —H—OH]‡. Using our chemically aware unitary coupled cluster state-preparation strategy in tandem with state of the art symmetry verification methods, we improve device yield for CH4 at 6 qubits. This is demonstrated by a 90% improvement in two-qubit gate count and a reduction in relative error to 0.2% for electronic energy calculated on System Model H1. [ABSTRACT FROM AUTHOR]

The conductance of a tunneling electron through a π-conjugated molecule may be affected by the presence of different pathways in the orbital structure of the molecule, resulting in the constructive or destructive interference of the molecular wave function. This quantum interference (QI) directly translates into enhancement or suppression of conductance and offers the possibility of controlling this phenomenon through tailored synthesis. Hence, we set up synthetic methodologies to access a series of thiophene-fused helicenes with a well-defined positioning of the sulfur atoms, which control the occurrence of conducting, linearly conjugated as well as disrupted, cross-conjugated pathways. We describe these synthetic strategies and relate the expected electronic transport through our molecules to three key variables: a) the exo-/endo-topology of the S atom within the ring; b) the parity (odd/even) of the overall number of rings conforming to the helicene; and c) the size of the circuit. This series ranks from [7] to [11] fused rings, having both exo-, endo-, or mixed exo-endo-topology. Comparison of homologous dithiahelicenes with size-tunable highest occupied molecular orbital (HOMO)/lowest unoccupied molecular orbital (LUMO) energies allows us to isolate the key variable of the bond topology from other electronic properties and face the study of QI in helically conjugated molecules. Understanding and tuning the conductance in such molecular solenoids is the main purpose of this work. [ABSTRACT FROM AUTHOR]

In this paper, we present a novel polylactic-acid/flax-composite substrate and the implementation of a demonstrator: a microcontroller board based on commercial design. The substrate is developed for printed circuit board (PCB) applications. The pre-preg is biodegradable, reinforced, and flame-retarded. The novel material was developed to counter the increasing amount of e-waste and to improve the sustainability of the microelectronics sector. The motivation was to present a working circuit in commercial complexity that can be implemented on a rigid substrate made of natural, bio-based materials with a structure very similar to the widely used Flame Retardant Class 4 (FR4) substrate at an early technological readiness level (2–3). The circuit design is based on the Arduino Nano open-source microcontroller board design so that the demonstration could be programmable and easy to fit into education, IoT applications, and embedded designs. During the work, the design was optimized at the level of layout. The copper-clad pre-preg was then prepared and processed with subtractive printed wiring technology and through hole plating. The traditional surface mounting methodology was applied for assembly. The resulting yield of PCB production was around 50%. Signal analysis was successful with analogue data acquisition (voltage) and low-frequency (4 kHz) tests, indistinguishable from sample FR4 boards. Eventually, the samples were subjected to highly accelerated stress test (HAST). HAST tests revealed limitations compared to traditional FR4 printed circuit materials. After six cycles, the weight loss was around 30% in the case of PLA/Flax, and as three-point bending tests showed, the possible ultimate strength (25 MPa at a flexural state) was reduced by 80%. Finally, the sustainability aspect was assessed, where we found that ∼95 vol% and ∼90 wt% of the traditional substrate can be substituted, significantly easing the load of waste on the environment. [ABSTRACT FROM AUTHOR]

In this paper, a (t, n) threshold quantum image secret sharing scheme based on combination theory is proposed. Here, the threshold t is a constant number that should satisfy the condition t ≤ n . In sharing process, the secret image is divided into n shadow images according to n sample matrices constructed by the combination theory and sent to n participants individually. During the recovery process, the original secret image can be fully restored if q (q ≥ t) participants are chosen. However, if the number of chosen participants is less than t, no information about the original secret image can be obtained. The quantum matrix multiplier is first introduced for encryption of the secret images. Then the quantum ⋂ gate is chosen for producing sample matrices. In the recovering steps, we use quantum ⋃ gates to collect shadow images. After that, the quantum circuits of the proposed scheme are given and the complexity of the circuits is discussed. We then conduct numerical simulations of our scheme on grayscale images and RGB images. The results shows that our scheme has a good effect on threshold quantum image secret sharing. [ABSTRACT FROM AUTHOR]

Approximate computing is commonly employed in applications where accuracy is not crucial and aims to enhance circuit performance when inaccurate results are not challenging. The multipliers are power‐hungry, and their approximation has been the target of research, especially by using approximate counters. In this study, a low‐power and high‐speed approximate 4 : 2 counter is proposed to add partial product (PP) bits. Also, a new partial product generation (PPG) is introduced by inserting errors in Karnaugh's map to reduce the circuit complexity. The counter and PPG make a new radix‐4‐based 8 × 8 Booth multiplier, which is synthesized targeting a 32‐nm carbon nanotube field‐effect transistor (CNTFET) technology to determine the hardware characteristics. Looking at the normalized mean error distance (NMED), the multiplier has a 51.33% power–delay product (PDP) saving and acceptable accuracy. Besides, the multiplier which is configured by the counter and PPG accomplishes a 28.31% savings in the PDP × NMED in comparison with other approximate Booth multipliers. The case study of joint photographic experts group (JPEG) compression is performed, and the proposed multiplier outperforms references by higher quality results along with lower power consumption. [ABSTRACT FROM AUTHOR]

The optimization of the power consumption of antenna networks is a problem with a potential impact in the field of telecommunications. In this work, we investigate the application of the quantum approximate optimization algorithm (QAOA) and the quantum adiabatic algorithm (QAA), to the solution of a prototypical model in this field. We use state vector emulation in a high-performance computing environment to compare the performance of these two algorithms in terms of solution quality, using selected evaluation metrics. We estimate the circuit depth scaling with the problem size while maintaining a certain level of solution quality, and we extend our analysis up to 31 qubits, which is rarely addressed in the literature. Our calculations show that as the problem size increases, the probability of measuring the exact solution decreases exponentially for both algorithms. This issue is particularly severe when we include constraints in the problem, resulting in full connectivity between the sites. Nonetheless, we observe that the cumulative probability of measuring solutions close to the optimal one remains high also for the largest instances considered in this work. Our findings keep the way open to the application of these algorithms, or variants thereof, to generate suboptimal solutions at scales relevant to industrial use cases. [ABSTRACT FROM AUTHOR]

The development of quantum processors for practical fluid flow problems is a promising yet distant goal. Recent advances in quantum linear solvers have highlighted their potential for classical fluid dynamics. In this study, we evaluate the Harrow–Hassidim–Lloyd (HHL) quantum linear systems algorithm (QLSA) for solving the idealized Hele–Shaw flow. Our focus is on the accuracy and computational cost of the HHL solver, which we find to be sensitive to the condition number, scaling exponentially with problem size. This emphasizes the need for preconditioning to enhance the practical use of QLSAs in fluid flow applications. Moreover, we perform shots-based simulations on quantum simulators and test the HHL solver on superconducting quantum devices, where noise, large circuit depths, and gate errors limit performance. Error suppression and mitigation techniques improve accuracy, suggesting that such fluid flow problems can benchmark noise mitigation efforts. Our findings provide a foundation for future, more complex application of QLSAs in fluid flow simulations. [ABSTRACT FROM AUTHOR]