307 results on '"Danneville, F."'
Search Results
2. A Sub-35 pW Axon-Hillock artificial neuron circuit
3. High Frequency Noise Sources Extraction in Nanometique MOSFETs
4. Radio-frequency and low noise characteristics of SOI technology on plastic for flexible electronics
5. Helena: A Physical Modeling for the DC, AC, Noise and Non Linear HEMT Performance
6. A selective epitaxy collector module for high-speed Si/SiGe:C HBTs
7. SiGe Based LNA for Data Communication Applications at 211 GHz
8. Sb-HEMT: toward 100-mV cryogenic electronics
9. Thermal noise in MOSFETs: a two- or a three-parameter noise model?
10. Introduction to Schottky-Barrier MOS Architectures: Concept, Challenges, Material Engineering and Device Integration
11. Behaviour of TFMS and CPW line on SOI substrate versus high temperature for RF applications
12. 300-GHz Intermodulation/Noise Characterization Enabled by a Single THz Photonics Source
13. Noise modeling in fully depleted SOI MOSFETs
14. Silicon Based Diode Noise Source Scaling For Noise Measurement Up To 325 GHz
15. Noise parameters of SiGe HBTs in mmW range: towards a full in situ measurement extraction
16. Improved performance of flexible CMOS technology using ultimate thinning and transfer bonding
17. Oscillateur verrouillé par injection sous-harmonique à 285 GHz en technologie CMOS 65nm
18. 120nm AlSb/InAs HEMT without gate recess : 290GHz fT and 335GHz fmax
19. HEMTs 100nm AlSb/InAs pour applications faible bruit, faible consommation
20. High performance GaN on Si transistors up to 40 GHz
21. Fabrication et caractérisation de MOSFET In0.53Ga0.47As de type N en technologie auto-aligné et de longueur de grille de 300nm
22. Self aligned 200nm In0.53Ga0.47As
23. 120nm AlSb/InAs HEMTs
24. Optimisation des performances à faible tension de polarisation de HEMTs de la filière antimoine
25. Assessment of III-V MOSFET architectures for low power applications using static and dynamic numerical simulation
26. Application-oriented performance of RF CMOS technologies on flexible substrates
27. Fabrication and characterization of 200-nm self-aligned In0.53Ga0.47As MOSFET
28. Report hétérogène de dispositifs et circuits CMOS RF sur substrat souple
29. Graded channel concept for improving RF noise of an industrial 0.15 µm SOI CMOS technology
30. Metallic source/drain for advanced MOS architectures : from material engineering to device integration
31. Experimental evidence of MOSFET high frequency noise reduction by channel engineering
32. Metallic source/drain architecture for advanced MOS technology : an overview of METAMOS results
33. Conception de circuits 60 GHz pour système Ultra Large Bande en technologie BiCMOS SiGe
34. High frequency figures of merit of conventional and Schottky barrier MOSFETs
35. An investigation of high temperature effects on CPW and MSL on SOI substrate for RF applications
36. Dynamics of electric field screening in photoconductive THz sources with spatially patterned excitation
37. Design of a travelling wave amplifier in 0.13 µm partially depleted SOI
38. Behavior of a common source traveling wave amplifier versus temperature in SOI technology
39. Propriétés hyperfréquences et de bruit des filières conventionnelles de transistors MOS à grille sub-100 nm
40. An investigation of temperature effects on CPW and MSL on SOI substrate for RF applications
41. Noise in devices and circuits III - Proceedings of SPIE Vol. 5844
42. Conception d'amplificateurs distribués en bande K avec une technologie CMOS SOI partiellement désertée 130 nm
43. High frequency noise of SOI MOSFETs : performances and limitations
44. Low power 23 GHz and 27 GHz distributed cascode amplifiers in a standard 130 nm SOI CMOS process
45. Amplificateur faible bruit pour applications millimétriques à 40 GHz utilisant les transistors bipolaires à hétérojonction SiGeC d'une technologie BiCMOS
46. Empirical MOSFET modelling for RF circuit design
47. RF and noise properties of SOI MOSFETs, including the influence of a direct tunneling gate current
48. Noise modeling and performance in 0.15 µm fully depleted SOI MOSFET
49. Modélisation de bruit et performances de MOSFETs SOI totalement désertés
50. Nonlinear noise modeling in FETs for the design of low noise active mixers
Catalog
Books, media, physical & digital resources
Discovery Service for Jio Institute Digital Library
For full access to our library's resources, please sign in.