147 results on '"Deleonibus, Simon"'
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2. The Future of Nanoelectronics
3. Physical and Technological Limitations of NanoCMOS Devices to the End of the Roadmap and Beyond
4. Multiple Gate Technologies
5. Looking into the future of Nanoelectronics in the Diversification Efficient Era
6. Ultra-thin films and multigate devices architectures for future CMOS scaling
7. Activation level in boron-doped thin germanium-on-insulator (GeOI): Extraction method and impact of mobility
8. Multi-channel field-effect transistor (MCFET)--part II: analysis of gate stack and series resistance influence on the MCFET performance
9. Multi-channel field-effect transistor (MCFET)--part I: electrical performance and current gain analysis
10. Experimental investigation on the quasi-ballistic transport: part II-backscattering coefficient extraction and link with the mobility
11. Experimental investigation on the quasi-ballistic transport: part I-determination of a new backscattering coefficient extraction methodology
12. Size dependence of surface-roughness-limited mobility in silicon-nanowire FETs
13. Avalanche breakdown due to 3-D effects in the impact-ionization MOS (I-MOS) on SOI: reliability issues
14. Investigation of hafnium-aluminate alloys in view of integration as interpoly dielectrics of future Flash memories
15. A systematic investigation of work function in advanced metal gate–HfO 2–SiO 2 structures with bevel oxide
16. Degradation of floating-gate memory reliability by few electron phenomena
17. Static and dynamic TCAD analysis of IMOS performance: From the single device to the circuit
18. Fabrication and mobility characteristics of SiGe surface channel pMOSFETs with a HfO(sub 2)/TiN gate stack
19. Experimental evaluation of gate architecture influence on DG SOI MOSFETs performance
20. On the mobility in high- κ/metal gate MOSFETs: Evaluation of the high- κ phonon scattering impact
21. Full CMP integration of CVD TiN damascene sub-0.1-micromillimeter metal gate devices for ULSI applications
22. Nanoscaled MOSFET Transistors on Strained Si, SiGe, Ge Layers: Some Integration and Electrical Properties Features
23. Fully Depleted Silicon-on-Insulator nMOSFETs with Tensile Strained High Carbon Content Si1-yCy Channels
24. High dose Implantation Impact on the Carrier Mobility in Ultra-Thin Unstrained and Strained SOI Films
25. Analysis of PD SOI pMOSFET Device Performance Enhancement due to Direct-Tunneling Current in the Partial n+ Poly Gate
26. Oxidation of Suspended Stacked Silicon Nanowire for Sub-10nm Cross-Section Shape Optimization
27. Schottky Barrier Height Extraction in Ohmic Regime: Contacts on Fully-Processed 200mm GeOI Substrates
28. Device architectures for the nano-CMOS era
29. Editor’s note
30. Study and Optimization of Silicon-CVD Diamond Interface for SOD Applications
31. Evidence of Reduced Self Heating with Partially Depleted SOI MOSFET Scaling
32. High-pressure and high-temperature furnace oxidation for advanced poly-buffered LOCOS
33. Towards a World of More Functions in Integrated Sustainable Systems
34. The Energy and Variability Efficient Era (E.V.E.) is Ahead of Us
35. CMOS: How far can it go?
36. Towards full 3D, Zero Variability and Zero power future micro/nano-electronics
37. Physical and Technological Limitations of NanoCMOS Devices to the End of the Roadmap and Beyond
38. Multiple Gate Technologies
39. On the way to heterogeneous nanoelectronics, towards the zero power and zero variability world
40. Topical Issue: “2012 International Semiconductor Conference Dresden-Grenoble” (2012 ISCDG)
41. Future micro/nano-electronics: Towards full 3D and zero variability
42. Nanoelectronics and Diversification in the 3D technologies era
43. New routes for advanced 3D Heterogeneous Integration on silicon
44. Prospects for Nanoelectronics CMOS Scaling and Functional Diversification
45. Future of Nanoelectronics at the end of the roadmap and beyond
46. Investigation of bias-dependent series resistances and barrier height in Double Gate Schottky MOSFETs
47. Multichannel Field-Effect Transistor (MCFET)—Part II: Analysis of Gate Stack and Series Resistance Influence on the MCFET Performance
48. Enabling 3D Monolithic Integration
49. Integration of diamond in fully-depleted silicon-on-insulator technology as buried insulator: A theoretical analysis
50. A systematic investigation of work function in advanced metal gate–HfO2–SiO2 structures with bevel oxide
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