140 results on '"Goes, W."'
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2. A multi-level cell for ultra-scaled STT-MRAM realized by back-hopping
3. The influence of interface effects on the switching behavior in ultra-scaled MRAM cells
4. Comprehensive evaluation of torques in ultra-scaled MRAM devices
5. Interface effects in ultra-scaled MRAM cells
6. Temperature increase in STT-MRAM at writing: A fully three-dimensional finite element approach
7. Coupled spin and charge drift-diffusion approach applied to magnetic tunnel junctions
8. Two-pulse switching scheme and reinforcement learning for energy efficient SOT-MRAM simulations
9. Improving failure rates in pulsed SOT-MRAM switching by reinforcement learning
10. Robust magnetic field-free switching of a perpendicularly magnetized free layer for SOT-MRAM
11. Identification of oxide defects in semiconductor devices: A systematic approach linking DFT to rate equations and experimental evidence
12. The defect-centric perspective of device and circuit reliability—From gate oxide defects to circuits
13. First-Principles Investigation on Oxide Trapping
14. Gate current random telegraph noise and single defect conduction
15. Spin Transfer Torques in Ultra-Scaled MRAM Cells
16. Modeling advanced spintronic based magnetoresistive memory
17. Finite Element Method Approach to MRAM Modeling
18. Understanding negative bias temperature instability in the context of hole trapping (Invited Paper)
19. A Comprehensive Oxide-Based ReRAM TCAD Model with Experimental Verification
20. The effect of uniaxial stress on band structure and electron mobility of silicon
21. Numerical Analysis of Deterministic Switching of a Perpendicularly Magnetized Spin-Orbit Torque Memory Cell
22. Perpendicular STT-MRAM Switching at Fixed Voltage and at Fixed Current
23. On the impact of mechanical stress on gate oxide trapping
24. Two-pulse magnetic field-free switching scheme for perpendicular SOT-MRAM with a symmetric square free layer
25. Analysis of Switching Under Fixed Voltage and Fixed Current in Perpendicular STT-MRAM
26. Minimum Energy Paths for Non-Adiabatic Charge Transitions in Oxide Defects
27. Screening and characterization of microorganisms with glutaryl-7 ADCA acylase activity
28. Superior NBTI in High- $k$ SiGe Transistors–Part I: Experimental
29. Superior NBTI in High-k SiGe Transistors–Part II: Theory
30. Complete extraction of defect bands responsible for instabilities in n and pFinFETs
31. The “permanent” component of NBTI revisited: Saturation, degradation-reversal, and annealing
32. Nanoscale evidence for the superior reliability of SiGe high-k pMOSFETs
33. Gate-sided hydrogen release as the origin of "permanent" NBTI degradation: From single defects to lifetimes
34. A density-functional study of defect volatility in amorphous silicon dioxide
35. Microscopic oxide defects causing BTI, RTN, and SILC on high-k FinFETs
36. The defect-centric perspective of device and circuit reliability — From individual defects to circuits
37. Characterization and modeling of reliability issues in nanoscale devices
38. On the volatility of oxide defects: Activation, deactivation, and transformation
39. On the microscopic structure of hole traps in pMOSFETs
40. Advanced modeling of charge trapping: RTN, 1/f noise, SILC, and BTI
41. Physical modeling of NBTI: From individual defects to devices
42. Superior NBTI in High- $k$ SiGe Transistors?Part I: Experimental.
43. Evidence for defect pairs in SiON pMOSFETs
44. Characterization and modeling of charge trapping: From single defects to devices
45. Hydrogen-related volatile defects as the possible cause for the recoverable component of NBTI
46. Advanced modeling of charge trapping at oxide defects
47. Experimental characterization of BTI defects
48. A detailed evaluation of model defects as candidates for the bias temperature instability
49. Direct tunneling and gate current fluctuations
50. Microscopic oxide defects causing BTI, RTN, and SILC on high-k FinFETs.
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